| მთავარი > CERN Departments > Physics (PH) > EP-R&D Programme on Technologies for Future Experiments > EP-R&D Programme on Technologies for Future Experiments (EP RDET) > Generic Analog 8 Bit DAC IP Block in 28nm CMOS for the High Energy Physics Community |
| Article | |
| Title | Generic Analog 8 Bit DAC IP Block in 28nm CMOS for the High Energy Physics Community |
| Author(s) | Piller, Markus (CERN ; Graz, Tech. U.) ; Ballabriga, Rafael (CERN) ; Bandi, Franco Nahuel (CERN) ; Borghello, Giulio (CERN) ; Ceresa, Davide (CERN) ; Pejasinovic, Risto (CERN) ; Sriskaran, Viros (CERN) ; Michalowska-Forsyth, Alicja (Graz, Tech. U.) ; Deutschmann, Bernd (Graz, Tech. U.) |
| Publication | 2022 |
| Number of pages | 4 |
| DOI | 10.1109/Austrochip56145.2022.9940783 |
| Subject category | Detectors and Experimental Techniques ; Computing and Computers |
| Project | CERN-EP-RDET |
| Abstract | The High Energy Physics (HEP) microelectronic design community is leading a CMOS technology change from Application Specific Integrated Circuit (ASIC) designs in 130nm and 65nm to 28nm for the future upgrades of the High Luminosity Large Hadron Collider (LHC). The technology change to a newer and one of the last planar bulk technologies allows benefiting from advances like higher intrinsic density and speed. The increased radiation hardness of 28nm makes this change also inevitable to withstand future radiation in the LHC experiments with levels of Total Ionizing Dose (TID) beyond 1 Grad. We present a generic 8-bit Digital-to-Analog Converter (DAC) as an analog IP block for ASIC designs in the HEP community in 28nm CMOS technology and the design challenges of the novel technology in HEP ASICs. |
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