CERN Accelerating science

ATLAS Slides
Report number	ATL-DAQ-SLIDE-2019-091
Title	Fast Deep Learning on FPGAs for the Phase-II L0 Muon Barrel Trigger of the ATLAS Experiment
Author(s)	Francescato, Simone (INFN Roma and Sapienza Universita' di Roma, Dipartimento di Fisica)
Corporate author(s)	The ATLAS collaboration
Collaboration	ATLAS Collaboration
Submitted to	19th International Workshop on Advanced Computing and Analysis Techniques in Physics Research, Saas Fee, Switzerland, 11 - 15 Mar 2019
Submitted by	simone.francescato@cern.ch on 19 Mar 2019
Subject category	Particle Physics - Experiment
Accelerator/Facility, Experiment	CERN LHC ; ATLAS
Free keywords	Deep Learning ; FPGA ; Muon Trigger
Abstract	The Level-0 Muon Trigger system of the ATLAS experiment will undergo a full upgrade for HL-LHC to stand the challenging performances requested with the increasing instantaneous luminosity. The upgraded trigger system foresees to send RPC raw hit data to the off-detector trigger processors, where the trigger algorithms run on new generation of Field-Programmable Gate Arrays (FPGAs). The FPGA represents an optimal solution in this context, because of its flexibility, wide availability of logical resources and high processing speed. Studies and simulations of different trigger algorithms have been performed, and novel low precision deep neural network architectures (based on ternary dense and convnet networks) optimized to run on FPGAs and to cope with sparse data are presented. Both physics performances in terms of efficiency and fake rates, and FPGA logic resource occupancy obtained with the developed algorithms are presented.