[PDF][PDF] Superlog, a unified design language for system-on-chip
PL Flake, SJ Davidmann - Proceedings of the 2000 Asia and South …, 2000 - dl.acm.org
PL Flake, SJ Davidmann
Proceedings of the 2000 Asia and South Pacific Design Automation Conference, 2000•dl.acm.orgThe design of systems consisting of custom software controlling custom digital hardware is
easier if a single language can be used for system specification, software development,
hardware design and hardware verification. Superlog takes features of existing languages
for software development and hardware design, adds features for system specification and
hardware verification, and blends them into a single, coherent language.
easier if a single language can be used for system specification, software development,
hardware design and hardware verification. Superlog takes features of existing languages
for software development and hardware design, adds features for system specification and
hardware verification, and blends them into a single, coherent language.
Abstract
The design of systems consisting of custom software controlling custom digital hardware is easier if a single language can be used for system specification, software development, hardware design and hardware verification. Superlog takes features of existing languages for software development and hardware design, adds features for system specification and hardware verification, and blends them into a single, coherent language.