Using branch predictors and variable encoding for on-the-fly program tracing
V Uzelac, A Milenković, M Milenković… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
IEEE Transactions on Computers, 2012•ieeexplore.ieee.org
Unobtrusive capturing of program execution traces in real-time is crucial for debugging
many embedded systems. However, tracing even limited program segments is often cost-
prohibitive, requiring wide trace ports and large on-chip trace buffers. This paper introduces
a new cost-effective technique for capturing and compressing program execution traces on-
the-fly. It relies on branch predictor-like structures in the trace module and corresponding
software modules in the debugger to significantly reduce the number of events that need to …
many embedded systems. However, tracing even limited program segments is often cost-
prohibitive, requiring wide trace ports and large on-chip trace buffers. This paper introduces
a new cost-effective technique for capturing and compressing program execution traces on-
the-fly. It relies on branch predictor-like structures in the trace module and corresponding
software modules in the debugger to significantly reduce the number of events that need to …
Unobtrusive capturing of program execution traces in real-time is crucial for debugging many embedded systems. However, tracing even limited program segments is often cost-prohibitive, requiring wide trace ports and large on-chip trace buffers. This paper introduces a new cost-effective technique for capturing and compressing program execution traces on-the-fly. It relies on branch predictor-like structures in the trace module and corresponding software modules in the debugger to significantly reduce the number of events that need to be streamed out of the target system. Coupled with an effective variable encoding scheme that adapts to changing program patterns, our technique requires merely 0.029 bits per instruction of trace port bandwidth, providing a 34-fold improvement over the commercial state-of-the-art and a five-fold improvement over academic proposals, at the low cost of under 5,000 logic gates.
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