In this paper, a novel method for multiple fault diagnosis is proposed using Genetic Algorithms.
Fault diagnosis plays a major role in VLSI Design and Testing. The input test vectors …

A method of test pattern generation for multiple stuck-at faults in VLSI circuits, using genetic
algorithm is proposed. The test patterns were earlier generated for single stuck at faults only …

In the fast moving digital world, it becomes imperative to constantly come up with innovation
in digitization. The analog to digital converter is the second most widely used device in the …

Applications such as single-photon detection require the use of large array of counters within
a small area. Linear feedback shift registers (LFSR) can be considered as the best option …

… A two-antenna prototype of ANITA, called ANITA-lite, was flown for 18 days on a Long-…
The ANITA-lite mission tested nearly every subsystem of ANITA, and monitored the Antarctic …

An algorithm of test pattern generation for multiple faults is proposed using the zero suppressed
decision diagrams (ZBDDs). Test pattern generation plays a major role in the design …

This paper presents a new zero suppressed binary decision diagram (ZBDD)-based
approach for obtaining larger number of relaxed bits. These test sets find major application in …

Since VLSI technology has become ubiquitous in today's world, this field is a prime candidate
for power reduction. Tremendous growth in chip density and reduction in dimensions …

A novel design of a binary counter is introduced in this paper. A 7:3 binary counter is designed
using 5-bit and 2-bit stacking circuits, which is further merged and then converted into …

With the growing intricacy in digital circuits, the need for appropriate exhaustive methods for
testing is on the rise due to the presence of various faults. These faults are needed to be …