[BOOK][B] Placement and routing algorithms for hierarchical integrated circuit layout

BT Preas - 1979 - search.proquest.com
1. Glossy photographs ________ 2. Colored illustrations 3. Photographs with dark background
4. Illustrations are poor copy ____ 5. Print shows through as there is text on both sides of …

Automatic placement a review of current techniques

BT Preas, PG Karger - 23rd ACM/IEEE Design Automation …, 1986 - ieeexplore.ieee.org
This review provides an overview of the placement function within automatic layout systems.
The automatic placement problem is defined and the data abstractions are described. The …

AirJet paper mover: An example of mesoscale MEMS

…, D Goldberg, WB Jackson, B Preas… - … and Components VI, 2000 - spiedigitallibrary.org
The motion of human scale objects requires MEMS-like device arrays capable of providing
reasonable forces ($GTR mN) over human scale distances (10-100 cm). In principle batch …

[PDF][PDF] Interconnection length estimation for optimized standard cell layouts.

M Pedram, B Preas - ICCAD, 1989 - coldflux.usc.edu
In this paper, we present an accurate model for prediction of interconnection lengths for
standard cell layouts. On the designs in our test suite the estimates are within 10% of the actual …

[PDF][PDF] A new algorithm for standard cell global routing.

J Cong, B Preas - ICCAD, 1988 - Citeseer
In this paper, we present a new algorithm for standard cell global routing. The algorithm
considers all of the interconnection nets simultaneously; this produces superior results since …

[PDF][PDF] Motion control of planar objects using large-area arrays of mems-like distributed manipulators

…, M Fromherz, D Goldberg, W Jackson, B Preas… - …, 2000 - berlinplace.com
This paper presents an overview of the Xerox PARC levitating media transport, including initial
experimental results. The levitating media transport is a closed-loop MEMS-based motion …

Design and analysis of segmented routing channels for row-based FPGA's

…, BS Nobandegani, BT Preas - IEEE transactions on …, 1994 - ieeexplore.ieee.org
FPGA's combine the logic integration benefits of custom VLSI with the design, production,
and time-to-market advantages of standard logic IC's. The Actel family of FPGA's exemplifies …

General models and algorithms for over-the-cell routing in standard cell design

J Cong, B Preas, CL Liu - Proceedings of the 27th ACM/IEEE Design …, 1991 - dl.acm.org
When an over-the-cell routing layer is available for standard cell layout, efficient utilization
of routing space over the cells can significantly reduce layout area. In this paper, we present …

[PDF][PDF] Benchmarks for cell-based layout systems

B Preas - Proceedings of the 24th ACM/IEEE Design Automation …, 1987 - dl.acm.org
Cell-based layout systems are widely used for automatic physical design of large digital
systems. Standard cell and gate array layout systems are reaching a state of maturity: small …

[PDF][PDF] Accurate prediction of physical design characteristics for random logic

M Pedram, B Preas - … Conference on Computer Design: VLSI in …, 1989 - mpedram.com
In this paper, we present an accurate model for prediction of physical desi n characteristics,
such as interconnection lengths anf layout areas, for standard cell layouts. This model …