A 0.5-V 25-MHz 1-mW 256-kb MTCMOS/SOI SRAM for solar-power-operated portable personal digital equipment-sure write operation by using step-down negatively …
N Shibata, H Kiya, S Kurita, H Okamoto… - IEEE Journal of Solid …, 2006 - ieeexplore.ieee.org
Multithreshold-voltage CMOS (MTCMOS) technology has a great advantage in that it provides
high-speed operation with low supply voltages of less than 1 V. A logic gate with low-V/…
high-speed operation with low supply voltages of less than 1 V. A logic gate with low-V/…
Current sense amplifiers for low-voltage memories
N Shibata - IEICE transactions on electronics, 1996 - search.ieice.org
The principles and design of current sense amplifiers for low-voltage MOS memories are
described. The low input impedance of current sense amplifiers is explained using a simple …
described. The low input impedance of current sense amplifiers is explained using a simple …
A current-sensed high-speed and low-power first-in-first-out memory using a wordline/bitline-swapped dual-port SRAM cell
N Shibata, M Watanabe… - IEEE Journal of Solid-State …, 2002 - ieeexplore.ieee.org
First-in-first-out (FIFO) data storages are in great demand for telecommunication LSIs. This
paper presents high-speed and low-power CMOS memory techniques specialized for FIFO …
paper presents high-speed and low-power CMOS memory techniques specialized for FIFO …
A step-down boosted-wordline scheme for 1-V battery-operated fast SRAM's
H Morimura, N Shibata - IEEE Journal of Solid-State Circuits, 1998 - ieeexplore.ieee.org
Fast and low-power circuit techniques for battery-operated low-voltage SRAM's are described.
To shorten the read access time with low power dissipation, the step-down boosted-…
To shorten the read access time with low power dissipation, the step-down boosted-…
Megabit-class size-configurable 250-MHz SRAM macrocells with a squashed-memory-cell architecture
N Shibata, H INOKAWA, K TOKUNAGA… - IEICE transactions on …, 1999 - search.ieice.org
High-speed and low-power techniques are described for megabit-class size-configurable
CMOS SRAM macrocells. To shorten the design turn-around-time, the methodology of abutting …
CMOS SRAM macrocells. To shorten the design turn-around-time, the methodology of abutting …
Signal-to-noise ratio analysis of a noisy-channel model for a capacitively coupled personal area network
A Sasaki, T Ishihara, N Shibata… - IEEE transactions on …, 2012 - ieeexplore.ieee.org
We investigated a noisy-channel model for a capacitively coupled personal area network (CC-PAN)
with megahertz-frequency signals. The new channel model describes the influence …
with megahertz-frequency signals. The new channel model describes the influence …
Two-chip MPEG-2 video encoder
…, T Minami, R Kusaba, T Ikenaga, N Shibata… - IEEE Micro, 1996 - ieeexplore.ieee.org
Our two-chip, real time, MPEG-2, simple-profile-at-main-level encoder supports NTSC 4:2:0
video signals with only three external memories. We have developed a compact encoder …
video signals with only three external memories. We have developed a compact encoder …
1-V 100-MHz embedded SRAM techniques for battery-operated MTCMOS/SIMOX ASICs
N Shibata, H Morimura… - IEEE Journal of Solid-State …, 2000 - ieeexplore.ieee.org
Multithreshold-voltage CMOS (MTCMOS) has a great advantage of lowering physical
threshold voltages without increasing the power dissipation due to large subthreshold leakage …
threshold voltages without increasing the power dissipation due to large subthreshold leakage …
A 1-V, 10-MHz, 3.5-mW, 1-Mb MTCMOS SRAM: with charge-recycling input/output buffers
N Shibata, H Morimura… - IEEE Journal of Solid …, 1999 - ieeexplore.ieee.org
This paper presents a high-speed and low-power SRAM for portable equipment, which is
operated by a single battery cell of around 1 V. Its memory cells are made up of high-threshold-…
operated by a single battery cell of around 1 V. Its memory cells are made up of high-threshold-…
A 2-V 300-MHz 1-Mb current-sensed double-density SRAM for low-power 0.3-/spl mu/m CMOS/SIMOX ASICs
N Shibata, M Wantanabe, Y Sato… - IEEE Journal of Solid …, 2001 - ieeexplore.ieee.org
Silicon-on-insulator (SOI) devices have the great advantage of high operating speed in low
supply voltages. This paper presents megabit-class high-speed and low-power embedded …
supply voltages. This paper presents megabit-class high-speed and low-power embedded …