User profiles for M. H. Vasantha

Vasantha MH

National Institute of Technology Goa
Verified email at nitgoa.ac.in
Cited by 965

Performance enhancement of novel InAs/Si hetero double-gate tunnel FET using Gaussian doping

…, YBN Kumar, MH Vasantha - IEEE Transactions on …, 2015 - ieeexplore.ieee.org
In this paper, for the first time, an InAs/Si heterojunction double-gate tunnel FET (H-DGTFET)
has been analyzed for low-power high-frequency applications. For this purpose, the …

Design and analysis of multiplier using approximate 4-2 compressor

KM Reddy, MH Vasantha, YBN Kumar… - AEU-International Journal …, 2019 - Elsevier
Approximate computing has received significant attention as an attractive paradigm for error-tolerant
applications to reduce the power consumption, delay and area with some trade-off …

A gracefully degrading and energy-efficient fault tolerant NoC using spare core

BNK Reddy, MH Vasantha… - 2016 IEEE computer …, 2016 - ieeexplore.ieee.org
Reliability is a significant strategy concern for modern day multi core embedded systems.
On chip communicating systems are vulnerable to permanent network faults and transient …

A 1-V, 3-GHz strong-arm latch voltage comparator for high speed applications

…, YBN Kumar, MH Vasantha… - … on Circuits and …, 2020 - ieeexplore.ieee.org
This brief proposes a parallel path based strong-arm latch voltage comparator. The proposed
architecture improves the speed performance when compared to the conventional strong-…

Communication energy constrained spare core on NoC

BNK Reddy, MH Vasantha, YBN Kumar… - 2015 6th international …, 2015 - ieeexplore.ieee.org
In multi-processor system on-chip, each processor produces and consumes high data.
Hence, transporting of data becomes crucial in MPSOC. Therefore, Network on Chip (NoC) is …

Approximate radix-8 booth multiplier for low power and high speed applications

B Boro, KM Reddy, YBN Kumar, MH Vasantha - Microelectronics Journal, 2020 - Elsevier
Approximate computing is an emerging circuit design technique which reduce the energy
consumption with acceptable degradation in accuracy. Three approximate radix-8 Booth …

Design of approximate booth squarer for error-tolerant computing

KM Reddy, MH Vasantha, YBN Kumar… - IEEE Transactions on …, 2020 - ieeexplore.ieee.org
To explore the benefits of approximate computing, this article proposes an approximate partial
product generator for squarer (APPGS). Using APPGS, three designs of approximate radix…

A 1.2 V, highly reliable RHBD 10T SRAM cell for aerospace application

…, RK Siddharth, MH Vasantha… - IEEE Transactions on …, 2021 - ieeexplore.ieee.org
In this article, a highly reliable radiation-hardened-by-design (RHBD) 10T static random
access memory (SRAM) cell is proposed. In space, the impact of alpha particles and cosmic …

Inexact signed Wallace tree multiplier design using reversible logic

…, PJ Edavoor, YBN Kumar, MH Vasantha - IEEE …, 2021 - ieeexplore.ieee.org
This paper proposes an inexact Baugh-Wooley Wallace tree multiplier with novel architecture
for inexact 4:2 compressor optimised for realisation using reversible logic. The proposed …

A fine grained position for modular core on NoC

BNK Reddy, MH Vasantha, YBN Kumar… - … and Control (IC4), 2015 - ieeexplore.ieee.org
In this paper, the problem of spare core position when faults occur at core on Network on Chip
(NoC) is proposed. More precisely, a fine grained spare core position is proposed, which …