Design and analysis of four port router for network-on-chip applications

Multiport Router: Design and Verification for On-Chip

VAR Sushmitha, T Mendez - Data Processing and Networking …, 2025 - books.google.com
The integration of several processing resources onto a single chip results from
advancements in VLSI technology. The design adopts packet-switched networks with …
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Multiport Router: Design and Verification for On-Chip Applications

Sushmitha, VA Raj, T Mendez, SG Nayak - International Conference on …, 2024 - Springer
The integration of several processing resources onto a single chip results from
advancements in VLSI technology. The design adopts packet-switched networks with …
Save Cite Related articles

An Optimized Buffer Architecture for Network on Chip Router

A Ramachandran, M Vinodhini - International Conference on Data …, 2023 - Springer
As device dimensions are shrinking at a very fast pace in compliance with Moore's law, it
becomes extremely important to analyze and research any possibility of optimization in …
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