WO2021093056A1 - Combined sensor and method for manufacture thereof - Google Patents
Combined sensor and method for manufacture thereof Download PDFInfo
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- WO2021093056A1 WO2021093056A1 PCT/CN2019/123539 CN2019123539W WO2021093056A1 WO 2021093056 A1 WO2021093056 A1 WO 2021093056A1 CN 2019123539 W CN2019123539 W CN 2019123539W WO 2021093056 A1 WO2021093056 A1 WO 2021093056A1
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C3/00—Assembling of devices or systems from individually processed components
- B81C3/001—Bonding of two components
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0064—Packages or encapsulation for protecting against electromagnetic or electrostatic interferences
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
- B81B7/0074—3D packaging, i.e. encapsulation containing one or several MEMS devices arranged in planes non-parallel to the mounting board
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01D—MEASURING NOT SPECIALLY ADAPTED FOR A SPECIFIC VARIABLE; ARRANGEMENTS FOR MEASURING TWO OR MORE VARIABLES NOT COVERED IN A SINGLE OTHER SUBCLASS; TARIFF METERING APPARATUS; MEASURING OR TESTING NOT OTHERWISE PROVIDED FOR
- G01D21/00—Measuring or testing not otherwise provided for
- G01D21/02—Measuring two or more variables by means not covered by a single other subclass
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- the invention relates to the technical field of sensors, in particular to a combined sensor and a manufacturing method thereof.
- combined sensors are generally manufactured by separately manufacturing multiple sensors and integrating them on the same substrate using multi-chip assembly technology.
- Such combined sensors often have low integration, large footprint, long interconnection lines, and relatively high reliability. Low problem.
- micro-nano processing technology is usually used to fabricate multiple chips on the same wafer.
- the integration is high, which reduces the occupied area and the complexity of the fabrication process, and improves the reliability.
- This combination sensor The distance between two adjacent sensors is small, and the electromagnetic interference is large.
- the main purpose of the present invention is to provide a combined sensor and a manufacturing method thereof, aiming to provide a combined sensor that is miniaturized, integrated and has less electromagnetic interference.
- the combined sensor proposed by the present invention includes a first wafer, a second wafer, and a plurality of sensors.
- the first wafer and the second wafer are bonded and connected, and surround
- the sensors are combined to form a plurality of independent sensors, and an electrical isolation structure is arranged between two adjacent sensors.
- the combined sensor includes at least two of an inertial sensor, a humidity sensor, an air pressure sensor, and a temperature sensor.
- the first wafer and the second wafer both include two silicon dioxide layers and a silicon layer, and the silicon layer is arranged between the two silicon dioxide layers,
- the electrical isolation structure penetrates at least two silicon dioxide layers opposite to the first wafer and the second wafer.
- one of the first wafer and the second wafer is provided with a gold bonding encapsulation layer, the other of which is provided with a tin bonding encapsulation layer, the gold bonding encapsulation layer and the tin
- the bonding encapsulation layer is bonded and connected.
- the present invention also provides a method for manufacturing a combined sensor, which includes the following steps:
- Etching the first wafer and the second wafer respectively to obtain a plurality of electrical isolation structures one of the electrical isolation structures is located between two adjacent sensor structures;
- the first wafer and the second wafer are aligned, bonded and packaged by a bonding process to obtain a combined sensor.
- the step of aligning and bonding the first wafer and the second wafer by using a bonding process includes:
- the gold bonding encapsulation layer and the tin bonding encapsulation layer are aligned and bonded and packaged.
- the plurality of sensor structures include an inertial sensor structure, a humidity sensor structure, an air pressure sensor structure, and a temperature sensor structure.
- the inertial sensor structure is manufactured by the following steps:
- the first wafer and the second wafer are respectively etched to obtain two vibrator structures, and the vibrator structures are located between the two first electrode layers.
- the humidity sensor structure is manufactured by the following steps:
- a patterned deposition operation is performed on the surface of the first wafer to obtain a first dielectric strain layer.
- the first dielectric strain layer is located between the two second electrode layers and is located on the first Depositing a third electrode layer on the surface of the dielectric strain layer facing away from the first wafer;
- Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a first sensing channel.
- the first sensing channel penetrates the second wafer and corresponds to the moisture sensing layer.
- the air pressure sensor structure is manufactured by the following steps:
- Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a second sensing channel corresponding to the second dielectric strain layer.
- the temperature sensor structure is manufactured by the following steps:
- the temperature sensor cavity is located between the two sixth electrode layers, and conductive particles are injected into the temperature sensor cavity;
- a patterned deposition operation is performed on the surface of the second wafer to obtain a third dielectric strain layer.
- the third dielectric strain layer is located between the two sixth electrode layers and is located on the third
- a seventh electrode layer is deposited on the surface of the dielectric strain layer;
- Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a third sensing channel.
- the third sensing channel penetrates the second wafer.
- the first wafer and the second wafer are bonded and connected, and the two are enclosed to form a plurality of independent sensors, and at the same time, an electrical isolation structure is arranged between two adjacent sensors. Since the combined sensor of the present invention is fabricated on two wafer-level wafer structures, miniaturization and integration can be achieved in this way. In addition, multiple sensors are independent of each other and shielded from each other by an electrical isolation structure, which can improve the anti-electromagnetic interference ability of the sensors.
- FIG. 1 is a schematic cross-sectional structure diagram of an embodiment of the combined sensor of the present invention
- Figure 2 is a partial cross-sectional view of the structure of the combined sensor
- Figure 3 is another partial cross-sectional structure diagram of the combined sensor
- FIG. 4 is a schematic diagram of a step flow diagram of an embodiment of a manufacturing method of a combined sensor of the present invention
- FIG. 5 is a schematic diagram of the detailed flow of step S40 in FIG. 4;
- Fig. 6 is a schematic flow diagram of the manufacturing steps of the inertial sensor structure
- FIG. 7 is a schematic diagram of the manufacturing steps of the humidity sensor structure
- FIG. 8 is a schematic diagram of the manufacturing steps of the air pressure sensor structure
- Figure 9 is a schematic flow diagram of the manufacturing steps of the temperature sensor structure.
- the terms “connected”, “fixed”, etc. should be understood in a broad sense.
- “fixed” can be a fixed connection, a detachable connection, or a whole; It can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be an internal communication between two components or an interaction relationship between two components, unless specifically defined otherwise.
- the specific meanings of the above-mentioned terms in the present invention can be understood according to specific situations.
- the present invention proposes a combined sensor 100.
- the combined sensor 100 includes a first wafer 10, a second wafer 20 and a plurality of sensors, the first wafer 10 and the second wafer
- the wafer 20 is bonded and connected to form a plurality of independent sensors, and an electrical isolation structure 30 is provided between two adjacent sensors.
- the first wafer 10 and the second wafer 20 are both wafer-level structures, and the two are connected by bonding.
- the first wafer 10 and the second wafer 20 are enclosed to form a plurality of sensors, and the plurality of sensors are formed independently of each other, that is, each sensor has an independent cavity structure. In this way, miniaturization and integration of the combined sensor 100 can be achieved.
- an electrical isolation structure 30 is provided between two adjacent sensors.
- the electrical isolation structure 30 is generally a trench structure.
- the electrical isolation structure 30 is provided through the first wafer 10 and the second wafer 20, which can effectively avoid Electromagnetic interference between sensors.
- the technical solution of the present invention is that the first wafer 10 and the second wafer 20 are bonded and connected, and the two are enclosed to form a plurality of independent sensors, and two adjacent sensors are at the same time.
- An electrical isolation structure 30 is provided therebetween. Since the combined sensor 100 of the present invention is fabricated on a wafer-level wafer structure, miniaturization and integration can be achieved. In addition, multiple sensors are independent of each other and shielded from each other by the electrical isolation structure 30, so that the anti-electromagnetic interference capability of the sensors can be improved.
- the combined sensor 100 includes at least two of an inertial sensor 40, a humidity sensor 50, an air pressure sensor 60, and a temperature sensor 70.
- the inertial sensor 40 is mainly used to detect acceleration, tilt, impact, vibration, rotation and multi-degree-of-freedom motion.
- the humidity sensor 50 is mainly used to detect the humidity of the air
- the air pressure sensor 60 is used to detect atmospheric pressure
- the temperature sensor 70 is used to detect temperature.
- the combination sensor 100 may be two combinations, three combinations, or four combinations.
- the combined sensor 100 here is a combination of an inertial sensor 40, a humidity sensor 50, an air pressure sensor 60, and a temperature sensor 70, which can realize multiple functions of detecting acceleration, humidity, air pressure, and temperature at the same time.
- both the first wafer 10 and the second wafer 20 include two silicon dioxide layers 11 and a silicon layer 12, the silicon layer 12 is arranged between the two silicon dioxide layers 11, and is electrically isolated
- the structure 30 penetrates at least two silicon dioxide layers 11 opposite to the first wafer 10 and the second wafer 20.
- the first wafer 10 and the second wafer 20 have the same structure and size, and both include a silicon dioxide layer 11, a silicon layer 12, and a silicon dioxide layer 11 stacked in sequence.
- the electrical isolation structure 30 is a trench structure, which may be penetrated through the two silicon dioxide layers 11 opposite to the first wafer 10 and the second wafer 20, or may be penetrated through the first wafer 10 and the second wafer 20.
- the two silicon dioxide layers 11 and the two silicon layers 12 opposite to the second wafer 20 can isolate the electromagnetic interference of the sensor more effectively.
- the first wafer 10 is provided with a first trench 31, the first trench 31 is penetrated through the silicon dioxide layer 11 and the silicon layer 12, and the second wafer 20 is provided with a second trench 32.
- the second trench 32 penetrates the silicon dioxide layer 11 and the silicon layer 12, and the first trench 31 and the second trench 32 surround the electrical isolation structure 30.
- one of the first wafer 10 and the second wafer 20 is provided with a gold bonding encapsulation layer 13, and the other is provided with a tin bonding encapsulation layer 21, and the gold bonding encapsulation
- the layer 13 is bonded and connected to the tin bonding encapsulation layer 21.
- the gold-tin bonding process is used to bond and connect the first wafer 10 and the second wafer 20.
- the surface of the first wafer 10 is provided with a gold bonding encapsulation layer 13, and the surface of the second wafer 20
- the tin bonding encapsulation layer 21 is provided, and the gold bonding encapsulation layer 13 and the tin bonding encapsulation layer 21 are bonded to complete the bonding connection of the first wafer 10 and the second wafer 20.
- the gold bonding package layer 13 is disposed on the surface of the second wafer 20 and the tin bonding package layer 21 is disposed on the surface of the first wafer 10.
- the present invention also provides a manufacturing method of the combined sensor 100 for manufacturing the combined sensor 100 as described above.
- the manufacturing method of the combined sensor 100 includes the following steps:
- the first wafer 10 and the second wafer 20 are aligned, bonded and packaged by a bonding process to obtain a combined sensor 100.
- the first wafer 10 and the second wafer 20 are both wafer-level structures, and both include a silicon dioxide layer 11, a silicon layer 12, and a silicon dioxide layer 11 stacked in sequence.
- the first wafer 10 and the second wafer 20 are respectively etched to obtain a plurality of sensor structures; then the first wafer 10 and the second wafer 20 are respectively etched to obtain a plurality of electrical isolation structures 30.
- the electrical isolation structure 30 is a trench structure, and the electrical isolation structure 30 is located between two adjacent sensor structures.
- the bonding process is used to align the first wafer 10 and the second wafer 20 with the bonding and packaging operation, and the combined sensor 100 can be obtained.
- the combined sensor 100 is composed of the first wafer 10 and the second wafer.
- the sheet 20 is composed of a plurality of sensors enclosed and formed.
- the combined sensor 100 manufactured by the present invention has the advantages of miniaturization, integration, multi-function, and small electromagnetic interference.
- the electrical isolation structure 30 is mainly manufactured by the following steps: the silicon dioxide layer 11 of the first wafer 10 is etched using RIE etching and deep silicon etching techniques to obtain a plurality of first trenches 31, a first trench 31 is located between two adjacent sensor structures.
- the first trench 31 penetrates the silicon dioxide layer 11 and penetrates the silicon layer 12.
- the same method is used to etch the silicon dioxide layer 11 of the second wafer 20 to produce a plurality of second trenches 32.
- a second trench 32 is located between two adjacent sensor structures.
- the second trench 32 penetrates the silicon dioxide layer 11 and penetrates the silicon layer 12.
- the first wafer 10 and the second wafer 20 are aligned with the bonding package, and the first trench 31 and the second trench 32 are enclosed to form an electrical isolation structure 30.
- step S40 it includes:
- step S401 and step S402 are aligned and packaged using a wafer-level gold-tin bonding process, which can make the manufactured composite sensor 100 more reliable and stable. It should be noted that the sequence of step S401 and step S402 is not limited, and can also be operated at the same time.
- the multiple sensor structures include an inertial sensor 40 structure, a humidity sensor 50 structure, an air pressure sensor 60 structure, and a temperature sensor 70 structure.
- multiple sensor structures include the inertial sensor 40 structure, the humidity sensor 50 structure, the air pressure sensor 60 structure, and the temperature sensor 70 structure.
- the combined sensor 100 finally produced is a combination of these four sensors, that is, a multifunctional integrated sensor. It can realize the multi-function detection of acceleration, humidity, air pressure and temperature at the same time.
- the structure of the inertial sensor 40 is manufactured by the following steps:
- Step S211 performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two first electrode layers 41;
- step S212 the first wafer 10 and the second wafer 20 are respectively etched to obtain two vibrator structures 42 respectively, and the vibrator structures 42 are located between the two first electrode layers 41.
- first, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two first electrode layers 41.
- two first electrode layers 41 are deposited on the surface of the second wafer 20. ⁇ 41 ⁇ Electrode layer 41.
- RIE etching and deep silicon etching techniques are used to etch the silicon dioxide layer 11 and the silicon layer 12 of the first wafer 10 to obtain the vibrator structure 42 of the inertial sensor 40.
- the vibrator structure 42 is located between the two first electrode layers 41
- the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched to obtain the oscillator structure 42.
- Such an operation can obtain the structure of the inertial sensor 40, and subsequently align the etched structure to the package to obtain the inertial sensor 40.
- the humidity sensor 50 is manufactured by the following steps:
- Step S221, performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two second electrode layers 51;
- Step S222 performing a patterned deposition operation on the surface of the first wafer 10 to obtain a first dielectric strain layer 52, the first dielectric strain layer 52 being located between the two second electrode layers 51 , And deposit a third electrode layer 53 on the surface of the first dielectric strain layer 52 facing away from the first wafer 10;
- Step S223, depositing and corroding a moisture-sensitive material on the surface of the third electrode layer 53 facing away from the first dielectric strain layer 52 to obtain the moisture-sensitive layer 54;
- step S224 etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a first sensing channel 55.
- the first sensing channel 55 penetrates the second wafer 20 and corresponds to The moisture-sensitive layer 54.
- pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two second electrode layers 51; then, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology.
- the first dielectric strain layer 52 is located between the two second electrode layers 51.
- a thin film deposition technique is used on the surface of the first dielectric strain layer 52 facing away from the first wafer 10
- the third electrode layer 53 is obtained.
- a humidity sensitive material is deposited and etched on the surface of the third electrode layer 53 facing away from the first dielectric strain layer 52 to obtain a humidity sensitive layer 54 where the humidity sensitive material may be polyimide, porous silicon or other humidity sensitive materials .
- two second electrode layers 51 are fabricated on the surface of the second wafer 20.
- the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a first sensing channel 55 for sensing changes in external humidity.
- the first sensing channel 55 It penetrates the second wafer 20 and corresponds to the moisture sensitive layer 54. In this way, the structure of the humidity sensor 50 can be obtained, and the humidity sensor 50 can be obtained by subsequently aligning the etched structure with the package.
- the air pressure sensor 60 is manufactured by the following steps:
- Step S231 performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two fourth electrode layers 61;
- step S232 a patterned deposition operation is performed on the surfaces of the first wafer 10 and the second wafer 20, respectively, to obtain a second dielectric strain layer 62, where the second dielectric strain layer 62 is located Between the two fourth electrode layers 61, and deposit a fifth electrode layer 63 on the surface of each of the dielectric strained layers;
- step S233 etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a second sensing channel 64 corresponding to the second dielectric strain layer 62.
- pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two fourth electrode layers 61; then, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology, Obtain the second dielectric strain layer 62, the second dielectric strain layer 62 is located between the two fourth electrode layers 61, and then use the thin film deposition technology on the surface of the second dielectric strain layer 62 facing away from the first wafer 10 Deposited, the fifth electrode layer 63 is obtained.
- two fourth electrode layers 61, a second dielectric strain layer 62 and a fifth electrode are fabricated on the surface of the second wafer 20.
- the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a second sensing channel 64 for sensing changes in external air pressure.
- the structure of the air pressure sensor 60 can be obtained.
- the structure of the air pressure sensor 60 is a closed and high-aspect-ratio capacitive structure, and subsequently the etched structure is aligned and packaged to obtain the air pressure sensor 60.
- the structure of the temperature sensor 70 is manufactured by the following steps:
- Step S241 performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20, respectively, to obtain two sixth electrode layers 71
- step S242 the first wafer 10 is etched to obtain a temperature sensor 70 cavity.
- the cavity is located between the two sixth electrode layers 71, and conductive is injected into the temperature sensor 70 cavity. particle;
- step S243 a patterned deposition operation is performed on the surface of the second wafer 20 to obtain a third dielectric strain layer 73, which is located between the two sixth electrode layers 71 , And deposit a seventh electrode layer 74 on the surface of the third dielectric strain layer 73;
- step S244 etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a seventh electrode layer 75 that penetrates the second wafer 20.
- pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two sixth electrode layers 71; then, the silicon of the first wafer 10 is processed by RIE etching and deep silicon etching technology. The layer 12 and the silicon dioxide layer 11 are etched to obtain a temperature sensor cavity 72, and conductive particles are injected into the temperature sensor 70 cavity to increase the conductivity of silicon.
- two sixth electrode layers 71 are fabricated on the surface of the second wafer 20, and pattern deposition is performed on the surface of the second wafer 20 using thin film deposition technology to obtain a third dielectric strain layer 73 .
- the third dielectric strain layer 73 is located between the two sixth electrode layers 71, and then a thin film deposition technique is used to deposit the third dielectric strain layer 73 on the surface of the second wafer 20 away from the second wafer 20 to obtain the seventh electrode layer 74 .
- the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a seventh electrode layer 75, which is used to sense changes in external temperature. Pierce through the second wafer 20. In this way, the structure of the temperature sensor 70 can be obtained, and then the etched structure is aligned with the package to obtain the temperature sensor 70.
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Abstract
Provided are a combined sensor (100) and a method for manufacture thereof. The combined sensor (100) comprises a first wafer (10), a second wafer (20), and a plurality of sensors; the first wafer (10) and the second wafer (20) are bonded and connected, and enclosed to form a plurality of independent sensors; an electrical isolation structure (30) is arranged between two adjacent sensors so as to provide a miniaturized, integrated, and combined sensor (100) having less electromagnetic interference.
Description
本发明涉及传感器技术领域,特别涉及一种组合传感器及其制作方法。The invention relates to the technical field of sensors, in particular to a combined sensor and a manufacturing method thereof.
相关技术中,组合传感器一般是将多个传感器分别制造后,并利用多芯片组装技术集成到同一基板,这种组合传感器往往存在集成度较低,占用面积大、互联线路较长、可靠性较低的问题。为了解决此问题,通常采用微纳加工工艺将多种芯片制作在同一晶圆上,集成度较高,减小了占用面积和制作工艺的复杂性,提高了可靠性,但是这种组合传感器中的相邻两传感器的间距较小,电磁干扰较大。In related technologies, combined sensors are generally manufactured by separately manufacturing multiple sensors and integrating them on the same substrate using multi-chip assembly technology. Such combined sensors often have low integration, large footprint, long interconnection lines, and relatively high reliability. Low problem. In order to solve this problem, micro-nano processing technology is usually used to fabricate multiple chips on the same wafer. The integration is high, which reduces the occupied area and the complexity of the fabrication process, and improves the reliability. However, in this combination sensor The distance between two adjacent sensors is small, and the electromagnetic interference is large.
上述内容仅用于辅助理解本发明的技术方案,并不代表承认上述内容是现有技术。The above content is only used to assist the understanding of the technical solution of the present invention, and does not mean that the above content is recognized as prior art.
发明内容Summary of the invention
本发明的主要目的是提供一种组合传感器及其制作方法,旨在提供一个小型化、集成化且电磁干扰较小的组合传感器。The main purpose of the present invention is to provide a combined sensor and a manufacturing method thereof, aiming to provide a combined sensor that is miniaturized, integrated and has less electromagnetic interference.
为实现上述目的,本发明提出的组合传感器,包括第一晶圆片、第二晶圆片及多个传感器,所述第一晶圆片和所述第二晶圆片键合连接,并围合形成相互独立的多个所述传感器,相邻两个所述传感器之间设置有一电隔离结构。In order to achieve the above objective, the combined sensor proposed by the present invention includes a first wafer, a second wafer, and a plurality of sensors. The first wafer and the second wafer are bonded and connected, and surround The sensors are combined to form a plurality of independent sensors, and an electrical isolation structure is arranged between two adjacent sensors.
可选地,所述组合传感器包括惯性传感器、湿度传感器、气压传感器及温度传感器中的至少两个。Optionally, the combined sensor includes at least two of an inertial sensor, a humidity sensor, an air pressure sensor, and a temperature sensor.
可选地,所述第一晶圆片和所述第二晶圆片均包括两层二氧化硅层和一层硅层,所述硅层设于两层所述二氧化硅层之间,所述电隔离结构至少穿设于所述第一晶圆片和所述第二晶圆片相对的两层二氧化硅层。Optionally, the first wafer and the second wafer both include two silicon dioxide layers and a silicon layer, and the silicon layer is arranged between the two silicon dioxide layers, The electrical isolation structure penetrates at least two silicon dioxide layers opposite to the first wafer and the second wafer.
可选地,所述第一晶圆片和所述第二晶圆片的其中之一设置有金键合封 装层,其中之另一设置有锡键合封装层,所述金键合封装层与所述锡键合封装层键合连接。Optionally, one of the first wafer and the second wafer is provided with a gold bonding encapsulation layer, the other of which is provided with a tin bonding encapsulation layer, the gold bonding encapsulation layer and the tin The bonding encapsulation layer is bonded and connected.
本发明还提出了一种组合传感器的制作方法,所述组合传感器的制作方法包括以下步骤:The present invention also provides a method for manufacturing a combined sensor, which includes the following steps:
提供第一晶圆片和第二晶圆片;Provide the first wafer and the second wafer;
对所述第一晶圆片和所述第二晶圆片分别进行蚀刻,得到多个传感器结构;Etching the first wafer and the second wafer respectively to obtain a plurality of sensor structures;
对所述第一晶圆片和所述第二晶圆片分别进行蚀刻,得到多个电隔离结构,一所述电隔离结构位于相邻两所述传感器结构之间;Etching the first wafer and the second wafer respectively to obtain a plurality of electrical isolation structures, one of the electrical isolation structures is located between two adjacent sensor structures;
采用键合工艺将所述第一晶圆片和所述第二晶圆片进行对准键合封装,得到组合传感器。The first wafer and the second wafer are aligned, bonded and packaged by a bonding process to obtain a combined sensor.
可选地,在采用键合工艺将所述第一晶圆片和所述第二晶圆片进行对准键合封装的步骤中,包括:Optionally, the step of aligning and bonding the first wafer and the second wafer by using a bonding process includes:
在第一晶圆片的表面进行图形化金属化电镀金,得到金键合封装层;Perform patterned metallization and electroplating of gold on the surface of the first wafer to obtain a gold bonding package layer;
在第二晶圆片的表面进行图形化金属化电镀锡,得到锡键合封装层;Pattern metallization and electroplating tin on the surface of the second wafer to obtain a tin-bonded packaging layer;
将所述金键合封装层和所述锡键合封装层进行对准并键合封装。The gold bonding encapsulation layer and the tin bonding encapsulation layer are aligned and bonded and packaged.
可选地,多个所述传感器结构包括惯性传感器结构、湿度传感器结构、气压传感器结构及温度传感器结构。Optionally, the plurality of sensor structures include an inertial sensor structure, a humidity sensor structure, an air pressure sensor structure, and a temperature sensor structure.
可选地,所述惯性传感器结构是由以下步骤制作得到:Optionally, the inertial sensor structure is manufactured by the following steps:
在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第一电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two first electrode layers;
对所述第一晶圆片和所述第二晶圆片分别进行蚀刻操作,分别得到两个振子结构,所述振子结构位于两个所述第一电极层之间。The first wafer and the second wafer are respectively etched to obtain two vibrator structures, and the vibrator structures are located between the two first electrode layers.
可选地,所述湿度传感器结构是由以下步骤制作得到:Optionally, the humidity sensor structure is manufactured by the following steps:
在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第二电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two second electrode layers;
在所述第一晶圆片的表面进行图形化沉积操作,得到第一介电应变层,所述第一介电应变层位于两个所述第二电极层之间,并在所述第一介电应变层背向所述第一晶圆片的表面沉积第三电极层;A patterned deposition operation is performed on the surface of the first wafer to obtain a first dielectric strain layer. The first dielectric strain layer is located between the two second electrode layers and is located on the first Depositing a third electrode layer on the surface of the dielectric strain layer facing away from the first wafer;
在所述第三电极层背向所述第一介电应变层的表面沉积并腐蚀湿敏材 料,得到感湿层;Depositing and corroding a moisture-sensitive material on the surface of the third electrode layer facing away from the first dielectric strain layer to obtain a moisture-sensitive layer;
在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第一感应通道,所述第一感应通道贯穿所述第二晶圆片,并对应于所述感湿层。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a first sensing channel. The first sensing channel penetrates the second wafer and corresponds to the moisture sensing layer.
可选地,所述气压传感器结构是由以下步骤制作得到:Optionally, the air pressure sensor structure is manufactured by the following steps:
在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第四电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two fourth electrode layers;
在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,分别得到第二介电应变层,所述第二介电应变层位于两个所述第四电极层之间,并在每一所述介电应变层的表面沉积一第五电极层;Perform patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain a second dielectric strain layer, the second dielectric strain layer being located on the two fourth electrodes Between the layers, and deposit a fifth electrode layer on the surface of each of the dielectric strained layers;
在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第二感应通道,所述第二感应通道对应所述第二介电应变层。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a second sensing channel corresponding to the second dielectric strain layer.
可选地,所述温度传感器结构是由以下步骤制作得到:Optionally, the temperature sensor structure is manufactured by the following steps:
在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第六电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two sixth electrode layers;
对所述第一晶圆片进行蚀刻,得到温度传感器腔体,所述温度传感器腔体位于两个所述第六电极层之间,并向所述温度传感器腔体内注入导电粒子;Etching the first wafer to obtain a temperature sensor cavity, the temperature sensor cavity is located between the two sixth electrode layers, and conductive particles are injected into the temperature sensor cavity;
在所述第二晶圆片的表面进行图形化沉积操作,得到第三介电应变层,所述第三介电应变层位于两个所述第六电极层之间,并在所述第三介电应变层的表面沉积第七电极层;A patterned deposition operation is performed on the surface of the second wafer to obtain a third dielectric strain layer. The third dielectric strain layer is located between the two sixth electrode layers and is located on the third A seventh electrode layer is deposited on the surface of the dielectric strain layer;
在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第三感应通道,所述第三感应通道贯穿所述第二晶圆片。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a third sensing channel. The third sensing channel penetrates the second wafer.
本发明的技术方案,通过将第一晶圆片和第二晶圆片键合连接,且二者围合形成相互独立的多个传感器,同时相邻两个传感器之间设置电隔离结构。由于本发明的组合传感器是制作在两个晶圆级圆片结构上,如此可以实现小型化和集成化。并且,多个传感器相互独立并通过电隔离结构相互屏蔽,如此可以提高传感器的抗电磁干扰能力。In the technical scheme of the present invention, the first wafer and the second wafer are bonded and connected, and the two are enclosed to form a plurality of independent sensors, and at the same time, an electrical isolation structure is arranged between two adjacent sensors. Since the combined sensor of the present invention is fabricated on two wafer-level wafer structures, miniaturization and integration can be achieved in this way. In addition, multiple sensors are independent of each other and shielded from each other by an electrical isolation structure, which can improve the anti-electromagnetic interference ability of the sensors.
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图示出的结构获得其他的附图。In order to explain the embodiments of the present invention or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only These are some embodiments of the present invention. For those of ordinary skill in the art, without creative work, other drawings can be obtained based on the structure shown in these drawings.
图1为本发明组合传感器一实施例的剖视结构示意图;FIG. 1 is a schematic cross-sectional structure diagram of an embodiment of the combined sensor of the present invention;
图2为组合传感器的一局部剖视结构示意图;Figure 2 is a partial cross-sectional view of the structure of the combined sensor;
图3为组合传感器的另一局部剖视结构示意图;Figure 3 is another partial cross-sectional structure diagram of the combined sensor;
图4为本发明组合传感器的制作方法一实施例的步骤流程示意图;4 is a schematic diagram of a step flow diagram of an embodiment of a manufacturing method of a combined sensor of the present invention;
图5为图4中步骤S40的细化流程示意图;FIG. 5 is a schematic diagram of the detailed flow of step S40 in FIG. 4;
图6为惯性传感器结构的制作步骤流程示意图;Fig. 6 is a schematic flow diagram of the manufacturing steps of the inertial sensor structure;
图7为湿度传感器结构的制作步骤流程示意图;FIG. 7 is a schematic diagram of the manufacturing steps of the humidity sensor structure;
图8为气压传感器结构的制作步骤流程示意图;FIG. 8 is a schematic diagram of the manufacturing steps of the air pressure sensor structure;
图9为温度传感器结构的制作步骤流程示意图;。Figure 9 is a schematic flow diagram of the manufacturing steps of the temperature sensor structure;.
附图标号说明:Attached icon number description:
标号Label |
名称 | 标号Label | 名称name | |
100100 |
组合传感器 |
5252 |
第一介电应变层First |
|
1010 |
第一晶圆片 |
5353 |
第三电极层 |
|
1111 | 二氧化硅层Silicon dioxide layer | 5454 |
感湿层Moisture |
|
1212 |
硅层 |
5555 |
第一感应通道The |
|
1313 |
金键合封装层Gold |
6060 |
气压传感器 |
|
2020 |
第二晶圆片 |
6161 | 第四电极层Fourth electrode layer | |
21twenty one |
锡键合封装层Tin |
6262 |
第二介电应变层Second |
|
3030 |
电隔离结构 |
6363 |
第五电极层 |
|
3131 |
第一沟槽 |
6464 |
第二感应通道 |
|
3232 |
第二沟槽 |
7070 |
温度传感器 |
|
4040 |
惯性传感器 |
7171 |
第六电极层 |
|
4141 |
第一电极层 |
7272 |
温度传感器腔体 |
|
4242 |
振子结构 |
7373 | 第三介电应变层Third dielectric strain layer |
5050 |
湿度传感器 |
7474 |
第七电极层 |
5151 |
第二电极层 |
7575 | 第三感应通道The third sensing channel |
本发明目的的实现、功能特点及优点将结合实施例,参照附图做进一步说明。The realization of the objectives, functional characteristics and advantages of the present invention will be further described in conjunction with the embodiments and with reference to the accompanying drawings.
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative work shall fall within the protection scope of the present invention.
需要说明,本发明实施例中所有方向性指示(诸如上、下、左、右、前、后……)仅用于解释在某一特定姿态(如附图所示)下各部件之间的相对位置关系、运动情况等,如果该特定姿态发生改变时,则该方向性指示也相应地随之改变。It should be noted that all directional indications (such as up, down, left, right, front, back...) in the embodiments of the present invention are only used to explain the relationship between components in a specific posture (as shown in the accompanying drawings). If the relative position relationship, movement situation, etc. change, the directional indication will change accordingly.
另外,在本发明中如涉及“第一”、“第二”等的描述仅用于描述目的,而不能理解为指示或暗示其相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括至少一个该特征。在本发明的描述中,“多个”的含义是至少两个,例如两个,三个等,除非另有明确具体的限定。In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined with "first" and "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, "plurality" means at least two, such as two, three, etc., unless otherwise specifically defined.
在本发明中,除非另有明确的规定和限定,术语“连接”、“固定”等应做广义理解,例如,“固定”可以是固定连接,也可以是可拆卸连接,或成一体;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系,除非另有明确的限定。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明中的具体含义。In the present invention, unless otherwise clearly specified and limited, the terms "connected", "fixed", etc. should be understood in a broad sense. For example, "fixed" can be a fixed connection, a detachable connection, or a whole; It can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, and it can be an internal communication between two components or an interaction relationship between two components, unless specifically defined otherwise. For those of ordinary skill in the art, the specific meanings of the above-mentioned terms in the present invention can be understood according to specific situations.
另外,本发明各个实施例之间的技术方案可以相互结合,但是必须是以本领域普通技术人员能够实现为基础,当技术方案的结合出现相互矛盾或无法实现时应当认为这种技术方案的结合不存在,也不在本发明要求的保护范 围之内。In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but they must be based on what can be achieved by a person of ordinary skill in the art. When the combination of technical solutions is contradictory or cannot be achieved, it should be considered that this combination of technical solutions It does not exist and does not fall within the scope of protection claimed by the present invention.
本发明提出一种组合传感器100。The present invention proposes a combined sensor 100.
请参阅图1至图3,在本发明组合传感器100一实施例中,组合传感器100包括第一晶圆片10、第二晶圆片20及多个传感器,第一晶圆片10和第二晶圆片20键合连接,并围合形成相互独立的多个传感器,且相邻两个传感器之间设置有一电隔离结构30。1 to 3, in an embodiment of the combined sensor 100 of the present invention, the combined sensor 100 includes a first wafer 10, a second wafer 20 and a plurality of sensors, the first wafer 10 and the second wafer The wafer 20 is bonded and connected to form a plurality of independent sensors, and an electrical isolation structure 30 is provided between two adjacent sensors.
这里第一晶圆片10和第二晶圆片20均为晶圆级结构,二者采用键合连接。第一晶圆片10和第二晶圆片20围合形成多个传感器,多个传感器分别相互独立成型,也即每一个传感器具有独立腔体结构。如此,可以实现组合传感器100的小型化和集成化。并且,相邻两传感器之间设置有电隔离结构30,电隔离结构30一般为沟槽结构,电隔离结构30贯穿第一晶圆片10和第二晶圆片20设置,这样可以有效地避免传感器之间的电磁干扰。Here, the first wafer 10 and the second wafer 20 are both wafer-level structures, and the two are connected by bonding. The first wafer 10 and the second wafer 20 are enclosed to form a plurality of sensors, and the plurality of sensors are formed independently of each other, that is, each sensor has an independent cavity structure. In this way, miniaturization and integration of the combined sensor 100 can be achieved. In addition, an electrical isolation structure 30 is provided between two adjacent sensors. The electrical isolation structure 30 is generally a trench structure. The electrical isolation structure 30 is provided through the first wafer 10 and the second wafer 20, which can effectively avoid Electromagnetic interference between sensors.
因此,可以理解的,本发明的技术方案,通过将第一晶圆片10和第二晶圆片20键合连接,且二者围合形成相互独立的多个传感器,同时相邻两个传感器之间设置电隔离结构30。由于本发明的组合传感器100是制作在晶圆级圆片结构上,则可以实现小型化和集成化。并且,多个传感器相互独立并通过电隔离结构30相互屏蔽,如此可以提高传感器的抗电磁干扰能力。Therefore, it is understandable that the technical solution of the present invention is that the first wafer 10 and the second wafer 20 are bonded and connected, and the two are enclosed to form a plurality of independent sensors, and two adjacent sensors are at the same time. An electrical isolation structure 30 is provided therebetween. Since the combined sensor 100 of the present invention is fabricated on a wafer-level wafer structure, miniaturization and integration can be achieved. In addition, multiple sensors are independent of each other and shielded from each other by the electrical isolation structure 30, so that the anti-electromagnetic interference capability of the sensors can be improved.
可选地,组合传感器100包括惯性传感器40、湿度传感器50、气压传感器60及温度传感器70中的至少两个。Optionally, the combined sensor 100 includes at least two of an inertial sensor 40, a humidity sensor 50, an air pressure sensor 60, and a temperature sensor 70.
这里惯性传感器40主要用于检测加速度、倾斜、冲击、振动、旋转及多自由度运动。湿度传感器50主要用于检测空气的湿度,气压传感器60是用于检测大气压力,温度传感器70是用于检测温度。组合传感器100可以是其中两种组合、三种组合或四种组合。Here, the inertial sensor 40 is mainly used to detect acceleration, tilt, impact, vibration, rotation and multi-degree-of-freedom motion. The humidity sensor 50 is mainly used to detect the humidity of the air, the air pressure sensor 60 is used to detect atmospheric pressure, and the temperature sensor 70 is used to detect temperature. The combination sensor 100 may be two combinations, three combinations, or four combinations.
可选地,这里组合传感器100为惯性传感器40、湿度传感器50、气压传感器60及温度传感器70组合,可以实现同时检测加速度、湿度、气压及温度的多功能。Optionally, the combined sensor 100 here is a combination of an inertial sensor 40, a humidity sensor 50, an air pressure sensor 60, and a temperature sensor 70, which can realize multiple functions of detecting acceleration, humidity, air pressure, and temperature at the same time.
可选地,第一晶圆片10和第二晶圆片20均包括两层二氧化硅层11和一层硅层12,硅层12设于两层二氧化硅层11之间,电隔离结构30至少穿设于第一晶圆片10和第二晶圆片20相对的两层二氧化硅层11。这里第一晶 圆片10和第二晶圆片20的结构和尺寸相同,均包括依次层叠的二氧化硅层11、硅层12及二氧化硅层11。电隔离结构30为沟槽结构,可以是穿设于第一晶圆片10和第二晶圆片20相对的两层二氧化硅层11,也可以是穿设于第一晶圆片10和第二晶圆片20相对的两层二氧化硅层11和两层硅层12,这样可以更有效地隔离传感器的电磁干扰。可以理解的,第一晶圆片10设有第一沟槽31,第一沟槽31穿设于二氧化硅层11和硅层12,第二晶圆片20设有第二沟槽32,第二沟槽32穿设于二氧化硅层11和硅层12,第一沟槽31和第二沟槽32围合形成电隔离结构30。Optionally, both the first wafer 10 and the second wafer 20 include two silicon dioxide layers 11 and a silicon layer 12, the silicon layer 12 is arranged between the two silicon dioxide layers 11, and is electrically isolated The structure 30 penetrates at least two silicon dioxide layers 11 opposite to the first wafer 10 and the second wafer 20. Here, the first wafer 10 and the second wafer 20 have the same structure and size, and both include a silicon dioxide layer 11, a silicon layer 12, and a silicon dioxide layer 11 stacked in sequence. The electrical isolation structure 30 is a trench structure, which may be penetrated through the two silicon dioxide layers 11 opposite to the first wafer 10 and the second wafer 20, or may be penetrated through the first wafer 10 and the second wafer 20. The two silicon dioxide layers 11 and the two silicon layers 12 opposite to the second wafer 20 can isolate the electromagnetic interference of the sensor more effectively. It can be understood that the first wafer 10 is provided with a first trench 31, the first trench 31 is penetrated through the silicon dioxide layer 11 and the silicon layer 12, and the second wafer 20 is provided with a second trench 32. The second trench 32 penetrates the silicon dioxide layer 11 and the silicon layer 12, and the first trench 31 and the second trench 32 surround the electrical isolation structure 30.
在本发明的一实施例中,第一晶圆片10和所述第二晶圆片20的其中之一设置有金键合封装层13,其中之另一设置有锡键合封装层21,金键合封装层13与锡键合封装层21键合连接。In an embodiment of the present invention, one of the first wafer 10 and the second wafer 20 is provided with a gold bonding encapsulation layer 13, and the other is provided with a tin bonding encapsulation layer 21, and the gold bonding encapsulation The layer 13 is bonded and connected to the tin bonding encapsulation layer 21.
这里采用金锡键合工艺将第一晶圆片10和第二晶圆片20进行键合连接,可以理解的,第一晶圆片10的表面设置金键合封装层13,第二晶圆片20的表面设置锡键合封装层21,将金键合封装层13和锡键合封装层21进行进行键合操作便可完成第一晶圆片10和第二晶圆片20的键合连接。当然地,也可以是金键合封装层13设置于第二晶圆片20的表面,锡键合封装层21设置于第一晶圆片10的表面。Here, the gold-tin bonding process is used to bond and connect the first wafer 10 and the second wafer 20. It can be understood that the surface of the first wafer 10 is provided with a gold bonding encapsulation layer 13, and the surface of the second wafer 20 The tin bonding encapsulation layer 21 is provided, and the gold bonding encapsulation layer 13 and the tin bonding encapsulation layer 21 are bonded to complete the bonding connection of the first wafer 10 and the second wafer 20. Of course, it is also possible that the gold bonding package layer 13 is disposed on the surface of the second wafer 20 and the tin bonding package layer 21 is disposed on the surface of the first wafer 10.
本发明还提出一种组合传感器100的制作方法,用于制作如前所述的组合传感器100。The present invention also provides a manufacturing method of the combined sensor 100 for manufacturing the combined sensor 100 as described above.
请参阅图4,在本发明组合传感器100的一实施例中,组合传感器100的制作方法包括以下步骤:Referring to FIG. 4, in an embodiment of the combined sensor 100 of the present invention, the manufacturing method of the combined sensor 100 includes the following steps:
S10,提供第一晶圆片10和第二晶圆片20;S10, providing a first wafer 10 and a second wafer 20;
S20,对第一晶圆片10和第二晶圆片20分别进行蚀刻,得到多个传感器结构;S20, etching the first wafer 10 and the second wafer 20 respectively to obtain multiple sensor structures;
S30,对所述第一晶圆片10和所述第二晶圆片20分别进行蚀刻,得到多个电隔离结构30,一所述电隔离结构30位于相邻两所述传感器结构之间;S30, etching the first wafer 10 and the second wafer 20 respectively to obtain a plurality of electrical isolation structures 30, one of which is located between two adjacent sensor structures;
S40,采用键合工艺将所述第一晶圆片10和所述第二晶圆片20进行对准键合封装,得到组合传感器100。S40, the first wafer 10 and the second wafer 20 are aligned, bonded and packaged by a bonding process to obtain a combined sensor 100.
这里第一晶圆片10和第二晶圆片20均为晶圆级结构,均包括依次层叠的二氧化硅层11、硅层12及二氧化硅层11。首先分别对第一晶圆片10和第二晶圆片20进行蚀刻,得到多个传感器结构;然后分别对第一晶圆片10和第二晶圆片20进行蚀刻,得到多个电隔离结构30,电隔离结构30为沟槽结构,且电隔离结构30位于相邻两个传感器结构之间。最后采用键合工艺将第一晶圆片10和第二晶圆片20对准键合封装操作,便可得到组合传感器100,该组合传感器100是由第一晶圆片10和第二晶圆片20围合形成的多个传感器组成。本发明制作得到的组合传感器100具有小型化、集成化、多功能化及电磁干扰小的优点。Here, the first wafer 10 and the second wafer 20 are both wafer-level structures, and both include a silicon dioxide layer 11, a silicon layer 12, and a silicon dioxide layer 11 stacked in sequence. Firstly, the first wafer 10 and the second wafer 20 are respectively etched to obtain a plurality of sensor structures; then the first wafer 10 and the second wafer 20 are respectively etched to obtain a plurality of electrical isolation structures 30. The electrical isolation structure 30 is a trench structure, and the electrical isolation structure 30 is located between two adjacent sensor structures. Finally, the bonding process is used to align the first wafer 10 and the second wafer 20 with the bonding and packaging operation, and the combined sensor 100 can be obtained. The combined sensor 100 is composed of the first wafer 10 and the second wafer. The sheet 20 is composed of a plurality of sensors enclosed and formed. The combined sensor 100 manufactured by the present invention has the advantages of miniaturization, integration, multi-function, and small electromagnetic interference.
这里电隔离结构30主要由以下步骤制作得到:采用RIE蚀刻和深硅蚀刻技术对第一晶圆片10的二氧化硅层11进行蚀刻,得到多个第一沟槽31,一第一沟槽31位于相邻两个传感器结构之间,可选地,第一沟槽31贯穿二氧化硅层11并穿设于硅层12。采用同样的方法在第二晶圆片20的二氧化硅层11进行蚀刻,制作得到多个第二沟槽32,一第二沟槽32位于相邻两个传感器结构之间,可选地,第二沟槽32贯穿二氧化硅层11并穿设于硅层12。最后将第一晶圆片10和第二晶圆片20对准键合封装,第一沟槽31和第二沟槽32围合便可形成电隔离结构30。Here, the electrical isolation structure 30 is mainly manufactured by the following steps: the silicon dioxide layer 11 of the first wafer 10 is etched using RIE etching and deep silicon etching techniques to obtain a plurality of first trenches 31, a first trench 31 is located between two adjacent sensor structures. Optionally, the first trench 31 penetrates the silicon dioxide layer 11 and penetrates the silicon layer 12. The same method is used to etch the silicon dioxide layer 11 of the second wafer 20 to produce a plurality of second trenches 32. A second trench 32 is located between two adjacent sensor structures. Optionally, The second trench 32 penetrates the silicon dioxide layer 11 and penetrates the silicon layer 12. Finally, the first wafer 10 and the second wafer 20 are aligned with the bonding package, and the first trench 31 and the second trench 32 are enclosed to form an electrical isolation structure 30.
进一步地,请参阅图5,在步骤S40中,包括:Further, referring to FIG. 5, in step S40, it includes:
S401,在第一晶圆片10的表面进行图形化金属化电镀金,得到金键合封装层13;S401, performing patterned metallization and electroplating gold on the surface of the first wafer 10 to obtain a gold bonding package layer 13;
S402,在第二晶圆片20的表面进行图形化金属化电镀锡,得到锡键合封装层21;S402, performing patterned metallization and electroplating tin on the surface of the second wafer 20 to obtain a tin-bonded packaging layer 21;
S403,将所述金键合封装层13和所述锡键合封装层21进行对准并键合封装。S403, aligning the gold bonding encapsulation layer 13 and the tin bonding encapsulation layer 21 and bonding and packaging.
这里采用晶圆级金锡键合工艺将第一晶圆片10和第二晶圆片20进行对准封装,可使得制作得到的组合传感器100可靠性和稳定性较好。需要说明的是,步骤S401和步骤S402的前后顺序不作限制,也可以同时操作。Here, the first wafer 10 and the second wafer 20 are aligned and packaged using a wafer-level gold-tin bonding process, which can make the manufactured composite sensor 100 more reliable and stable. It should be noted that the sequence of step S401 and step S402 is not limited, and can also be operated at the same time.
在本发明的一实施例中,多个传感器结构包括惯性传感器40结构、湿度传感器50结构、气压传感器60结构及温度传感器70结构。In an embodiment of the present invention, the multiple sensor structures include an inertial sensor 40 structure, a humidity sensor 50 structure, an air pressure sensor 60 structure, and a temperature sensor 70 structure.
这里多个传感器结构包括惯性传感器40结构、湿度传感器50结构、气 压传感器60结构及温度传感器70结构,这样最终制作得到的组合传感器100为这四种传感器的组合,即为多功能集成式传感器,可以实现同时检测加速度、湿度、气压及温度的多功能。Here, multiple sensor structures include the inertial sensor 40 structure, the humidity sensor 50 structure, the air pressure sensor 60 structure, and the temperature sensor 70 structure. The combined sensor 100 finally produced is a combination of these four sensors, that is, a multifunctional integrated sensor. It can realize the multi-function detection of acceleration, humidity, air pressure and temperature at the same time.
在本发明的一实施例中,请参阅图6,惯性传感器40结构是由以下步骤制作得到:In an embodiment of the present invention, referring to FIG. 6, the structure of the inertial sensor 40 is manufactured by the following steps:
步骤S211,在第一晶圆片10和所述第二晶圆片20的表面分别进行图形化沉积操作,均得到两个第一电极层41;Step S211, performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two first electrode layers 41;
步骤S212,对第一晶圆片10和第二晶圆片20分别进行蚀刻操作,分别得到两个振子结构42,振子结构42位于两个第一电极层41之间。In step S212, the first wafer 10 and the second wafer 20 are respectively etched to obtain two vibrator structures 42 respectively, and the vibrator structures 42 are located between the two first electrode layers 41.
具体地,首先,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到两个第一电极层41,同样的方法,在第二晶圆片20的表面沉积得到两个第一电极层41。然后采用RIE蚀刻和深硅蚀刻技术对第一晶圆片10的二氧化硅层11和硅层12进行蚀刻,得到惯性传感器40的振子结构42,振子结构42位于两个第一电极层41之间;同样地方法对第二晶圆片20的二氧化硅层11和硅层12进行蚀刻,得到振子结构42。如此的操作便可得到惯性传感器40结构,后续将蚀刻后的结构对准封装便可得到惯性传感器40。Specifically, first, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two first electrode layers 41. In the same way, two first electrode layers 41 are deposited on the surface of the second wafer 20.极层41。 Electrode layer 41. Then RIE etching and deep silicon etching techniques are used to etch the silicon dioxide layer 11 and the silicon layer 12 of the first wafer 10 to obtain the vibrator structure 42 of the inertial sensor 40. The vibrator structure 42 is located between the two first electrode layers 41 In the same way, the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched to obtain the oscillator structure 42. Such an operation can obtain the structure of the inertial sensor 40, and subsequently align the etched structure to the package to obtain the inertial sensor 40.
在本发明的一实施例中,请参阅图7,湿度传感器50是由以下步骤制作得到:In an embodiment of the present invention, referring to FIG. 7, the humidity sensor 50 is manufactured by the following steps:
步骤S221,在所述第一晶圆片10和所述第二晶圆片20的表面分别进行图形化沉积操作,均得到两个第二电极层51;Step S221, performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two second electrode layers 51;
步骤S222,在所述第一晶圆片10的表面进行图形化沉积操作,得到第一介电应变层52,所述第一介电应变层52位于两个所述第二电极层51之间,并在所述第一介电应变层52背向所述第一晶圆片10的表面沉积第三电极层53;Step S222, performing a patterned deposition operation on the surface of the first wafer 10 to obtain a first dielectric strain layer 52, the first dielectric strain layer 52 being located between the two second electrode layers 51 , And deposit a third electrode layer 53 on the surface of the first dielectric strain layer 52 facing away from the first wafer 10;
步骤S223,在所述第三电极层53背向所述第一介电应变层52的表面沉积并腐蚀湿敏材料,得到感湿层54;Step S223, depositing and corroding a moisture-sensitive material on the surface of the third electrode layer 53 facing away from the first dielectric strain layer 52 to obtain the moisture-sensitive layer 54;
步骤S224,在所述第二晶圆片20背向所述传感器结构的表面进行蚀刻,得到第一感应通道55,所述第一感应通道55贯穿所述第二晶圆片20,并对应于所述感湿层54。In step S224, etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a first sensing channel 55. The first sensing channel 55 penetrates the second wafer 20 and corresponds to The moisture-sensitive layer 54.
具体地,首先,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到两个第二电极层51;然后,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到第一介电应变层52,第一介电应变层52位于两个第二电极层51之间,接着利用薄膜沉积技术在第一介电应变层52背向第一晶圆片10的表面沉积,得到第三电极层53。之后,在第三电极层53背向第一介电应变层52的表面沉积并腐蚀湿敏材料,得到感湿层54,这里湿敏材料可以为聚酰亚胺、多孔硅或其他湿敏材料。同样的方法,在第二晶圆片20的表面制作两个第二电极层51。并且,采用RIE蚀刻和深硅蚀刻技术对第二晶圆片20的二氧化硅层11和硅层12进行蚀刻,得到第一感应通道55,用于感应外界的湿度变化,第一感应通道55贯穿第二晶圆片20,并对应感湿层54。如此便可得到湿度传感器50结构,后续将蚀刻后的结构对准封装便可得到湿度传感器50。Specifically, firstly, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two second electrode layers 51; then, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology. Obtain the first dielectric strain layer 52. The first dielectric strain layer 52 is located between the two second electrode layers 51. Then, a thin film deposition technique is used on the surface of the first dielectric strain layer 52 facing away from the first wafer 10 After deposition, the third electrode layer 53 is obtained. Afterwards, a humidity sensitive material is deposited and etched on the surface of the third electrode layer 53 facing away from the first dielectric strain layer 52 to obtain a humidity sensitive layer 54 where the humidity sensitive material may be polyimide, porous silicon or other humidity sensitive materials . In the same way, two second electrode layers 51 are fabricated on the surface of the second wafer 20. In addition, the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a first sensing channel 55 for sensing changes in external humidity. The first sensing channel 55 It penetrates the second wafer 20 and corresponds to the moisture sensitive layer 54. In this way, the structure of the humidity sensor 50 can be obtained, and the humidity sensor 50 can be obtained by subsequently aligning the etched structure with the package.
在本发明的一实施例中,请参阅图8,气压传感器60是由以下步骤制作得到:In an embodiment of the present invention, referring to FIG. 8, the air pressure sensor 60 is manufactured by the following steps:
步骤S231,在所述第一晶圆片10和所述第二晶圆片20的表面分别进行图形化沉积操作,均得到两个第四电极层61;Step S231, performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20 respectively to obtain two fourth electrode layers 61;
步骤S232,在所述第一晶圆片10和所述第二晶圆片20的表面分别进行图形化沉积操作,分别得到第二介电应变层62,所述第二介电应变层62位于两个所述第四电极层61之间,并在每一所述介电应变层的表面沉积一第五电极层63;In step S232, a patterned deposition operation is performed on the surfaces of the first wafer 10 and the second wafer 20, respectively, to obtain a second dielectric strain layer 62, where the second dielectric strain layer 62 is located Between the two fourth electrode layers 61, and deposit a fifth electrode layer 63 on the surface of each of the dielectric strained layers;
步骤S233,在所述第二晶圆片20背向所述传感器结构的表面进行蚀刻,得到第二感应通道64,所述第二感应通道64对应所述第二介电应变层62。In step S233, etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a second sensing channel 64 corresponding to the second dielectric strain layer 62.
具体地,首先,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到两个第四电极层61;然后,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到第二介电应变层62,第二介电应变层62位于两个第四电极层61之间,接着利用薄膜沉积技术在第二介电应变层62背向第一晶圆片10的表面沉积,得到第五电极层63。同样的方法,在第二晶圆片20的表面制作两个第四电极层61、第二介电应变层62及第五电极。并且,采用RIE蚀刻和深硅蚀刻技术对第二晶圆片20的二氧化硅层11和硅层12进 行蚀刻,得到第二感应通道64,用于感应外界的气压变化,第二感应通道64对应于第二介电应变层62。如此便可得到气压传感器60结构,该气压传感器60结构为密闭且高深宽比的电容结构,后续将蚀刻后的结构对准封装便可得到气压传感器60。Specifically, firstly, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two fourth electrode layers 61; then, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology, Obtain the second dielectric strain layer 62, the second dielectric strain layer 62 is located between the two fourth electrode layers 61, and then use the thin film deposition technology on the surface of the second dielectric strain layer 62 facing away from the first wafer 10 Deposited, the fifth electrode layer 63 is obtained. In the same way, two fourth electrode layers 61, a second dielectric strain layer 62 and a fifth electrode are fabricated on the surface of the second wafer 20. In addition, the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a second sensing channel 64 for sensing changes in external air pressure. Corresponds to the second dielectric strain layer 62. In this way, the structure of the air pressure sensor 60 can be obtained. The structure of the air pressure sensor 60 is a closed and high-aspect-ratio capacitive structure, and subsequently the etched structure is aligned and packaged to obtain the air pressure sensor 60.
在本发明的一实施例中,请参阅图9,温度传感器70结构是由以下步骤制作得到:In an embodiment of the present invention, referring to FIG. 9, the structure of the temperature sensor 70 is manufactured by the following steps:
步骤S241,在所述第一晶圆片10和所述第二晶圆片20的表面分别进行图形化沉积操作,均得到两个第六电极层71Step S241, performing patterned deposition operations on the surfaces of the first wafer 10 and the second wafer 20, respectively, to obtain two sixth electrode layers 71
步骤S242,对所述第一晶圆片10进行蚀刻,得到温度传感器70腔体,所述腔体位于两个所述第六电极层71之间,并向所述温度传感器70腔体内注入导电粒子;In step S242, the first wafer 10 is etched to obtain a temperature sensor 70 cavity. The cavity is located between the two sixth electrode layers 71, and conductive is injected into the temperature sensor 70 cavity. particle;
步骤S243,在所述第二晶圆片20的表面进行图形化沉积操作,得到第三介电应变层73,所述第三介电应变层73位于两个所述第六电极层71之间,并在所述第三介电应变层73的表面沉积第七电极层74;In step S243, a patterned deposition operation is performed on the surface of the second wafer 20 to obtain a third dielectric strain layer 73, which is located between the two sixth electrode layers 71 , And deposit a seventh electrode layer 74 on the surface of the third dielectric strain layer 73;
步骤S244,在所述第二晶圆片20背向所述传感器结构的表面进行蚀刻,得到第七电极层75,并贯穿所述第二晶圆片20。In step S244, etching is performed on the surface of the second wafer 20 facing away from the sensor structure to obtain a seventh electrode layer 75 that penetrates the second wafer 20.
具体地,首先,利用薄膜沉积技术在第一晶圆片10的表面进行图形沉积,得到两个第六电极层71;然后,采用RIE蚀刻和深硅蚀刻技术对第一晶圆片10的硅层12和二氧化硅层11进行蚀刻,得到温度传感器腔体72,并向该温度传感器70腔体内注入导电粒子,以增加硅的导电性。采用同样的方法,在第二晶圆片20的表面制作两个第六电极层71,并且,利用薄膜沉积技术在第二晶圆片20的表面进行图形沉积,得到第三介电应变层73,第三介电应变层73位于两个第六电极层71之间,接着利用薄膜沉积技术在第三介电应变层73背向第二晶圆片20的表面沉积,得到第七电极层74。最后,采用RIE蚀刻和深硅蚀刻技术对第二晶圆片20的二氧化硅层11和硅层12进行蚀刻,得到第七电极层75,用于感应外界的温度变化,第七电极层75贯穿第二晶圆片20。如此便可得到温度传感器70结构,后续将蚀刻后的结构对准封装便可得到温度传感器70。Specifically, first, pattern deposition is performed on the surface of the first wafer 10 using thin film deposition technology to obtain two sixth electrode layers 71; then, the silicon of the first wafer 10 is processed by RIE etching and deep silicon etching technology. The layer 12 and the silicon dioxide layer 11 are etched to obtain a temperature sensor cavity 72, and conductive particles are injected into the temperature sensor 70 cavity to increase the conductivity of silicon. Using the same method, two sixth electrode layers 71 are fabricated on the surface of the second wafer 20, and pattern deposition is performed on the surface of the second wafer 20 using thin film deposition technology to obtain a third dielectric strain layer 73 , The third dielectric strain layer 73 is located between the two sixth electrode layers 71, and then a thin film deposition technique is used to deposit the third dielectric strain layer 73 on the surface of the second wafer 20 away from the second wafer 20 to obtain the seventh electrode layer 74 . Finally, the silicon dioxide layer 11 and the silicon layer 12 of the second wafer 20 are etched using RIE etching and deep silicon etching techniques to obtain a seventh electrode layer 75, which is used to sense changes in external temperature. Pierce through the second wafer 20. In this way, the structure of the temperature sensor 70 can be obtained, and then the etched structure is aligned with the package to obtain the temperature sensor 70.
以上所述仅为本发明的优选实施例,并非因此限制本发明的专利范围, 凡是在本发明的发明构思下,利用本发明说明书及附图内容所作的等效结构变换,或直接/间接运用在其他相关的技术领域均包括在本发明的专利保护范围内。The above descriptions are only the preferred embodiments of the present invention, and do not limit the scope of the present invention. Under the inventive concept of the present invention, any equivalent structural transformations made by using the contents of the description and drawings of the present invention, or direct/indirect use All other related technical fields are included in the scope of patent protection of the present invention.
Claims (11)
- 一种组合传感器,其特征在于,所述组合传感器包括第一晶圆片、第二晶圆片及多个传感器,所述第一晶圆片和所述第二晶圆片键合连接,并围合形成相互独立的多个所述传感器,相邻两个所述传感器之间设置有一电隔离结构。A combined sensor, characterized in that the combined sensor includes a first wafer, a second wafer and a plurality of sensors, the first wafer and the second wafer are bonded and connected, and A plurality of said sensors are enclosed to form mutually independent, and an electrical isolation structure is arranged between two adjacent sensors.
- 如权利要求1所述的组合传感器,其特征在于,所述组合传感器包括惯性传感器、湿度传感器、气压传感器及温度传感器中的至少两个。The combined sensor according to claim 1, wherein the combined sensor includes at least two of an inertial sensor, a humidity sensor, an air pressure sensor, and a temperature sensor.
- 如权利要求1所述的组合传感器,其特征在于,所述第一晶圆片和所述第二晶圆片均包括两层二氧化硅层和一层硅层,所述硅层设于两层所述二氧化硅层之间,所述电隔离结构至少穿设于所述第一晶圆片和所述第二晶圆片相对的两层二氧化硅层。The combined sensor according to claim 1, wherein the first wafer and the second wafer each comprise two silicon dioxide layers and one silicon layer, and the silicon layers are arranged on the two silicon dioxide layers. Between the silicon dioxide layers, the electrical isolation structure penetrates at least two silicon dioxide layers opposite to the first wafer and the second wafer.
- 如权利要求1至3中任一项所述的组合传感器,其特征在于,所述第一晶圆片和所述第二晶圆片的其中之一设置有金键合封装层,其中之另一设置有锡键合封装层,所述金键合封装层与所述锡键合封装层键合连接。The combined sensor according to any one of claims 1 to 3, wherein one of the first wafer and the second wafer is provided with a gold bonding encapsulation layer, and the other is provided with a gold bonding encapsulation layer There is a tin bonding encapsulation layer, and the gold bonding encapsulation layer is bonded and connected to the tin bonding encapsulation layer.
- 一种组合传感器的制作方法,其特征在于,所述组合传感器的制作方法包括以下步骤:A manufacturing method of a combined sensor, characterized in that, the manufacturing method of the combined sensor includes the following steps:提供第一晶圆片和第二晶圆片;Provide the first wafer and the second wafer;对所述第一晶圆片和所述第二晶圆片分别进行蚀刻,得到多个传感器结构;Etching the first wafer and the second wafer respectively to obtain a plurality of sensor structures;对所述第一晶圆片和所述第二晶圆片分别进行蚀刻,得到多个电隔离结构,一所述电隔离结构位于相邻两所述传感器结构之间;Etching the first wafer and the second wafer respectively to obtain a plurality of electrical isolation structures, one of the electrical isolation structures is located between two adjacent sensor structures;采用键合工艺将所述第一晶圆片和所述第二晶圆片进行对准键合封装,得到组合传感器。The first wafer and the second wafer are aligned, bonded and packaged by a bonding process to obtain a combined sensor.
- 如权利要求5所述的组合传感器的制作方法,其特征在于,在采用 键合工艺将所述第一晶圆片和所述第二晶圆片进行对准键合封装的步骤中,包括:The method for manufacturing a combined sensor according to claim 5, wherein the step of performing alignment bonding and packaging of the first wafer and the second wafer by a bonding process comprises:在第一晶圆片的表面进行图形化金属化电镀金,得到金键合封装层;Perform patterned metallization and electroplating of gold on the surface of the first wafer to obtain a gold bonding package layer;在第二晶圆片的表面进行图形化金属化电镀锡,得到锡键合封装层;Pattern metallization and electroplating tin on the surface of the second wafer to obtain a tin-bonded packaging layer;将所述金键合封装层和所述锡键合封装层进行对准并键合封装。The gold bonding encapsulation layer and the tin bonding encapsulation layer are aligned and bonded and packaged.
- 如权利要求5所述的组合传感器的制作方法,其特征在于,多个所述传感器结构包括惯性传感器结构、湿度传感器结构、气压传感器结构及温度传感器结构。5. The method of manufacturing a combined sensor according to claim 5, wherein the plurality of sensor structures include an inertial sensor structure, a humidity sensor structure, an air pressure sensor structure, and a temperature sensor structure.
- 如权利要求7所述的组合传感器的制作方法,其特征在于,所述惯性传感器结构是由以下步骤制作得到:8. The manufacturing method of the combined sensor according to claim 7, wherein the inertial sensor structure is manufactured by the following steps:在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第一电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two first electrode layers;对所述第一晶圆片和所述第二晶圆片分别进行蚀刻操作,分别得到两个振子结构,所述振子结构位于两个所述第一电极层之间。The first wafer and the second wafer are respectively etched to obtain two vibrator structures, and the vibrator structures are located between the two first electrode layers.
- 如权利要求7所述的组合传感器的制作方法,其特征在于,所述湿度传感器结构是由以下步骤制作得到:8. The method for manufacturing a combined sensor according to claim 7, wherein the humidity sensor structure is manufactured by the following steps:在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第二电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two second electrode layers;在所述第一晶圆片的表面进行图形化沉积操作,得到第一介电应变层,所述第一介电应变层位于两个所述第二电极层之间,并在所述第一介电应变层背向所述第一晶圆片的表面沉积第三电极层;A patterned deposition operation is performed on the surface of the first wafer to obtain a first dielectric strain layer. The first dielectric strain layer is located between the two second electrode layers and is located on the first Depositing a third electrode layer on the surface of the dielectric strain layer facing away from the first wafer;在所述第三电极层背向所述第一介电应变层的表面沉积并腐蚀湿敏材料,得到感湿层;Depositing and corroding a moisture-sensitive material on the surface of the third electrode layer facing away from the first dielectric strain layer to obtain a moisture-sensitive layer;在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第一感应通道,所述第一感应通道贯穿所述第二晶圆片,并对应于所述感湿层。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a first sensing channel. The first sensing channel penetrates the second wafer and corresponds to the moisture sensing layer.
- 如权利要求7所述的组合传感器的制作方法,其特征在于,所述气 压传感器结构是由以下步骤制作得到:The manufacturing method of the combined sensor according to claim 7, wherein the structure of the air pressure sensor is manufactured by the following steps:在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第四电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two fourth electrode layers;在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,分别得到第二介电应变层,所述第二介电应变层位于两个所述第四电极层之间,并在每一所述介电应变层的表面沉积一第五电极层;Perform patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain a second dielectric strain layer, the second dielectric strain layer being located on the two fourth electrodes Between the layers, and deposit a fifth electrode layer on the surface of each of the dielectric strained layers;在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第二感应通道,所述第二感应通道对应所述第二介电应变层。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a second sensing channel corresponding to the second dielectric strain layer.
- 如权利要求7所述的组合传感器的制作方法,其特征在于,所述温度传感器结构是由以下步骤制作得到:8. The manufacturing method of the combined sensor according to claim 7, wherein the temperature sensor structure is manufactured by the following steps:在所述第一晶圆片和所述第二晶圆片的表面分别进行图形化沉积操作,均得到两个第六电极层;Performing patterned deposition operations on the surfaces of the first wafer and the second wafer respectively to obtain two sixth electrode layers;对所述第一晶圆片进行蚀刻,得到温度传感器腔体,所述温度传感器腔体位于两个所述第六电极层之间,并向所述温度传感器腔体内注入导电粒子;Etching the first wafer to obtain a temperature sensor cavity, the temperature sensor cavity is located between the two sixth electrode layers, and conductive particles are injected into the temperature sensor cavity;在所述第二晶圆片的表面进行图形化沉积操作,得到第三介电应变层,所述第三介电应变层位于两个所述第六电极层之间,并在所述第三介电应变层的表面沉积第七电极层;A patterned deposition operation is performed on the surface of the second wafer to obtain a third dielectric strain layer. The third dielectric strain layer is located between the two sixth electrode layers and is located on the third A seventh electrode layer is deposited on the surface of the dielectric strain layer;在所述第二晶圆片背向所述传感器结构的表面进行蚀刻,得到第三感应通道,所述第三感应通道贯穿所述第二晶圆片。Etching is performed on the surface of the second wafer that faces away from the sensor structure to obtain a third sensing channel. The third sensing channel penetrates the second wafer.
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