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WO2013113730A1 - Procédé de production de plaques minces en matières de faible ductilité, au moyen de contraintes mécaniques induites par la température, en utilisant des films de polymère préfabriqués - Google Patents

Procédé de production de plaques minces en matières de faible ductilité, au moyen de contraintes mécaniques induites par la température, en utilisant des films de polymère préfabriqués Download PDF

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Publication number
WO2013113730A1
WO2013113730A1 PCT/EP2013/051746 EP2013051746W WO2013113730A1 WO 2013113730 A1 WO2013113730 A1 WO 2013113730A1 EP 2013051746 W EP2013051746 W EP 2013051746W WO 2013113730 A1 WO2013113730 A1 WO 2013113730A1
Authority
WO
WIPO (PCT)
Prior art keywords
starting material
film
prefabricated
layer
composite structure
Prior art date
Application number
PCT/EP2013/051746
Other languages
German (de)
English (en)
Inventor
Lukas Lichtensteiger
Felix Budde
Original Assignee
Siltectra Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltectra Gmbh filed Critical Siltectra Gmbh
Publication of WO2013113730A1 publication Critical patent/WO2013113730A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support

Definitions

  • wafers In many technical fields (e.g., microelectronics or photovoltaic technology), materials such as e.g. Silicon, germanium or sapphire are often used in the form of thin discs and plates (so-called wafers). By default, such wafers are currently produced by sawing from an ingot, resulting in relatively large material losses (“kerf-loss"). Because the used
  • kerf-free wafering Particularly attractive for such a wafer production without kerf-loss (kerf-free wafering") appear methods that do without conventional sawing and, for example. by using temperature-induced voltages can directly split thin wafers from a thicker workpiece. This includes in particular
  • This polymer layer is applied according to the current state of the art in liquid form in a casting process on the workpiece to be machined and then cured there. In this case, as much mass is applied during application that the surface tension keeps the polymer film on the workpiece.
  • This method leads to an insufficient definable edge termination of workpiece and polymer layer.
  • no exactly perpendicular to the surface of the workpiece edge can be achieved.
  • it may happen at the edge of the polymer layer that, on the one hand, the layer becomes locally too thin and that, due to the surface geometry, the force input occurs relatively undefined when generating temperature-induced stresses. Both problems lead to uncontrollable rough surfaces in the edge region of the produced wafer.
  • relatively much time and always exactly horizontal orientation of the surface to be machined of the workpiece is required to uniform distribution of the polymer by bleeding
  • the thickness of the polymer film is limited, because from a certain layer thickness, the surface tension is no longer sufficient to keep the film on the workpiece and therefore the polymer runs beyond the edge of the workpiece.
  • the present invention - the application of prefabricated polymer films - addresses all of these problems and limitations.
  • the workpiece used here is preferably a thicker wafer, from which one or more thinner wafers are then split off using the method described.
  • polymer films Prefabricated (i.e., not directly solidified on the workpiece) polymer films can thus be fabricated (e.g., by means of cutting, stamping, gluing in formwork) to provide a much more definable edge termination of workpiece and material
  • Polymer films can be prefabricated, qualified and produced separately from the workpiece, so that the production and qualification of the polymer layer can be done independently of the wafer production. In other words, the properties of the polymer layer can thus be defined and controlled independently of other process steps.
  • the separate production of film and wafer has the advantage that the parameters for curing the polymer layer, such as e.g. Hardening temperature and time, are very freely selectable.
  • the two layers are cured independently, which is not possible in the previous method.
  • curing directly on the workpiece with the previous method at curing temperatures above room temperature automatically leads to a bias of the film
  • the thickness of the polymer layer can also be chosen as desired and precisely adjusted (we usually use thicknesses between about 0.1 and 10mm, preferably between 0.4 and 1mm, using thicker polymer layers to make thicker wafers).
  • structured films can be used, where, for example, the film thickness is selectively varied depending on the position * so that film layers with defined thickness profiles are possible.
  • a polydiorganosiloxane can be used, e.g.
  • Polydimethylsiloxanes The following is described as a polymer film, a film of PDMS and as a workpiece a thick wafer of silicon; however, other suitable polymers and workpieces (e.g., other materials such as germanium, sapphire, etc.) may be used.
  • PDMS Sylgard 184 from Dow Corning. This is a two-component mixture that is thermally cured (for example, we use mixing ratios between hardener: base material of 1:10 to 1: 3). For curing we use - depending on the hardening time - temperatures of
  • PDMS Sylgard 184 before hardening is a viscous liquid, e.g. by casting on a smooth surface (such as mirrors) is applied and cured there to form a film. The film is then peeled from this surface (e.g., mechanically), optionally further processed, and then applied to the workpiece.
  • the finished film can be inspected prior to application to the workpiece and its quality checked (e.g., by conventional mechanical, optical or electrical measurement techniques, etc.).
  • quality checked e.g., by conventional mechanical, optical or electrical measurement techniques, etc.
  • many other processes are conventional in the industry (e.g., extrusion production) which are also applicable to the present invention.
  • the finished film is then applied to the surface of the workpiece (e.g., thick wafer).
  • Good adhesion of the film to the workpiece is important: the bond between the workpiece and the film must have sufficient shear forces for splitting and large temperature fluctuations for the thermal
  • a thin PDMS film is recommended as an adhesive (eg also using Sylgard 184). This is applied, for example with a syringe in the middle of the surface to be bonded to the workpiece (a few milliliters for a 5-inch wafer). Thereafter, the film is placed and pressed with a roller or roller under slight pressure on the workpiece. By moving the roller back and forth, the adhesive film spreads under the film, air bubbles are removed. The curing of the adhesive can take place at room temperature. To avoid tensile stresses after the split (see photo), a cladding hardening temperature of less than 60 ° C is recommended.
  • a lower viscosity of the adhesive is advantageous, for example, simply by a larger proportion of hardener substance (eg 1: 3 HärterrBasismaterial) can be achieved.
  • the curing times vary as in the film production depending on the hardening temperature (see above).
  • the film may also be adhered to the workpiece by other conventional methods, e.g. using a vacuum laminator.
  • the film may also be bonded directly (without adhesive) to the surface of the workpiece, e.g. by means of "plasma activated bonding" (for example activation of the PDMS foil in nitrogen plasma, pressing the foil onto the workpiece, if necessary “annealing") or e.g. by laminating (melting) a thermoplastic film (e.g., genomeer from Wacker Silicones).
  • the film After the film is adhered and the adhesive cured, as is conventional in the references described in the art, e.g. thermally induced stress, a thin wafer detached from the workpiece, the film still adheres to one side of the wafer.
  • the film can then be removed from the produced wafer e.g. be replaced with mechanical or chemical methods, as shown in the references mentioned.
  • the workpiece can be coated with a thin sacrificial layer before the film is glued on.
  • the film is then not glued directly to the surface of the workpiece, but on the sacrificial layer.
  • the sacrificial layer located between the workpiece surface and the foil can be used, for example. be chemically dissolved, whereby the film separates from the wafer produced.
  • a sacrificial layer is a material that can transmit large forces over the entire temperature range of about -200 ° C to room temperature and thereby both on the
  • Such sacrificial layers can be made by sol-gel processes, as currently used in the industry e.g. for coating of glass (antireflective, etc) are used (suitable are in particular aluminum, titanium or zirconium-based sols). Even when using the previous method with infusion of the polymer and curing directly on the workpiece or when using "plasma activated bonding" can
  • sacrificial layer i.e. to use an adhesive to adhere the film which can easily be redissolved (e.g., chemically, or by reflow, etc.).
  • an adhesive e.g., chemically, or by reflow, etc.
  • the film After the film is detached from the produced wafer, it can - if desired - cleaned and then applied to a new workpiece. This makes it possible to use the same film several times for the production of wafers. This can significantly reduce the material consumption and the costs of the overall process. For a reuse of the film, it is particularly advantageous to use a re-dissolvable adhesive as described above, since in this case after the dissolution of the adhesive layer to the film no adhesive residues remain.
  • a preferred realization of the present invention is to adhere films to both opposite sides of a thick wafer according to one of the methods described herein. This allows the thick wafer to be split into two thin wafers. This situation is illustrated in Fig. 1 where the numbers in the circles indicate: (1) polymeric film, (2) adhesive, (3) sacrificial layer, (4) workpiece-thick wafer, (5) produced thin wafer.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Adhesives Or Adhesive Processes (AREA)
  • Laminated Bodies (AREA)

Abstract

L'invention concerne un procédé de production de couches ou de plaques minces de corps solide (5), en particulier pour l'utilisation en tant que tranches de semi-conducteur, comprenant les étapes suivantes : production d'un matériau de départ (4), en une matière de faible ductilité, présentant au moins une surface exposée, production d'au moins d'une couche d'application préfabriquée (1), présentant des propriétés de matériau sélectionnées librement, application de la couche d'application préfabriquée (1), à ladite surface exposée du matériau de départ (4), entraînant ainsi la formation d'une structure composite, alimentation de la structure composite, avec un champ de contraintes intérieur et/ou extérieur, de façon que le matériau de départ (4) soit fendu, le long d'un plan intérieur, avec formation d'au moins deux couches minces (5) ou d'au moins deux plaques minces de corps solide.
PCT/EP2013/051746 2012-01-30 2013-01-30 Procédé de production de plaques minces en matières de faible ductilité, au moyen de contraintes mécaniques induites par la température, en utilisant des films de polymère préfabriqués WO2013113730A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE102012001620.4 2012-01-30
DE201210001620 DE102012001620A1 (de) 2012-01-30 2012-01-30 Verfahren zur Herstellung von dünnen Platten aus Werkstoffen geringer Duktilität mittels temperaturinduzierter mechanischer Spannung unter Verwendung von vorgefertigten Polymer-Folien

Publications (1)

Publication Number Publication Date
WO2013113730A1 true WO2013113730A1 (fr) 2013-08-08

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PCT/EP2013/051746 WO2013113730A1 (fr) 2012-01-30 2013-01-30 Procédé de production de plaques minces en matières de faible ductilité, au moyen de contraintes mécaniques induites par la température, en utilisant des films de polymère préfabriqués

Country Status (2)

Country Link
DE (1) DE102012001620A1 (fr)
WO (1) WO2013113730A1 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015082582A1 (fr) * 2013-12-04 2015-06-11 Siltectra Gmbh Procédé permettant de produire des couches de solide de grande surface
DE102014014422A1 (de) 2014-09-29 2016-03-31 Siltectra Gmbh Kombiniertes Waferherstellungsverfahren mit einer Löcher aufweisenden Aufnahmeschicht
DE102014014420A1 (de) 2014-09-29 2016-04-14 Siltectra Gmbh Kombiniertes Waferherstellungsverfahren mit einer Mehrkomponentenaufnahmeschicht
KR20170067819A (ko) * 2014-10-06 2017-06-16 실텍트라 게엠베하 분할 방법 및 분할 방법에 재료의 사용
CN109155248A (zh) * 2016-03-24 2019-01-04 西尔特克特拉有限责任公司 用于在分裂方法中使用的聚合物杂化材料

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102013113030A1 (de) 2013-03-28 2014-10-02 Freiberger Compound Materials Gmbh Verfahren zur Kantenverrundung von Halbleiter-Wafern
DE102013112245A1 (de) 2013-11-07 2015-05-07 Siltectra Gmbh Verfahren zum Fixieren von Festkörperplatten
DE102016014821A1 (de) 2016-12-12 2018-06-14 Siltectra Gmbh Verfahren zum Dünnen von mit Bauteilen versehenen Festkörperschichten
US11130200B2 (en) 2016-03-22 2021-09-28 Siltectra Gmbh Combined laser treatment of a solid body to be split
DE102016105616A1 (de) 2016-03-24 2017-09-28 Siltectra Gmbh Polymer-Hybrid-Material, dessen Verwendung in einem Splitting-Verfahren und Verfahren zur Herstellung des Polymer-Hybrid-Materials
DE102017010284A1 (de) 2017-11-07 2019-05-09 Siltectra Gmbh Verfahren zum Dünnen von mit Bauteilen versehenen Festkörperschichten
EP3551373A1 (fr) 2016-12-12 2019-10-16 Siltectra GmbH Procédé d'amincissement de couches de solides pourvues de composants
CN110691671B (zh) 2017-04-20 2023-10-10 西尔特克特拉有限责任公司 用于具有限定地定向的改性线的晶片制造的方法
DE102018001605A1 (de) 2018-03-01 2019-09-05 Siltectra Gmbh Verfahren zum Kompensieren von Verformungen eines mittels Laserstrahl behandelten und/oder beschichteten Festkörpers

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EP0858110A1 (fr) * 1996-08-27 1998-08-12 Seiko Epson Corporation Methode de separation, procede de transfert d'un dispositif a film mince, dispositif a film mince, dispositif a circuit integre a film mince et dispositif d'affichage a cristaux liquides obtenu par application du procede de transfert
EP2073260A2 (fr) * 2007-12-17 2009-06-24 Commissariat A L'energie Atomique Procédé de transfer d'une couche mince
EP2157602A1 (fr) * 2008-08-20 2010-02-24 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. Procédé de fabrication de plusieurs wafers de fabrication
FR2961515A1 (fr) * 2010-06-22 2011-12-23 Commissariat Energie Atomique Procede de realisation d'une couche mince de silicium monocristallin sur une couche de polymere

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JP5117692B2 (ja) 2006-07-14 2013-01-16 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
RU2011130872A (ru) 2008-12-23 2013-01-27 Зилтектра Гмбх Способ получения тонких отдельных слоев твердотельных материалов со структурированными поверхностями

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EP0858110A1 (fr) * 1996-08-27 1998-08-12 Seiko Epson Corporation Methode de separation, procede de transfert d'un dispositif a film mince, dispositif a film mince, dispositif a circuit integre a film mince et dispositif d'affichage a cristaux liquides obtenu par application du procede de transfert
EP2073260A2 (fr) * 2007-12-17 2009-06-24 Commissariat A L'energie Atomique Procédé de transfer d'une couche mince
EP2157602A1 (fr) * 2008-08-20 2010-02-24 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. Procédé de fabrication de plusieurs wafers de fabrication
FR2961515A1 (fr) * 2010-06-22 2011-12-23 Commissariat Energie Atomique Procede de realisation d'une couche mince de silicium monocristallin sur une couche de polymere

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CHEN WAYNE ET AL: "Double-flip transfer of indium phosphide layers via adhesive wafer bonding and ion-cutting process", APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 90, no. 5, 2 February 2007 (2007-02-02), pages 52114 - 052114, XP012095828, ISSN: 0003-6951, DOI: 10.1063/1.2450665 *

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2015082582A1 (fr) * 2013-12-04 2015-06-11 Siltectra Gmbh Procédé permettant de produire des couches de solide de grande surface
US10029277B2 (en) 2013-12-04 2018-07-24 Siltectra, GmbH Method of producing large-scale layers of solid material
DE102014014422A1 (de) 2014-09-29 2016-03-31 Siltectra Gmbh Kombiniertes Waferherstellungsverfahren mit einer Löcher aufweisenden Aufnahmeschicht
DE102014014420A1 (de) 2014-09-29 2016-04-14 Siltectra Gmbh Kombiniertes Waferherstellungsverfahren mit einer Mehrkomponentenaufnahmeschicht
US10707068B2 (en) 2014-09-29 2020-07-07 Siltectra Gmbh Combined wafer production method with a multi-component receiving layer
US10960574B2 (en) 2014-09-29 2021-03-30 Siltectra Gmbh Combined wafer production method with a receiving layer having holes
KR20170067819A (ko) * 2014-10-06 2017-06-16 실텍트라 게엠베하 분할 방법 및 분할 방법에 재료의 사용
KR102554020B1 (ko) * 2014-10-06 2023-07-11 실텍트라 게엠베하 분할 방법 및 분할 방법에 재료의 사용
CN109155248A (zh) * 2016-03-24 2019-01-04 西尔特克特拉有限责任公司 用于在分裂方法中使用的聚合物杂化材料
CN109155248B (zh) * 2016-03-24 2023-09-15 西尔特克特拉有限责任公司 用于在分裂方法中使用的聚合物杂化材料

Also Published As

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