WO2009138247A2

WO2009138247A2 - Device and method for controlling and/or regulating the energy consumption and/or the thermal load of a computer and/or the semiconductor components thereof and/or the voltage supply unit thereof

Info

Publication number: WO2009138247A2
Application number: PCT/EP2009/003488
Authority: WO
Inventors: Christoph Stark
Original assignee: Stark Christoph
Priority date: 2008-05-15
Filing date: 2009-05-15
Publication date: 2009-11-19
Also published as: WO2009138247A3

Abstract

The invention relates to a device for controlling and regulating the energy consumption and thermal load in computers or computer units, comprising a supply voltage unit (24) which generates one or more controlled principal voltages (06) from the voltages of the external energy sources (25), said principal voltages (06) being adjustable by means of a voltage control unit (852) along with a power regulation unit (851). Said device further comprises a power distribution unit (01) which can distribute, to the set of chips, and influence the power supplied by the supply voltage unit (24) via the conductors of the principal voltages (06), a set of chips (02) which can provide a data processing functionality, at least one fan control unit (19) which can additionally cool the set of chips and other components, and a power loss control system (850) which is accommodated in the power distribution control unit (03), the set of chips (02), or the external supply voltage unit (24) and can monitor and regulate the energy consumption and the cooling process of the set of chips.

Description

Device and method for controlling and / or regulating the

Energy consumption and / or the thermal load of a computer and / or its semiconductor components and / or its

Power supply unit

DESCRIPTION

The present invention relates to an apparatus and a method for controlling and / or regulating the energy consumption and / or the thermal load of a computer and / or its semiconductor components and / or its power supply unit. The apparatus and method are particularly suitable for use in computers, processor systems and their power supplies, and more particularly relate to power management in computers and processor systems. The invention also provides a monitoring system for reducing its thermal load.

State of the art

In the following description, well-known aspects or features will be simplified illustrated and described or omitted to illustrate the hardware and software of the invention without obstruction. However, it will be apparent to those skilled in the art that the present invention may be practiced without these specific details. Also, the following description will clarify that the present invention does not necessarily presuppose all aspects described, but may possibly be practiced with only some of the aspects described.

In computer and computer systems, the control and regulation of the power dissipation of chipsets and the monitoring of their thermal operation is playing an increasingly important role. The reason is that the requirements for the computers and the computer devices with regard to a waiver of active fan cooling (lower Noise level, absence of moving parts), with respect to a lower thermal stress on the electronic components, smaller device dimensions and the fundamental desire to save energy in principle, increasingly increase.

The illustrations of FIGS. 1 and 2 show block diagrams of embodiments of the computer and processor devices with an "external" supply voltage unit (power supply) 24, which supplies the energy necessary for the operation of the device and which is supplied by the external energy sources 25 (eg AC mains, DC grid, rechargeable battery) The main voltages 06 generated by the "external" supply voltage unit supply the electrical energy required for the device, which is supplied by the power distribution unit 01 via the voltage lines 30 to the integrated circuits ("integrated circuits") The power distribution control unit 03 takes over the switching on and off of the individual voltages with the "enable" signals for the individual voltages 04 as a function of different operating voltages ends of the computer or processor device, such as e.g. Standby, normal mode, suspend to RAM or suspend to disc, which are indicated by the state and control signals 08 and the state lines of the individual voltage regulators 05. Likewise, the power distribution unit 01 optionally supplies the peripheral components 23 (e.g., USB ports, mice, etc.) via the associated power supply lines 31.

A further connection of the functionality of the chipset to the power distribution unit 01 is achieved via the IO bus 14. Thus, the individual main voltages 06 can be switched on and off or with each other using the power switching unit 13 and the control signals 15. The on and off state of the entire device as well as the presence of the voltages ("power good", "power ON") of the "external" supply voltage unit 24 is accomplished by means of the signals 28 (see also Fig. 3).

The IO programming unit 07 serves to program or reprogram the power distribution control unit 03 as needed via the programming bus 27 (e.g., JTAG) to achieve the desired behavior of the respective power supply lines of the chipset 30.

The power distribution control unit 03 and the peripheral components 23 may be connected to the chipset hardware 34 via the chipset buses 22 or through dedicated system group signal busses (eg, PCI, PCI-express, USB, I2C, SPI _1, etc.). In order to obtain a clearer description, the complete software of the computer device, ie its BIOS, the operating system and also the user programs, have been logically assigned to the chipset 02. Thus, a clear and simple demarcation of the invention can be represented to the prior art, without affecting the clarity and the factual accuracy of the versions.

The reduction of the energy consumption and the thermal load of the ICs in the computer devices is realized by a variety of methods. The main group hereunder are methods which achieve a reduction in energy consumption by changing the level of the supply voltage on the chipset ICs or the frequency-corresponding clock signals (eg frequency height, frequency throttling) and by switching the respective areas of the chipset hardware on and off , The key concepts for this are as part of the research project of IBM Austin Research Laboratory (ARL) "Dynamic Power Management" by William Weinberg, in "Managed Power"; Electronics 25/2004; http://www.elektroniknet.de described. The summary of these aspects is shown in the following table:

Components power management capabilities

CPU core clock frequency and voltage; Sleep / Halt

DSP core clock frequency and voltage, disable

Bus clock, DRAM refresh rate, burst method,

Enable / disable RAM

Access method, enable / disable write operation,

Flash use of "Shadow RAM"

System bus Varying voltages and frequencies

Changing the sampling frequency, clearing / dimming the

LC display backlight

Audio output Decrease the volume, disable the power amp

Baseband / RF on / off cycle, disable the RF power amp

If the possibilities described above are realized by the IC manufacturer, then the hardware can be controlled accordingly. The hardware implemented methods are then achievable by the chipset performance registers 32 and can be used for the desired enforcement of the respective behavior desired by the designer of the computer and / or the user of the computer.

The second group of energy-saving methods includes pure software processes, which are implemented specifically by the design of the operating system. By Lawrence S. Brakmo, Deborah A. Wallach, Marc A. Viredaz; in "μSleep: A Technique for Reducing Energy Consumption in Handheld Devices"; The International Conference on Mobile Systems, Applications, and Services, Boston, Massachusetts, USA, 6-9 June 2004, introduces a so-called μSleep method, which is the CPU in a short-term sleep mode sends, if there are no tasks in such a way that the user does not notice.The CPU is woken up in time for the next event by a cyclic real-time clock or by an external event from the μSleep mode A state diagram of the μSleep method is shown in FIG.

Another group of methods for reducing the power consumption and thermal load of the computer uses the signals of the temperature measurement units 12 of the chipset hardware 34 and the signals of the load measurement unit 10 of the chipset software 35. These signals are processed in a temperature and computation power control unit 26, which controls the chipset performance registers 32 and the fan control unit 19 in response to the signal values. The temperature and computation power control unit 26 may be implemented in both the BIOS software, the operating system, and an application.

To facilitate the handling of chipset performance registers 32, the company Hewlett-Packard Corporation, Intel Corporation, Microsoft Corporation, Phoenix Technologies Ltd. and Toshiba Corporation developed a so-called "Advanced Configuration and Power Interface (ACPI)" specification Figure 7 shows the state diagram of the ACPI system, on its basis, various methods and algorithms exist, the handling of the control of the chipset All of these methods use only the temperature and load measurement signals provided by the temperature measurement unit 12 and the load measurement unit 10. They are either in the BIOS software, in the software of the operating system, or even in an application , ie in an application software or a corresponding program to find.

To the special design variants of a PC, a computer or a computer Device includes variants with a so-called Computer ON Module (COM) unit 226. Fig. 2 shows a block diagram of a most common embodiment with a COM unit.

The design of a computer device using a COM unit 226 has the goal of being able to use chipsets of different manufacturers and different computing power classes with only one baseboard module. Since the hardware interfaces 236 between the COM unit 226 and the baseboard are standardized, both assemblies can be developed separately. For this reason, two power distribution units 201m and 201s are used in such systems. Likewise, there are two power distribution control units 203m and 203s to map the complete functionality of the device. The baseboard temperature signals 218 must be read in via the chipset buses 22. Otherwise, the same methods and algorithms are used for the control of power consumption, temperature stress on the assemblies and computing power of the system as in FIG.

The in Flg. 2, a power distribution scheme for a computing device having a COM unit 226 may optionally be extended to include further slave units. It is also possible to reduce the functionality of the power distribution on the baseboard so that the complete control is handled by the master power distribution control unit 203m. This would then be a special case of the block diagram shown in FIG.

Splitting the hardware in the computer devices into COM units 226 and into the baseboard unit to accommodate the COMs has resulted in the development of various hardware expansion interfaces for COM unit 236 for the relevant user markets. Examples of such interfaces include, but are not limited to, the ETX and ETXexpress specifications.

A personal computer (PC) or computer device is powered from external power sources 25 during operation. Such energy sources included AC voltage sources (AC voltage) or DC voltage sources (DC voltage), which are either in the form of a DC network or as an accumulator or battery. 3, an ATX network is shown, which is often used in computer devices as an "external" power supply unit 24. As the power source 25 can be used in this

Supply voltage unit can be used in an AC network in the range 11 OVAC to 230VAC and 50Hz to 60Hz. 4 shows an "external" supply voltage unit, which is also fed from an AC network, which, however, only a single main voltage 06 supplies. FIG. 5 shows an example of the generation of the main voltage 06 from an accumulator, which assumes the role of the energy sources 25. For the supply of notebooks and laptops 24 for simultaneous "external" power supply unit 24 simultaneously AC and DC power sources 25 are used to load with the energy of the AC network and the accumulator used as a DC power source.

In PCs, computers and computer equipment, the control and regulation of the computing power consumption of chipsets and the monitoring of their thermal behavior play an important role. Above all, energy consumption is an important topic. With a mobile device, a longer power life of the battery can be achieved with a smaller power loss. Energy consumption also has a significant impact on reducing operating costs, increasing device efficiency, and extending the life of its assemblies. The possibilities to make this functional area successful are not only manifold, but often involve a great deal of effort. A consistent design of the chipset performance for different criteria and requirements in various applications and the constantly changing

Chipset properties and at the same time the ability to use processors with different behavior in the context of a chipset requires a flexible system that also maximizes all physical relationships between the computing power, the power consumption of the chipset and the entire device, the current temperature of the individual device areas (thermal zones ) and the actual time utilization of the computing power can be considered and regulated. In the systems known from the prior art, not all options mentioned are used by far, especially not in a meaningful and efficient combination.

Therefore, the primary object of the present invention may be to provide an improved power management system and method for a variety of types of computers and computers and their chipsets.

This object of the invention is achieved with the subject matters of the independent claims. Features of advantageous developments of the invention will become apparent from the respective dependent claims. Disclosure of the invention

The present invention relates to an apparatus and a method for controlling and / or regulating the energy consumption and / or the thermal load of a computer and / or its semiconductor components and / or its power supply unit. The device and the method are particularly suitable for use in computers,

Processor systems and their power supplies and in particular concern the power management in computers and processor systems or devices. The invention also provides a monitoring system for reducing its thermal load. Thus, the invention relates to a computer system, a supply voltage unit and / or controller for controlling and regulating the energy consumption and thermal load in computers. The device comprises a supply voltage unit that generates from the voltages of the external energy sources one or more regulated and adjustable by voltage regulation unit with the power controller unit main voltages. The apparatus further includes a power distribution unit that can distribute and affect the power delivered by the supply voltage unit via the lines of the main voltages to the chipset. Furthermore, there is a chipset that can provide data processing functionality. At least one fan control unit serves to ensure additional cooling of the chipset and other components. A power dissipation controller, which may be housed in either the power distribution control unit or the chipset or in the external power supply unit, provides monitoring and control of power consumption as well as cool down of the chipset to sensible temperature ranges as needed. Furthermore, it is provided in the device according to the invention that the power consumption of the chipset and the peripheral components is determined at least by a power measurement unit (L signals) and by the power loss controller, which the necessary settings for the control of energy consumption in the chipset performance register (CPR ) is controlled by the TA signals of the temperature measurement unit (T) and, if possible, the load measurement unit (A) are used for the calculation in the control function. Furthermore, it can be provided that the power control unit by changing the height of the main voltages the most efficient operating point of the

Power distribution unit. Optionally, at least one of the two regulators may be connected to the chipset performance registers via the communication modules and communication interface to directly affect the chipset utilization and its power dissipation from the chipset voltages. In addition, it can be provided that at least one of the two controllers and / or with the fan control unit directly or indirectly connected to control the cooling. In this context, at least one of the two regulators can also regulate operating system-independent and autonomous, based on the L, T and / or TA signals of the at least one of the measuring units, both the power consumption of the entire computer device and the fan control unit such that the energy consumption the chipset is minimized while maintaining the requested data processing functionality and / or the chip set is sufficiently cooled.

According to a further embodiment of the invention, provision may be made for one or more suitable temperature signals (T signals) of the temperature measuring units (T) to be associated with the power signal (L signal) of the power measurements and / or a mathematical algebraic function of the L signals in a power loss controller are in such a way that the T-signal behavior in the measured area / zone of the computer device is mainly due to the assigned L-signal.

Furthermore, at least one of the two regulators and / or may be connected to the chipset such that it receives the interrupt request signals of the chipset and can send system management and system control interrupt interface (SMI / SCI) signals to the chipset for power consumption to control the chipset.

In addition, it may be provided that the power distribution unit comprises a power measurement unit which measures the power transmitted via the power supply lines of the chipset, the measured values of which are transmitted by means of the power signals to at least one of the two controllers and / or. In addition, another

Embodiment of the invention provide that the stored in the chipset performance registers (CPR) values the power distribution unit and other components of the chipset hardware based on the "Enable" signals and / or the control signals and / or the IO bus on the Power distribution unit and / or the chipset software influence so that the individual power supply lines of the chipset are influenced so that they are connected separable and / or the voltage level of individual lines and / or various clock frequencies of the chipset are changed accordingly.

According to a further embodiment of the invention, the settings of the two controllers can be edited manually via a user interface using a communication interface and / or via a service and diagnostic unit with the programming and diagnostic bus and / or by the chipset software. Furthermore, it may be useful to store the settings of the two controllers in a memory unit and to provide for further processing via the communication interface if required. A further variant of the invention can provide that the device comprises a service and diagnosis unit which is connected to the two controllers via a programming and diagnostic bus and / or to the diagnostic module, the two controllers being connected via the service and diagnostic unit communicates with external devices such as personal computers, USB devices, etc., and / or is programmable.

The apparatus may further comprise a signal group bus to which both the power distribution control unit and the chipset are connected, wherein signals may be communicated between the power distribution control unit and the chipset.

The power distribution controller and controllers may be connected to the chipset via an I / O bus and / or one of the chipset buses, where the power distribution controller and the controllers are connected to an I / O system of the I / O bus via the I / O bus Chipset communicate and / or are programmable. Optionally, the signals of the I / O bus and / or the SMI / SCI signals and / or the INT request signals and / or the L, A or T signals can also be routed via the signal group bus. In addition, if necessary, the

Fan control unit to be connected directly to at least one of the controller. Optionally, the fan control unit may be indirectly connected to at least one of the controllers via the signal group bus.

Furthermore, it can be provided that the device is built together in at least two areas - the computer-on-module (COM) as a master area and the baseboard as a slave area for receiving the computer-on-module (COM). In addition, the device may include an extension interface to which at least one additional Computer On Module (COM) accessory unit is connectable, and which has an equivalent implementation of power management. Preferably, the expansion interface can provide at least the signal group bus and main power supply voltages for the COM supply.

An alternative embodiment of the device according to the invention may be constructed substantially identically to one of the devices according to one of the previously described embodiments, but instead of a chipset, various peripheral components such as e.g. Storage devices, screen, keyboard, audio equipment etc are provided, whose

Power consumption can be operated by minimizing the power provided by the instead of a master power distribution control unit with the power dissipation controller provided slave power distribution control unit with the power dissipation controller. This can also be provided that the baseboard unit comprises at least one further extension interface, at the cascadable at least one further computer on-module (COM) additional unit can be connected. This slave power distribution control unit may, for example, be programmable via the signal group bus.

Preferably, one of the existing controller switch the switching device, in such a way that in the standby state, the further switching device can be omitted.

All existing controllers may be included in the hardware and / or software of the "external" power supply voltage unit, or some or all of the controllers may be included in the software of the chipset.

The present invention further includes a method for monitoring and controlling the power consumption of chipsets using one of the devices according to one of the previously described embodiments. The following method steps are provided:

- receiving the L, A, and T signals of the chipset and the status signals of the power distribution unit by the loss and power controllers; - Calculation of the minimum of the power loss with new settings of the CPR by the evaluation of the tabulated function of the power loss stored in the memory unit as a function of the A and T values;

Sending new CPR settings to the CPR to provide the minimum power and / or storing the new parameters in the memory unit.

The method may also receive "Power Good" signals from the

Leistungsdistributionseinheit and the IO signals. Furthermore, the reception of input power measurement signals of a power measurement unit can be provided. In addition, the reception of further signals can be provided via the signal group bus. In addition, interrupt request signals of the chipset (02) or the peripheral components may be received. In addition, a "power down" or "sleep" signal of a switch-off button or a standard interface such as Ethernet, WLAN etc of the chipset or the peripheral components can be received.

In the calculation, a thermal model may be used that describes the correlation of power consumption to heat generation, and / or a current temperature for heat generation, and / or the heat buildup utilization of the chipset or peripheral components. This thermal model can be used advantageously to calculate the minimum power consumption. Furthermore, it can be provided that the calculation rule of the controller can be adapted for each chipset or for the peripheral components by means of the service I / O unit or the I / O bus. When calculating, the maximum and minimum operating temperature and preferred U / F operating points or U / F operating ranges of the chipset or peripheral components may be considered as constraints. The calculation can also make an adaptive adaptation of the controller parameters to the actual conditions taking into account the LAT signals.

A further embodiment of the method provides that the transmission further comprises sending system management and system control interrupt interface (SMI / SCI) signals to control the chipset and / or the peripheral components. Optionally, control signals can also be sent to the signal group bus. Furthermore, control signals of the power switching device can be sent, which control the power switching unit. It may also be useful to send further control signals to the fan unit. In addition, it may be advantageous to provide "Enable" signals for the switching of voltages and frequencies to the power distribution unit.

In addition, it can be provided that the transmission further the sending of status and diagnostic signals via the service I / O bus to the service I / O unit and / or via the UO bus to the I / O system of the chipset or of the peripheral components. The transmission may further include transmitting shutdown signals to individual controllers of the chipset or peripheral components, particularly to Ethernet, SATA controllers, and the like.

In summary, the invention provides a PC, computer system or a computer device with a supply voltage unit. The above-mentioned possibilities of reducing the energy consumption of chipsets and monitoring their thermal behavior can be sustainably improved by extending the existing systems described above. It is considered that the power loss of a computer system depends on two physical quantities. One such quantity is the operating temperature of the system components and the second size is the magnitude of the main power supply voltages required by the power distribution unit to produce the different supply voltages of the chipset.

In the implementation of a first solution, the regulation of the power loss or the thermal load of the system can be realized by an adaptive controller, which is able to find the minimum in a multi-dimensional functional dependency of the chipset's power dissipation on the temperature, the magnitude of the main voltages and the settings of the chipset performance registers (CPR) as well as the amount of computing power (utilization of the system). The regulator according to the invention can furthermore have adaptive properties and can correct its regulator settings during operation. Likewise, he can fulfill the task of finding the minimum of the power loss with the predetermined and stored controller parameters. This controller can determine the magnitude of the main voltages as well as the values of the settings in the CPR depending on the measured temperatures, the system load and the measured power consumption as well as only on the measured temperatures and the measured power consumption, because indirectly the power loss related to the Temperature of the components is a measure of the load. The determined values are transferred to the CPR and the supply voltage unit receives the voltage values of the main voltages to be set.

In the implementation of a second solution, separate regulators are used to control the power dissipation or thermal load of the system. One type of regulator in the form of the power regulator unit regulates the level of the main voltages and for the settings of the CPR further regulators are used as described above. These separate controllers can also be used as adaptive controllers. In this case, one or the other controller may also be omitted in this type of implementation, if necessary also modified, depending on which power loss characteristics the chipset has and which functionality is required.

Another feature of the inventive system is the optional presence of a thermal model of the system in the structure of the adaptive power dissipation controller. The reason for the introduction of a thermal model of the system is that it is possible with such a model to specify the target temperature of the system in the knowledge of the present and past power draw from the external energy source and with this information appropriate measures for the reduction of power loss and thus to guide the slowdown of the temperature rise. With increasing temperatures in and around a computer device, forcibly increases the power loss in the device. This phenomenon again raises the temperature until finally the overtemperature protection mechanisms shut down the device or computer and / or reduce the processing speed of the data (reduction of power dissipation). However, if the processing speed is reduced, the processing takes a Calculation task longer. However, this usually increases the energy consumption since the physical optimization of the chips in the silicon is forcibly performed by the chip manufacturers for the maximum computing speed. This phenomenon must be taken into account especially when designing a passive cooling of the devices. Particularly in passive cooling methods, where the reduction of the computing power, the power loss can be reduced, there is the problem that when exceeding a certain temperature, the adjustment of the set temperature with the minimum power loss (slowest data processing) is not possible and turned off the device for a cooling phase must become. The result is that the systems must be approved for operation at a much lower ambient temperature. The device according to the invention makes it possible to optimally regulate these relationships by implementing a simple thermal model of the system. This makes it possible to predictively determine the temperature from the measured temperature and power values and to set correspondingly meaningful temperature behavior mechanisms of the computer system.

When implementing another solution, the computing device has a baseboard unit to accommodate the COM devices. The two units are interconnected via a standardized interface. Therefore, the communication according to the invention and the data exchange to the division of the chipset to the two units must be considered. The procedure for controlling the energy consumption and reducing the thermal load on the assemblies remains unaffected. The functionality and thus the efficiency of the computer device can be reduced any time depending on the effort.

In a computer device with a COM module, a further energy saving over the prior art can be achieved. The well-known S5 state of the x86 architecture (S5 = system is switched off, see eg Wikipedia: Standby mode (PC), http://de.wikipedia.org/wiki/Standby-Mode_(PC), May, 2009 ) provides for the supply of parts of the chipset, which requires a power consumption of several hundred milliwatts to realize the wake-up functions (wake-up functions via, for example, Wake-On-LAN, Wake-On-Power button). The introduction of a further standby state of the COM module with a power consumption in the μW range with only the wake up function of the system with the power button eliminates the power switching unit of the baseboard, since the main power supply voltages do not have to be switched on and off. The power loss, which in normal operation and especially at maximum current load of Switch incurred, can be saved.

In other embodiments with multiple COM units on a baseboard unit, the computer device may be extended by further controllers. It is also possible to arbitrarily divide the computer device (see, for example, Figures 8 and 9) into individual thermal zones and to introduce the controllers shown for each zone.

In order to enable efficient development and maintenance of the overall system, the device according to the invention can be supplemented by further functional units. The service and diagnostic unit enables the implementation of monitoring functions for all or almost all supply voltages of the device according to the invention even without the presence or operation of the current chipset. Also, it is possible to run out of the

Performance measurement, where appropriate, to recognize the correctness of the operation of the device and visualized by another external system, which is connected by a standard bus. This feature makes it easy to quickly investigate problems during the design phase of a device and also allows remote diagnostics.

Brief description of the drawings

Further details, objects and advantages of the invention will become apparent from the following detailed description of the embodiments of the invention and with reference to the accompanying drawings. To show:

Fig. 1 is a block diagram of an embodiment of a personal computer, computer or computer device according to the known art;

FIG. 2 is a block diagram of an embodiment of a prior art personal computer, computer, or computer device constructed with a Computer On Module (COM) assembly and, therefore, further extended by units of power distribution; FIG.

3 shows an ATX power supply as one of several ways of implementing the "external" power supply unit as prior art;

4 shows a power supply adapter as one of the several possibilities of implementing the "external" supply voltage unit as prior art; Fig. 5 is a block diagram of a SMART battery; it represents the state of the art and shows how the "external" supply voltage unit can be supplied with the external power source in forms of DC voltage;

Fig. 6 is a state diagram of the μSleep method (Source: Lawrence S. Brakmo, Deborah A. Wallach, Marc A. Viredaz, "μSleep: A Technique for Reducing Energy Consumption in Handheld Devices"; and Services; Boston, Massachusetts, USA, 6-9 June 2004) as prior art;

Fig. 7 is a state diagram of the ACPI system (Source: Hewlett-Packard Corporation, Intel Corporation, Microsoft Corporation, Phoenix Technologies Ltd, Toshiba Corporation; Advanced Configuration and Power Interface (ACPI) Specification, December 30, 2005) State of the art;

Fig. 8 is a block diagram of an embodiment of the invention as a PC, computer or computer device;

Fig. 9 is a block diagram of an embodiment with a COM assembly;

10 is a block diagram of an embodiment implementing the method of adaptive power dissipation controllers;

11 shows an example of a simple thermal model of a computer device and the associated temperature simulation;

12 is a block diagram of an embodiment of the power and voltage regulators with a DC charging unit in the "external" power supply unit.

The invention may be embodied in various modifications and alternative forms, but certain contexts and embodiments thereof are shown by way of example in the drawings and will be described in detail herein.

Modes for carrying out the invention

FIGS. 8 and 9 show block diagrams of exemplary embodiments of a computer device according to the invention. The "external" supply voltage unit 24, which generates the main voltages 06 for the power distribution unit 01, contains a voltage regulation unit 852 for controlling or setting the level of the set values set by the power controller 851. At least one of the power meter units 810, 811, 812, 912 provides the current power consumption values to at least one of the power regulators 851, 850, 950, thereby making it possible to obtain the most efficient operating point by changing the magnitude of the principal voltages 06

Power distribution units 01, 201m, 201s. The power measurement unit 810 determines the power of the external power source 25 and / or the power of the main voltages 06. Also, the power measurement in the main voltages 06 can be accomplished by a power measurement unit 811 located outside the "external" power supply unit 24. Another power measurement unit 812 determines the power consumption in In the present context, chipset 02 is to be understood as meaning all semiconductor chips (ICs) which participate in the processing of information in the computer, so that in principle also the main processor (CPU) counts for this purpose Power signals (L signal) 835 of the power measurements 812, 811 and / or 810 and / or a mathematical algebraic function and / or the L signals supplied via the communication interface 849 one or more suitable temperature signals (T signals) of the temperature measurement units (T) 12 assigned and z was such that the T signal behavior in the measured point / area / zone of the computer equipment is mainly due to the assigned L signal. If possible and appropriate, the L and T signal group is assigned a load signal (A signal) 10. The L and A signals can be changed by appropriate chipset performance registers (CPR) 32, which in turn affects the T signals. The influencing of the CPR and the calculation of its settings is carried out by one of the adaptive power loss controllers 851, 850, 950.

A classic example of a group of LTA signals and associated CPR values is the temperature measurement of a processor (T signal), power measurement of the core voltage regulator (L signal), and its time utilization measurement in [%] (A signal) , which is determined, for example, by the operating system software (see Windows XP, processor utilization). For example, the L signal and A signal may be affected by the selection of the core voltage and the processor frequency in the registers of the processor (CPR). The transmission of the various power signals to the power dissipaters 851 and / or

850 and / or 950 may also be via the chipset hardware 34 and the chipset buses and overall system signal group buses 22.

The memory unit 855 stores the parameters and settings of the controllers 850 and / or 950 and / or 851 determined by the operator via the user interface 854 or by the adaptive power dissipation controllers 850 and / or 950 and / or 851. This includes the information about the desired operating modes of the controllers (eg model = minimum energy consumption, Mode2 = target temperature max Tx [ ⁰ C], etc.), the tabular function Pv = f (CPR, T ₁ A, Kp) with CPR: Chipset performance register settings, T: temperature operating point, A: workload utilization point, Kp: correction parameters (adaptive adjustment of operating points and normalization conversion for performance comparison), diagnostics and service settings, minimum and maximum working ranges of principal stresses 06, minimum and maximum permitted Working temperatures Tajnax / min and Tmax / min and other information that affect the operation of the device described herein and are mentioned in the description.

As shown in FIG. 10, in the control loop, at least one of the regulators 850, 950 and

851 first read in the instantaneous CPR, L, T, T, and A values of the CPR, L, T, T, and A signals such as 09, 835, 836, 853, etc. With the abovementioned values, it is possible to determine a minimum or several minima for the power loss value Pv_min from the function Pv = f (CPR, T, A, Kp) stored in tabular form.

For the present thermal model, the target temperatures are calculated from the power values. The distance between the current and the target temperature Tz and the values for the thermal constants (thermal resistances and capacitances) allow the temperature behavior of the computer to be assessed. With the temperature value T = Tz, the minimas for the power loss value Pv_min can be determined from the table-based function Pv = f (CPR, T = Tz ₁ A, Kp) and then the selection of the best alternative settings of the CPR can be made.

As part of the control algorithm, the comparison of the stored and the actual values of the Pv = f (CPR, T, A, Kp) function is performed and, if necessary, the correction is performed. The controller can be operated adaptively. One very important aspect of implementing one embodiment of the entire computing device is the ability to implement the controllers 850 and / or 950 and / or 851 in the software of the chipset. In this case, although certain service and diagnostic services that are available when the chipset is switched off must be dispensed with, in this case the implementation requires very few hardware components, that is, only the power measurement units 812 and / or 811 and / or 810 and a voltage regulator / voltage regulator unit 852.

A further feature of the device according to the invention is that the power dissipation controllers 850 and / or the power exciter unit 851 can be cascaded for a plurality of areas and zones and are networked together in a master-slave principle using the chipset buses 22 and can exchange information. This makes the system extensible and open to further requirements. Above all, open solutions, which must be used in the field of COM technologies, can be implemented in a modular way. Preferably, a power distribution control unit 03 and / or 203s and / or 203m according to the invention consists of two parts. The first part includes an embedded microcontroller which is connected via a bus to a programmable logic which forms the second part of the unit. The programmable logic is in turn connected to a bus of the chisatzes. With this solution it is achieved that the power distribution units 03 and / or 203s and / or 203m are both equipped with the required computing power, as well as have a sufficient number of I / Os, can realize different bus speeds and at the same time represent a cost-effective solution.

In Fig. 12 is a block diagram of an embodiment for the realization of at least one of the controller 850 and / or 950 and / or 851 in the hardware and / or software of

The LTA signals 835, 836 required for the control functions may be connected to the controller as well as the communication interface 849 and the chipset buses 22. For example, to charge accumulators from the AC voltage source 25c, the Charging unit 832. To implement the functions of, for example, "smart batteries", the DC charging unit is connected to the chipset via bus 831 and regulator 851. For the minimum power extraction from the main voltages 06, the controller in addition to the Signals 835, 836 and the power and temperature measuring units with the signals 833 and / or one of the signals 834 use.

One of the controllers 850 and / or 950 and / or 851 may control further energy savings on a computer device having a COM assembly. The well-known S5 state of the x86 architecture (S5 = system is off). Introducing a further standby state of the COM module with a power consumption in μW range with only one wakeup of the system with the power button eliminates the power switch unit of the 238 baseboard, since the main power supply 06 voltages are not turned on and off have to. The power loss, which occurs in normal operation and especially at maximum current load of the switch, can be saved.

In summary, the invention provides a PC, computer system or a computer device with a supply voltage unit 24 according to claim 1. The above-mentioned possibilities of reducing the energy consumption of chipsets and monitoring their thermal behavior can be sustainably improved by extending the existing systems described above. It is considered that the power loss of a computer system depends on two physical quantities. One of these quantities is the operating temperature of the system components and the second quantity is the magnitude of the main voltages of the power supply 06 required by the power distribution unit 01 for generating the different supply voltages of the chipset 30 and 31.

In the implementation of a first solution, the regulation of the power loss or the thermal load of the system by an adaptive controller 850 can be realized, which is capable of a multi-dimensional functional dependence of the power loss of the chipset of the temperature, the height of the main voltages 06 and the settings of the chipset performance registers (CPR) 32 and the amount of

Utilization of the computing power (utilization of the system) to find the minimum. The regulator according to the invention can furthermore have adaptive properties and can correct its regulator settings during operation. Likewise, he can fulfill the task of finding the minimum of the power loss with the predetermined and stored controller parameters. This controller can control both the magnitude of the main voltages 06 and the values of the settings in the CPR 32 as a function of the measured temperatures, the system load and the measured power consumption as well as only the measured temperatures and the measured power consumption determine indirectly because the power loss related to the temperature of the components is a measure of the load. The determined values are transmitted to the CPR 32 and the supply voltage unit 24 receives the voltage values of the main voltages 06 to be set.

In the implementation of a second solution, separate regulators are used to control the power dissipation or thermal load of the system. One type of regulator in the form of the power regulator unit 851 regulates the magnitude of the main voltages 06, and for the settings of the CPR 32 other regulators are used as described above. These separate controllers can also be used as adaptive controllers. In this case, one or the other controller may also be omitted in this type of implementation, if necessary also modified, depending on which power loss characteristics the chipset has and which functionality is required.

Another feature of the inventive system is the optional presence of a thermal model of the system in the structure of the adaptive power dissipator 850 and / or 851 and / or 950. The reason for introducing a thermal model of the system is that it is possible with such a model To indicate the target temperature of the system in the knowledge of the present and past power draw from the external power source 25 and to guide with this information appropriate measures for reducing the power loss and thus the slowing of the temperature increase. With increasing temperatures in and around a computer device, forcibly increases the power loss in the device. This phenomenon again raises the temperature until finally the overtemperature protection mechanisms shut down the device or the computer or reduce the processing speed of the data (reduction of power dissipation). However, if the processing speed is reduced, the processing of a computational task takes longer. However, this usually increases the energy consumption since the physical optimization of the chips in the silicon is forcibly performed by the chip manufacturers for the maximum computing speed. This phenomenon must be taken into account especially when designing a passive cooling of the devices. Especially with passive cooling methods, where the reduction of the computing power, the power loss can be reduced, there is the problem that at

If a certain temperature is exceeded, the adjustment of the set temperature with the minimum power loss (slowest data processing) is not possible and the device must be switched off for a cooling phase. The result is that the systems must be approved for operation at a much lower ambient temperature. The Inventive device enables the optimal control of these relationships through the implementation of a simple thermal model of the system. This makes it possible to predictively determine the temperature from the measured temperature and power values and to set the corresponding temperature behavior of the computer system.

In implementing another solution, the computing device includes a baseboard unit 250 for receiving the COM units 226. The two units are interconnected via a standardized interface 236. Therefore, the communication and data exchange according to the invention must be taken into account when dividing the chipset into the two units. The procedure for the regulation of

Energy consumption and the reduction of the thermal load of the assemblies remains unaffected. The functionality and thus the efficiency of the computer device can be reduced any time depending on the effort.

In a computer device with a COM module, a further energy saving over the prior art can be achieved. The well-known S5 state of the x86 architecture (S5 = system is switched off, see eg Wikipedia: Standby mode (PC), http://de.wikipedia.org/wiki/Standby-Mode_(PC), May, 2009 ) provides the supply of parts of the chipset, which requires a power consumption of several hundred mW in order to realize the wake-up functions (wake-up functions via, for example, Wake-On-LAN, Wake-On-Power button). The introduction of a further standby state of the COM module with a power consumption in μW range with only the wake-up of the system with the power button eliminates the power switch unit of the baseboard 238, since the main voltages for the power supply 06 are not turned on and off have to. The power loss, which occurs in normal operation and especially at maximum current load of the switch, can be saved.

In other embodiments with multiple COM units 226 on a baseboard unit 250, the computing device may be extended by further controllers 850, 851, 852, and 950. It is also possible to divide the computer device in FIG. 8 and FIG. 9 as desired into individual thermal zones and to introduce the regulators 850, 851, 852 and 950 for each zone.

In order to enable efficient development and maintenance of the overall system, the device according to the invention can be supplemented by further functional units. The service and diagnostic unit 807 makes it possible to carry out monitoring functions for all or almost all supply voltages of the device according to the invention even without the current one Chipset 02. It is also possible during operation from the power measurement if necessary to recognize the correctness of the operation of the device and to visualize by another external system which is connected by a standard bus. This feature makes it easy to quickly investigate problems during the design phase of a device and also allows remote diagnostics.

Summarized again, the patented method and the associated device can be characterized in that it initially has:

- A chipset (2), which ensures that the data processing in the sense of a computer system is ensured with all components (for example with processor, Northbridge, Southbridge, graphics controller and other controllers of the computer system). The chipset communicates with the various peripheral components (23) and the other system units such as PreBIOS master (3) or PreBIOS slaves (20) using various buses and the overall system signal groups (22),

a PrelBIOS master (3), which is responsible for performing the specified functions

Chipset Power Measurement (L) -, Load Measurement (A) - and Temperature Measurement (T) Signals or Information (18), the s.g. (LAT) signals, as well as the interrupt request signals (17) and the system management and / or system control interrupt interface, the s.g. SMI / SCI interface, required. In addition, for the complete operation of the PreBIOS master, the state and control signals (8) from and to the chipset (2) are the

Power distribution (1) and the information on the input power of the "Computer On Modules" area (26), which in the input power measurement unit (9) processed and transmitted via the input power measurement interface (29) to the PIBIOS master (3), is required .

- A power distribution unit (1) which is supplied via the switching device (13) and the power supply lines (6) with the necessary energy and the chipset (2) depending on the individual enable signals (4) supplies the required supply voltages,

- etc.

The method and the device are characterized in particular by the ability to produce all (or almost all) in the power distribution (1) and / or (1.1) to (1.n) To monitor power supply lines and to provide the "Power Good" signals (5) and / or (5.1) to (5.n) and from the input power measurement (9) and / or (9.1) to (9.n) the energetically correct operation, with the inclusion of the state and control signals (8) and / or (8.1) to recognize (8.n) and depending on the input power (9) and the power measurement (11) and / or (11.1) to (11.n), if necessary, the utilization of the chipset, the temperature measurement (10) provided by the chipset options for adjusting the power supply options of the chipset (30) and / or the peripheral components to control so that the lowest possible power consumption arises.

In addition, the device according to the patent is characterized in that by the implementation of a thermal model of the overall system, a prediction of the resulting temperature increase or decrease in the system is possible. Thus, the patented system with knowledge of the user selected max. Temperature and the knowledge of the U / F operating points of the chipset to calculate the optimal working mode / operating point of the chipset. The optimum criterion can be optionally set, taking into account various methods such as e.g. the minimum energy consumption at a maximum allowable chipset (2) temperature, highest computing power at a maximum allowable chipset (2) temperature, best computing power per watt of power dissipation at a maximum allowable chipset (2) temperature and others. At the same time, the temperature dependence of the power loss of the system is taken into account.

By assigning the temperature sensors to the user-selectable / selectable thermal model and knowing the amount of energy, it is possible for the patented system to recalculate the individual model parameters over and over again to create an adaptive algorithm for temperature control. In addition, the adaptive algorithm is provided with the ability to calculate the required parameters of the thermal model itself in the presence of all required for the thermal model temperature sensors by going through a learning phase.

The device according to the patent also allows the connection and disconnection of the selected individual controllers of the chipset, such. Eg Ethernet or SATA controller. In order to ensure the energy saving not only by the state registers specified by the manufacturer, but also by the complete separation of the controllers from the supply voltage. The prior art can be characterized in particular by the fact that the correct operation of the individual controllers during the operation of the operating system is achieved in that all participating in the data transfer registers are stored separately before switching off. After connection, all stored values are written to the corresponding registers. The drivers in the

Operating system will be informed for the time of the shutdown of the controller that the controller is currently unavailable and can not participate in the data exchange with the operating system.

Another circuit of the patented system allows a working mode in which the switching on of the entire system with a power button or by sending a coded signal via a standard interface (eg Ethernet) is possible and the entire system in this state only a very low energy consumption Range less than 1 mW.

LIST OF REFERENCE NUMBERS

01 Power distribution unit

02 chipset (with processor, controller, North & Southbridge etc.) 03 power distribution control unit

04 "Enable" signals for the individual voltages

05 "Power Good" signals Power distribution unit

06 Main voltages for the power supply

07 I / O programming unit 08 Status and control signals

09 Temperature signal of external temperature measuring unit (Ta signal)

10 chipset utilization measurement unit (A)

11 external temperature measuring unit (Ta)

12 Chipset temperature measuring unit (T) 13 Power switching unit

14 I / O bus for configuring and programming the power distribution controller through the chipset IOs

15 control signals of the power switching unit

16 Power, Temperature, and Load Information (LTA) Signals 19 Fan Controller

22 signal group buses

23 peripheral components

24 "External" supply voltage unit

25 External power sources 25ac External AC power sources

25dc External DC sources

26 Temperature and computing power control unit

27 Programming bus of the power distribution control unit 30 Power supply lines of the chipset 31 Power supply lines of the peripheral components

32 chipset performance registers (processor voltage, processor frequency, bus clock throttling rate, etc.)

33 chipset data interfaces (bidirectional data exchange between the hardware registers and the software to control chipset performance) Chipset hardware (processor, graphics controller, etc.) chipset software (BIOS, operating system, application programs, embedded controllers, etc.)

201m power distribution unit of the COM board (MASTER)

201s power distribution unit of the baseboard (SLAVE)

202 baseboard share of chipset 203m master power distribution control unit

203s slave power distribution controller

207 IO programming unit (BASEBOARD)

212 temperature measuring unit (T)

215 control signals of the power distribution control unit 203s

218 temperature signals ((T) signals)

226 Computer On Module (COM) unit

227 Program bus of the LDS distribution control unit on the baseboard

228 state and control signals of the "external" supply voltage unit

236 hardware extension interfaces for COM unit

(Extension interface to demarcate the Computer On Module (COM) unit) 226

238 Power switching unit of the baseboard

250 baseboard unit to accommodate the COMs 807 Service and diagnostic unit for programming, configuring and diagnosing the power distribution control unit with power loss controller via the external devices (PC ₁ Hyperterminal, USB host, USB device, etc.)

810 Power Meter Unit Input Power 811 Main Unit Power Meter 06

812 power measurement unit of chipset voltages 30

816 SMI / SCI System Management Interrupt and System Control Interrupt Interface

817 interrupt request signals (INT request)

827 Programming and diagnostic bus of the power distribution control unit with power loss controller

828 Diagnostic module for data preparation for the service and diagnostic unit 807

829 Communication interface between 856 CPR communication module, 854 user interface, 855 storage unit, and power dissipation controller 850 830 Main voltage setpoint

831 control, measuring and measuring signals and buses of the DC charging unit

832 DC charging unit

833 temperature signals of the "external" supply voltage unit

834 power signals (L signals) of the "external" power supply unit 835 power signals (L signals)

836 temperature and discharge signals (TA signals)

849 communication interface of the "external" supply voltage unit 24 with the power distribution control unit 03 and / or 203m and / or 203s and the power dissipation controller 850 and / or 950

850 adaptive power loss controller

851 power control unit of the supply voltage unit 24

852 Voltage regulation unit of the supply unit 24 with two inputs and a reactive power compensation for the AC voltage source 25ac 853 Interface for describing the CPR 32

854 operator unit with interface

855 storage unit

856 communication modules between power dissipation controller 850 and the CPRs 32 907 Service and diagnostic unit for programming, configuring and diagnosing the power distribution control unit with power loss controller of the BASEBOARD via the external devices (PC ₁ Hyperterminal, USB host, USB device, etc.)

912 Power measuring unit of the voltages of the peripheral components

927 Power Distribution Control Unit Programming and Diagnostic Bus with Loss Power Controller on BASEBOARD 928 Diagnostic Module for Data Preparation for Service and Diagnostic Unit 907

935 power signals (L signals) of the BASEBOARD hardware

950 adaptive power loss controller

Claims

claims

Anspruch [en] A device for controlling and regulating energy consumption and thermal stress in computers or computer devices, comprising a supply voltage unit (24) consisting of the voltages of the external ones

Power sources (25) generates one or more regulated primary voltages (06) adjustable by voltage regulation unit (852) with the power regulator unit (851); a power distribution unit (01) that can distribute and influence the power supplied by the supply voltage unit (24) via the lines of the main voltages (06) to the chipset; a chipset (02) that can provide data processing functionality; at least one fan control unit (19) capable of performing the additional cooling of the chipset and other components; and a power dissipation controller (850) which can be used either in the power distribution control unit (03), or in the chipset (02), or in the external power control unit

Supply voltage unit (24) is housed and can make the monitoring and control of energy consumption and the cooling of the chipset, wherein the power consumption of the chipset (02) and the peripheral components (23) at least by a power measurement unit (L-signals) (810), (811 ) and / or (812) and by the power dissipation controller (850) and / or (8510), and / or (950) the settings necessary for controlling the power consumption in the chipset performance register (CPR) (32 ) is controlled by the TA signals (836) of the temperature measurement unit (T) (12) and, if possible, the load measurement unit (A) (10) are used for the calculation in the control function; and / or wherein the power control unit (851) is capable of adjusting the most efficient operating point of the power distribution unit (01) by changing the magnitude of the principal voltages (06); and wherein at least one of the two regulators (850) and / or (851) is connected to the chipset performance registers (32) via the communication modules (856) and the communication interface (829) for the utilization of the chipset and its power draw directly affect the chipset voltages (30); and wherein at least one of the two regulators (850) and / or (851) is directly or indirectly connected to the fan control unit (19) to control the cooling; wherein at least one of the two controllers (850) and / or (851) is also operating system independent and autonomous based on the L, T and / or Ta signals of the at least one of the measuring units (11), (12), (212), (810), (811), (812) and (912) controls both the power consumption of the entire computing device and the fan control unit (19) to minimize and / or reduce the power consumption of the chipset (02) while maintaining the requested data processing functionality the chipset (02) is sufficiently cooled.

2. Apparatus according to claim 1, dad urch geken nze ichnet that in a power dissipation controller (850) the power signal (L signal) (835) of the

Power measurements (812), (811) and / or (810) and / or a mathematical algebraic function of the L signals one or more suitable temperature signals

(T signals) of the temperature measuring units (T) 12 are assigned in such a way that the T signal behavior in the measured area / zone of the computer device is mainly due to the associated L signal.

3. Device according to one of the preceding claims, dad urch geken nzeich net that at least one of the two controllers (850) and / or (851) is connected to the chipset (02) that the interrupt request signals (817) of the chipset (02) and send System Management and System Control Interrupt Interface (SMI / SCI) signals (816) to the chipset (02) to control the power consumption of the

Chipset (02) to regulate.

4. Device according to one of the preceding claims, characterized in that the power distribution unit (01) comprises a power measurement unit (812) which measures the power transmitted via the power supply lines (30) of the chipset, their measured values being determined by means of the power signals (835). at least one of the two controllers (850) and / or (851) can be transmitted.

5. Device according to one of the preceding claims, That is, the values stored in the chipset performance registers (CPR) (32) indicate the power distribution unit (01) and other components of the chipset hardware (34) based on the enable signals (04). and / or the control signals (08), and / or the I0 bus (14) via the power distribution unit (03) and / or (203m), and / or

(203s); and / or the chipset software (35) influence so that the individual power supply lines (30) of the chipset (02) influence so that they are connected separable and / or changes the voltage level of individual lines and / or various clock frequencies of the chipset (02) to be corresponding.

6. Device according to one of the preceding claims, characterized in that the settings of the two controllers (850) and / or (851) are transmitted via an operator interface (854) using a communication interface (829) and / or via a service interface. and diagnostic unit (807) with the programming and

Diagnosis bus (827) and / or by the chipset software (35) can be edited manually.

7. Device according to one of the preceding claims, d ad u rch nekeni ch net that the settings of the two controllers (850) and / or (851) are stored in a memory unit and for further processing via the communication interface

(829) are available.

8. Device according to one of the preceding claims, characterized Porsche Style nzeichnet that the device further a service and diagnostic unit (807) and / or

(907) connected to the two controllers (850) and / or (851) via a programming and diagnostic bus (827) and / or (927) to the diagnostic module (828) and / or (928) , wherein the two controllers (850) and / or (851) via the service and

Diagnostic unit (807) and / or (907) communicates with external devices such as personal computers, USB devices, etc. and / or is programmable.

9. Device according to one of the preceding claims, That is, the apparatus further comprises a signal group bus (22) to which both power distribution control unit (03), (203m) and / or (203s) and the chipset (02) are connected, signals between power distribution control unit (03 ), (203m) and / or (203s) and chipset (02) are communicable.

10. Device according to one of the preceding claims, characterized Porsche Style nzeichnet that the power distribution control unit (03), (203m) and / or (203s) and the controller (850) and / or (950) and / or (851) via an I / O-bus (14) and / or one of the

Chipset buses (22) are connected to the chipset (02), wherein power distribution control unit (03), (203m) and / or (203s) and the controllers (850) and / or (950) and / or (851) via communicate the I / O bus (14) with an I / O system of the chipset (02) and / or are programmable.

11.Vorrichtung according to any one of the preceding claims, dad u rch geken nze I net, that the signals of the I / O bus (14) and / or the SMI / SCI signals (16) and / or the INT request signals (17) and / or the L, A or T signals (835), (836) and (218) are also routed via the signal group bus (22).

12. Device according to one of the preceding claims, dad urch geken Ize net, that the fan control unit (19) directly to at least one of the controller (850) and / or (950) and / or (851) is connected.

13. Device according to one of claims 1 to 11, d ad u rch NEN sign that the fan control unit (19) indirectly via the signal group bus (22) with at least one of the controller (850) and / or (950) and / or (851 ) connected is.

14. Device according to one of the preceding claims, dadu rch geken nzeichnet that the device in at least two areas of the computer-on-modules (COM) (226) as the master area and the baseboard as a slave area for receiving the Computer-on-Module (COM) (226) is assembled.

15. Device according to one of the preceding claims, characterized in that the device comprises an extension interface (236) to which at least one further computer on-module (COM) additional unit (226) can be connected and has an equivalent implementation of the power management.

16. The device according to claim 14, characterized in that the expansion interface at least the signal group bus (22) and main voltages for the power supply (06) for the COM supply available connectable.

17. Baseboard unit for receiving the COMs (250) with the expansion interface

(236) according to claim 14 or 15, characterized in that it is constructed substantially identically to the device according to one of claims 1 to 12, but in place of a chipset (02) various peripheral components (23), e.g. Storage devices, screen, keyboard, audio devices, etc are provided whose energy consumption by the instead of a master power distribution control unit (03) or (203m) provided with the power dissipation controller (850) slave power distribution control unit (203s) with the power dissipation controller (950) are operated according minimized can.

18. The baseboard unit for receiving the COMs (250) with the expansion interface (236) of claim 16, characterized in that the baseboard unit (250) comprises at least one further extension interface (236) to which cascadable at least another computer on module

(COM) additional unit (226) can be connected.

19. Computer On Module (COM) accessory unit (226) for connection to the baseboard unit (250) according to claim 16 or 17, characterized in that in that the slave power distribution control unit (203s) is programmable via the signal group bus (22).

20. Device according to one of the preceding claims, characterized in that one of the controller (850) and / or (950) and / or (851) can switch the switching device (13) in such a way that in the standby state, the switching device ( 213) can be omitted.

21.Device according to one of the preceding claims, characterized in that all controllers (850) and (950) and (851) are contained in the hardware and / or software of the "external" supply voltage voltage unit (24).

22. The device according to claim 1, characterized in that all controllers (850) and (950) and (851) are contained in the software of the chipset 02.

23. A method for monitoring and controlling the power consumption of chipsets using any of the devices according to claim 1 to 19, ge net by the process steps netei ch

Receipt of the L, A, and T signals (836) and / or (835) and / or (935) and / or (218) of the chipset (02, 202) and the status signals (08) of the power distribution unit (01) through the loss and power controllers (850, 851, 950);

- Calculation of the minimum of the power loss in new settings of the CPR (32) by the evaluation of the function of the power loss stored in the memory unit (855) in tabular form as a function of the A and T values

Sending new CPR (32) settings to the CPR to provide the minimum energy and / or saving the new parameters in the CPR

Storage unit (855).

24. A method according to claim 20, characterized in that; that the reception of the further reception of "Power Good" signals of the Power distribution unit (05) and the 10 signals (14).

25. Method according to one of the preceding method claims, dad urch geken nzeich net; in that the reception further comprises the receipt of input power measurement signals (29) from a power measurement unit (810) and / or (811) and / or (812) and / or (912).

26. The method according to one of the preceding method claims, d ad urch ge nzeich net; that the reception of the further receiving the other signals via the

Signal group bus (22).

27. Method according to one of the preceding method claims, d ad u rchken draws; in that the reception further comprises the receipt of interrupt request signals (817) of the chipset (02) or the peripheral component (23).

28. The method according to one of the preceding method claims, dad urch geke n nzeich net; that the receipt of the further the receipt of a "Power Down" - or "Sleep" -

Signal of a power switch or a standard interface such as Ethernet, WLAN etc of the chipset (02) or the peripheral component (23).

29. Method according to one of the preceding method claims, dad u rch geken nze I net; that the calculation is a thermal model that correlates the power consumption / heat generation, and / or current

Temperature / heat development and / or utilization / heat generation of the chipset (02) or the peripheral components (23) describes, used to calculate the minimum power consumption.

30. Method according to one of the preceding method claims, characterized in that; that the calculation rule of the controllers (850, 851, 950) for each chipset (02) or peripheral components (23) by means of the service I / O unit (807, 927) or the I / O bus (14) is customizable.

31.A method according to one of the preceding method claims, characterized; that the calculation is the maximum and minimum working temperature and preferred

U / F operating points or work areas of the chipset (02) or the peripheral component (23) considered as a boundary condition.

32. Method according to one of the preceding method claims, characterized in that: in that the calculation makes an adaptive adaptation of the controller parameters to the actual conditions taking into account the LAT signals (836, 835, 935, 218).

33. The method according to one of the preceding method claims, dad urch geken nzeich net; that sending another is sending system management and system

Control Interrupt Interface Signals (SMI / SCI) (816) for controlling the chipset (02,

202) or the peripheral component (23).

34. Method according to one of the preceding method claims, characterized in that; the sending further comprises sending control signals to the signal group bus (22).

35. The method according to one of the preceding method claims, dad urch characterized; the sending further comprises transmitting control signals of the power switching device (15,215) which controls the power switching unit (13,213).

36. The method according to one of the preceding method claims, characterized geken nzei ch net; the sending further comprises sending control signals to the fan unit (19).

37. The method according to one of the preceding method claims, dad urch characterized; in that the sending further comprises the sending of "enable" signals (04) for the switching of voltages and frequencies to the power distribution unit (01, 201m, 201s).

38. Method according to one of the preceding method claims, characterized in that; further that the sending of the status and diagnostic signals via the service I / O bus (827, 927) to the service I / O unit (807,907) and / or via the I / O bus

Bus (14) to the I / O system of the chipset (02,202) or the peripheral component (23).

39. Method according to one of the preceding method claims, characterized in that; the sending further comprises the sending of switch-off signals to individual controllers of the chipset (02) or the peripheral component (23), in particular to Ethernet, SATA controllers and the like.