WO2005093946A1 - 前置増幅器 - Google Patents
前置増幅器 Download PDFInfo
- Publication number
- WO2005093946A1 WO2005093946A1 PCT/JP2004/004194 JP2004004194W WO2005093946A1 WO 2005093946 A1 WO2005093946 A1 WO 2005093946A1 JP 2004004194 W JP2004004194 W JP 2004004194W WO 2005093946 A1 WO2005093946 A1 WO 2005093946A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- circuit
- resistance
- preamplifier
- negative feedback
- output
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/34—Negative-feedback-circuit arrangements with or without positive feedback
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/04—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only
- H03F3/08—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light
- H03F3/082—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements with semiconductor devices only controlled by light with FET's
Definitions
- the present invention relates to a preamplifier applied to an optical communication system and an optical receiver. More specifically, the present invention relates to operation stability, suppression of circuit saturation, or tracking of gain control.
- the present invention relates to a preamplifier having improved characteristics.
- the preamplifier is provided at the front end of the optical receiver, and plays a role of converting a current signal converted by a light receiving element, which is a component of the optical receiver, into a voltage signal.
- a light receiving element which is a component of the optical receiver
- a wide dynamic range characteristic is required for a preamplifier provided in the front end of the optical receiver.
- Non-Patent Document 1 a preamplifier having a wide dynamic range characteristic
- Non-Patent Document 1 discloses a circuit configuration and various characteristics of a preamplifier having a wide dynamic range characteristic.
- the feedback resistor of the negative feedback amplifier is mainly configured by a parallel circuit of a fixed resistor and a FET, and the gate terminal voltage of the FET is adjusted according to the received light power. By changing it, the conversion gain is controlled to achieve a wide dynamic range.
- the preamplifier operates so that the FET is completely OFF and the resistance of the feedback resistor becomes the resistance of the fixed resistor. Gradually turns ON, and the combined resistance value of the fixed resistance and the ON resistance of the FET becomes the resistance value of the feedback resistance, that is, the change of the preamplifier. It operates so as to have a conversion gain.
- a capacitor for phase compensation is arranged in parallel with the feedback resistor, and by optimizing the capacitance value of the capacitor, the instability of the circuit when the received light power increases is suppressed. are doing.
- phase compensation can secure the phase margin, which is a measure of the stability on the open-loop frequency characteristic, but conversely, a gain peak occurs on the closed-loop frequency characteristic due to a phenomenon called the pattern effect. There is a problem that the conversion gain in the band increases and the output voltage waveform is distorted.
- Non-Patent Document 1 in the transient state until the conversion gain becomes a steady state, there is a time region where the conversion gain is large despite the large received light power. As a result, the input terminal voltage of the load resistor in the negative feedback amplifier circuit became small, and there was a problem that excessive current would flow through the input transistor and load resistor, possibly causing device destruction.
- the present invention has a small waveform distortion, a stable conversion gain control operation, and a wide dynamic range characteristic irrespective of whether the operation state is in a transient state or a steady state. It is an object of the present invention to provide a preamplifier with excellent performance. Disclosure of the invention
- a negative feedback amplifier circuit for converting an output current signal output from a light receiving element into a voltage signal, and an output voltage signal output from the negative feedback amplifier circuit
- a conversion gain control circuit for simultaneously controlling the resistance value of the feedback resistor section of the negative feedback amplifier circuit and the resistance value of the load resistor section of the negative feedback amplifier circuit, respectively. Is characterized by comprising a fixed resistance element connected in parallel, a MOSFET element, and a diode-connected transistor.
- the negative feedback amplifier circuit including the inverting amplifier circuit and the output buffer converts the output current signal output from the light receiving element into a voltage signal
- the conversion gain control circuit includes the negative feedback amplifier circuit
- the resistance of the load resistor of the negative feedback amplifier circuit are simultaneously controlled.
- Each of the feedback resistor and the load resistor includes a fixed resistor connected in parallel, a MOS FET, and a diode-connected transistor. The value can be varied by controlling the conduction of these MOS FET elements or transistors.
- FIG. 1 is a diagram showing a circuit configuration of the preamplifier according to the first embodiment of the present invention
- FIG. 2 is a diagram showing input / output characteristics of the preamplifier
- FIG. FIG. 4 is a diagram showing a change characteristic of the transimpedance with respect to the frequency when the resistance is controlled.
- FIG. 4 is a diagram showing a change characteristic of the transimpedance with respect to the frequency when the feedback resistance and the load resistance are simultaneously controlled.
- FIG. 5 is a diagram showing a circuit configuration of the preamplifier according to the second embodiment of the present invention.
- FIG. 6 is a diagram showing a circuit configuration of the preamplifier according to the third embodiment of the present invention.
- FIG. 7 is a diagram showing a circuit configuration of a preamplifier according to a fourth embodiment of the present invention
- FIG. FIG. 15 is a diagram showing a circuit configuration of a preamplifier according to a fifth embodiment of the present invention.
- FIG. 1 is a diagram illustrating a circuit configuration of the preamplifier according to the first embodiment of the present invention.
- the preamplifier 1 shown in FIG. 1 includes an inverting amplifier circuit 2, an output buffer circuit 3, a feedback resistor 4, and a load resistor 5.
- the feedback resistor section 4 includes a fixed resistor element 41 connected in parallel, a MOSFET 42, and a diode-connected transistor 43.
- the load resistance section 5 includes a fixed resistance element 51, a MOSFET 52, and a diode-connected transistor 53 connected in parallel.
- the base terminal of the transistor 62 which is the input terminal of the output buffer circuit 3 is connected to the collector terminal of the transistor 61, which is the output terminal of the inverting amplifier circuit 2, and the output terminal of the output buffer circuit 3
- the emitter terminal of the transistor 62, which is the terminal, and the base terminal of the transistor 61, which is the input terminal of the inverting amplifier circuit 2 are connected by the feedback resistor 4 to form a negative feedback amplifier circuit.
- the bias voltage Vpd is applied to the force source terminal side of the light receiving element 6, and the anode terminal side is connected to the input terminal of the preamplifier 1, that is, the input terminal of the inverting amplifier circuit 2.
- a predetermined control voltage is supplied to the gate terminals of the MOS FETs 42 and 52. This control voltage is generated based on, for example, the output of the negative feedback amplifier circuit.
- an optical signal received by an optical receiver (not shown) is converted into a current signal by a light receiving element 6 before being constituted by an inverting amplifier circuit 2, an output buffer circuit 3, and a feedback resistor section 4.
- the transimpedance which is the ratio of the output voltage to the input current, greatly contributes to the input / output characteristics of the circuit.
- the transimpedance is the resistance value of the feedback resistor unit 4, but the resistance value of the feedback resistor unit 4 is set so that circuit saturation does not occur according to the light intensity of the received optical signal. Is controlled. That is, when the optical intensity of the received optical signal is low, the resistance of the feedback resistor 4 is controlled to increase, and when the optical intensity of the received optical signal is high, the resistance of the feedback resistor 4 decreases. Is controlled so that In the preamplifier 1 according to the present embodiment, the resistance value of the load resistance unit 5 is controlled simultaneously with the feedback resistance unit 4. The reason why the resistance value of the load resistance section 5 is controlled at the same time as the feedback resistance section 4 will be described later.
- FIG. 2 is a diagram showing the input / output characteristics of the preamplifier 1. More specifically, the output voltage of the preamplifier 1 with respect to the received light intensity of the light receiving element 6 is controlled by the resistance value of the feedback resistor unit 4.
- FIG. 9 is a diagram showing a characteristic curve when no resistance is applied (K 1: without conversion gain control) and a characteristic curve when the resistance value of the feedback resistor unit 4 is controlled (K 2: with conversion gain control).
- the resistance value of the feedback resistor unit 4 when the resistance value of the feedback resistor unit 4 is not controlled, that is, when the resistance value of the feedback resistor unit 4 is constant, the received light intensity is low. Sometimes it is linearly amplified, but if the received light intensity increases, it enters the circuit saturation region indicated by region A1 and causes waveform distortion. Therefore, if the resistance value of the feedback resistor section 4 is not controlled, a sufficient dynamic range cannot be secured.
- the resistance value of the feedback resistor unit 4 is controlled according to the received light intensity, the received light intensity is large as shown by the characteristic curve K2 in FIG. Sometimes, the conversion gain decreases and the output voltage decreases, causing the circuit to enter the circuit saturation region. Is prevented. Therefore, in the case of the present embodiment in which the resistance value of the feedback resistor section 4 is controlled, a sufficient dynamic range can be secured without causing waveform distortion.
- FIG. 3 is a diagram showing a change characteristic of the transimpedance with respect to the frequency when the feedback resistor unit 4 is controlled.
- the transimpedance value is shown in decibels.
- the characteristic curves K 3 and K 4 in the same figure, when the resistance value of the feedback resistor section 4 becomes small (at high conversion gain—low conversion gain), the cut-off frequency f c of the preamplifier 1 is reduced. Increases, and a gain peak occurs on the closed-loop frequency characteristic. As a result, the conversion gain in a certain frequency band lower than the cutoff frequency increases, and a phenomenon occurs in which the output voltage waveform is distorted. The distortion of the output voltage waveform is well known as a pattern effect.
- FIG. 4 shows the characteristics at this time. That is, FIG. 4 is a diagram showing a change characteristic of the transimpedance with respect to the frequency when the feedback resistor 4 and the load resistor 5 are simultaneously controlled. As shown in the figure, even if the resistance of the feedback resistor 4 changes by controlling the load resistor 5, the cut-off frequency of the preamplifier 1 can be made almost constant by controlling the load resistor 5.
- phase margin can be ensured, and at the same time, the stability of the circuit during conversion gain control can be maintained without generating a gain peak on the closed-loop frequency characteristic. That is, it is possible to obtain a preamplifier having excellent wide dynamic range characteristics without causing waveform distortion.
- the resistance value of the feedback resistor section 4 between the input and output of the inverting amplifier circuit is R f
- the input capacitance of the preamplifier is C i
- the open loop gain of the preamplifier 1 gain without applying negative feedback
- G G
- the resistance Rf is controlled so as to be low so that the conversion gain is low, so that it is clear from the equation (1) that to, in the time of low conversion gain force Tsu preparative-off frequency f c is increased.
- the open loop gain G of the preamplifier 1 is a voltage gain of the emitter terminal grounded amplifier constituting the inverting amplifier circuit 2, the resistance R e of Emitta terminal resistor 7 of Emitta terminal grounded amplifier, the load resistor section 5
- R c be the resistance value of G ... -. (2) Equation (1)
- the preamplifier of the formula (2) The open loop gain G of 1 should be changed at the same time. That is, if to control the resistance value R c of the load resistor section 5 in accordance with a change in the resistance value R f of the feedback resistor portion 4, that keep the cut-off frequency f c within a predetermined range it can.
- each of the feedback resistor unit 4 and the load resistor unit 5 is composed of only the M ⁇ S FET and there is no diode-connected transistor.
- the equivalent resistance between the drain and source of a MOSFET changes depending on the potential (gate terminal potential) applied to the gate terminal. Therefore, the combined resistance with the fixed resistance element 41 is varied by the control voltage applied to the gate terminal of the MOS FET 42, which is determined based on the output voltage that changes according to the light intensity of the received optical signal, and the conversion gain is controlled.
- the terminal of MOSFET 52 The combined resistance with the fixed resistance element 51 is varied by the control voltage applied to the element, and the open loop gain is also controlled.
- a diode-connected transistor is added to each of the feedback resistor unit 4 and the load resistor unit 5 in addition to the MOSFET.
- a diode-connected transistor becomes conductive when the potential difference between the base terminal and the emitter terminal is about 0.8 V or more, and the equivalent resistance between the collector terminal and the emitter terminal is reduced. Therefore, when the voltage between the terminals applied to both ends of the feedback resistor unit 4 becomes about 0.8 V or more due to the light intensity of the received optical signal, the combined resistance value of the feedback resistor unit 4 decreases and the conversion gain decreases. It works to be. Similarly, when the voltage between the terminals applied to both ends of the load resistance unit 5 becomes about 0.8 V or more, the combined resistance value of the load resistance unit 5 decreases, and the open loop gain acts to decrease.
- the bases of the transistors 43 and 53 are not controlled.
- the terminal-emitter terminal voltage becomes about 0.8 V or more, it operates instantaneously for each bit, so it is in the transient state as described above, and even if the received light intensity is large, the preamplifier is used. It can prevent circuit saturation and element destruction of 1.
- the GOUT terminal voltage of the MOS FET is controlled so that the voltage between the terminals of the feedback resistor unit 4 becomes about 0.8 V or less.
- the diode-connected transistor is turned on only.
- the diode-connected transistor is turned off.
- the conduction control of the MOS FETs 42 and 52 and the diode-connected transistor is simultaneously performed according to the light intensity of the received optical signal. Therefore, it is possible to obtain a preamplifier excellent in a wide dynamic range characteristic without suppressing waveform saturation while suppressing circuit saturation and element destruction in a transient state, and maintaining circuit stability during conversion gain control. .
- FIG. 5 is a diagram showing a circuit configuration of a preamplifier according to a second embodiment of the present invention.
- a reference voltage V re i 0 is supplied to a base terminal of a diode-connected transistor 53 constituting the load resistance section 5. If the collector terminal voltage of the transistor 61 provided in the inverting amplifier circuit 2 is defined as the input terminal voltage V reil , the reference voltage V re i0 is, when no signal is input, that is, the inverting amplifier. Collector terminal voltage when no signal is input to circuit 2.
- V ref x V ref Q -R f ⁇ I. (3)
- the relationship in equation (3) can be considered as follows. That is, when a current Ii flowing when an optical signal having a predetermined light intensity is received flows through the feedback resistor unit 4, the emitter terminal potential of the transistor 62 provided in the output buffer circuit 3 has no optical signal input. It drops by R f XI from the emitter terminal potential at that time. On the other hand, the transistor 62 operates so that a predetermined voltage drop (about 0.8 V) is maintained between the base terminal and the emitter terminal, so that the collector terminal voltage of the transistor 62 also decreases by R f XI. .
- FIG. 5 the voltage between the base terminal and the emitter terminal of the diode-connected transistor 43 constituting the feedback resistor 4 and the base terminal of the diode-connected transistor 53 constituting the load resistor 5 are shown in FIG. It is almost equal to the voltage between emitter terminals. That is, when an optical signal having a predetermined light intensity or more is received, the diode-connected transistor 43 constituting the feedback resistor 4 and the diode-connected transistor 53 constituting the load resistor 5 are simultaneously turned on. Works as follows.
- the conversion gain is low. Nevertheless, the circuit operates with a high open-loop gain, and the circuit may oscillate without securing the phase margin.
- the diode-connected transistor 43 forming the feedback resistor 4 and the diode-connected transistor forming the load resistor 5 5 and 3 are turned on almost simultaneously, so it is possible to obtain a preamplifier that suppresses waveform distortion without deteriorating the stability of the circuit and has excellent wide dynamic range characteristics.
- FIG. 6 is a diagram illustrating a circuit configuration of a preamplifier according to a third embodiment of the present invention.
- the reference bias voltage generating circuit 8 is configured by a circuit equivalent to the preamplifier 1 shown in FIG. 1, that is, a negative feedback amplifier circuit.
- the collector terminal of the transistor 81 which is the output terminal of the inverting amplifier circuit forming the reference bias voltage generation circuit 8, is connected to the base terminal of the diode-connected transistor 53.
- the reference bias voltage generation circuit 8 is configured by a circuit equivalent to the basic components of the preamplifier 1 excluding the reference bias voltage generation circuit 8, so that the reference bias voltage generation circuit
- the collector terminal voltage of transistor 81, which is the output terminal of 8 is almost equal to the input terminal voltage at the time of no signal input (collector terminal voltage of transistor 61, which is the output terminal of inverting amplifier circuit 2) V rei 0 .
- V rei depends on fluctuations in power supply voltage and ambient temperature.
- the reference bias voltage generation circuit 8 is configured by a circuit equivalent to the basic components of the preamplifier 1 except for the reference bias voltage generation circuit 8 as described above, V rei due to power supply voltage fluctuations and ambient temperature fluctuations. Is canceled, and the voltage between the base terminal and the emitter terminal of the transistor 53 is controlled to be constant.
- the diode-connected transistor 43 constituting the feedback resistor 4 and the diode-connected transistor 53 constituting the load resistor 5 3 Operate so as to turn on at the same time, so that it is possible to obtain a preamplifier excellent in wide dynamic range characteristics, suppressing waveform distortion without deteriorating circuit stability.
- FIG. 7 is a diagram illustrating a circuit configuration of a preamplifier according to a fourth embodiment of the present invention.
- the same or equivalent parts as those in FIG. 6 are denoted by the same reference numerals.
- the output terminal of the reference bias voltage generation circuit 8 and the base terminal of the diode-connected transistor 53 are connected via a voltage follower circuit 9.
- the ideal input impedance is infinite and the ideal output impedance is infinite. That is, by connecting the reference bias voltage generation circuit 8 and the base terminal of the diode-connected transistor 53 via the voltage follower circuit 9, the operating conditions of the reference bias voltage generation circuit 8 and the negative feedback amplifier circuit It can be operated in an ideal way without changing.
- the diode-connected transistor constituting the feedback resistor unit 4 can be used when the optical intensity of the received optical signal is high regardless of the power supply voltage fluctuation and the ambient temperature change.
- FIG. 8 is a diagram showing a circuit configuration of a preamplifier according to a fifth embodiment of the present invention.
- the preamplifier 1 shown in FIG. 8 includes an average value detection circuit 10 for generating an average value of the output voltage signal of the output buffer circuit 3, and a feedback resistor 4 based on the output of the average value detection circuit 10.
- Arithmetic circuits 11 a and lib that generate and output gate terminal voltages for controlling the resistance value of the MO SFETs 42 and the resistance values of the MO SFETs 52 that configure the load resistance unit 5 Have.
- the average value detection circuit 10 detects and outputs the average value of the output voltage signal of the output buffer circuit 3 that changes according to the received light intensity.
- the arithmetic circuit 11a generates and outputs the gate terminal voltage to be applied to the MOS FET 42 to determine the combined resistance of the feedback resistor 4 based on the output of the average direct detection circuit 10. I do.
- the arithmetic circuit 11b generates a gate terminal voltage that applies H to the MOS FET 52 to determine the combined resistance value of the load resistance section 5 based on the output of the average value detection circuit 10. Output.
- a feedback loop is formed by the negative feedback amplifier circuit composed of the inverting amplifier circuit 2 and the output buffer circuit 3, the average value detection circuit 10 and the arithmetic circuits 1 la and 11. Therefore, it is possible to flexibly follow a change in received light intensity.
- a circuit (sensor) for detecting the output of the output buffer circuit 3 for example, a case where a feedback loop is formed by a low peak detection circuit instead of the average direct detection circuit shown in FIG.
- a general low peak detection circuit has a characteristic of trying to maintain a low peak value when the received light intensity changes in a direction in which the received light intensity decreases, although the tracking performance is fast. It has the disadvantage that the tracking performance is degraded. Also, when the low peak detection circuit detects the average value from the intermediate value of the off level of the optical output, there is no problem if the extinction ratio of the optical signal is infinite, but if the extinction ratio is poor, It also has the disadvantage of deviating from the actual average.
- a circuit for detecting the output of the output buffer circuit 3 When an average value detection circuit is used as a path (sensor), it is possible to flexibly follow a change in light intensity of a received optical signal, and it is possible to always output an accurate average value. Can be eliminated.
- the preamplifier according to the present invention is useful as a preamplifier for an optical communication system or an optical receiver, particularly when a wide dynamic range characteristic is to be ensured in an optical communication system or an optical receiver. Suitable for.
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- Power Engineering (AREA)
- Amplifiers (AREA)
- Control Of Amplification And Gain Control (AREA)
Abstract
Description
Claims
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006519097A JP4361087B2 (ja) | 2004-03-25 | 2004-03-25 | 前置増幅器 |
EP04723359A EP1619792B1 (en) | 2004-03-25 | 2004-03-25 | Preamplifier |
US10/543,390 US7268628B2 (en) | 2004-03-25 | 2004-03-25 | Preamplifier |
DE602004031602T DE602004031602D1 (de) | 2004-03-25 | 2004-03-25 | Vorverstärker |
PCT/JP2004/004194 WO2005093946A1 (ja) | 2004-03-25 | 2004-03-25 | 前置増幅器 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2004/004194 WO2005093946A1 (ja) | 2004-03-25 | 2004-03-25 | 前置増幅器 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2005093946A1 true WO2005093946A1 (ja) | 2005-10-06 |
Family
ID=35056525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2004/004194 WO2005093946A1 (ja) | 2004-03-25 | 2004-03-25 | 前置増幅器 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7268628B2 (ja) |
EP (1) | EP1619792B1 (ja) |
JP (1) | JP4361087B2 (ja) |
DE (1) | DE602004031602D1 (ja) |
WO (1) | WO2005093946A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010166216A (ja) * | 2009-01-14 | 2010-07-29 | Mitsubishi Electric Corp | 前置増幅器 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100705326B1 (ko) * | 2006-05-25 | 2007-04-10 | 삼성전자주식회사 | 피드백형 가변이득 증폭기 및 그 제어방법 |
US8183843B2 (en) * | 2007-01-26 | 2012-05-22 | Infineon Technologies Ag | Voltage regulator and associated methods |
US7692486B2 (en) * | 2007-10-05 | 2010-04-06 | Qualcomm, Incorporated | Configurable feedback for an amplifier |
KR20120061155A (ko) * | 2010-11-01 | 2012-06-13 | 한국전자통신연구원 | 귀환 증폭기 |
CN102571193A (zh) * | 2010-12-14 | 2012-07-11 | 无锡华润矽科微电子有限公司 | 红外接收电路输入结构 |
US9246601B2 (en) * | 2011-05-03 | 2016-01-26 | Yunzhi Dong | Optical receiver |
JP6038165B2 (ja) | 2012-09-27 | 2016-12-07 | 三菱電機株式会社 | 受信器および受信方法 |
KR20140089052A (ko) * | 2013-01-02 | 2014-07-14 | 한국전자통신연구원 | 귀환 증폭기 |
US9397658B2 (en) * | 2014-06-25 | 2016-07-19 | Freescale Semiconductor, Inc. | Gate drive circuit and a method for controlling a power transistor |
US9602064B2 (en) * | 2014-06-28 | 2017-03-21 | Skyworks Solutions, Inc. | Switchable feedback circuit for radio-frequency power amplifiers |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2001144552A (ja) * | 1999-11-10 | 2001-05-25 | Nec Corp | バーストモード光受信システム及び方法 |
JP2002039827A (ja) * | 2000-07-21 | 2002-02-06 | Matsushita Electric Ind Co Ltd | ガス保安装置 |
JP2003163544A (ja) * | 2001-11-26 | 2003-06-06 | Opnext Japan Inc | 帰還増幅回路及びそれを用いた受信装置 |
JP2003347861A (ja) * | 2002-05-24 | 2003-12-05 | Olympus Optical Co Ltd | 光信号増幅回路 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05304422A (ja) * | 1992-04-24 | 1993-11-16 | Sumitomo Electric Ind Ltd | 光通信用前置増幅器 |
JP3405388B2 (ja) | 1997-04-04 | 2003-05-12 | 住友電気工業株式会社 | 光通信用前置増幅器 |
US6864751B1 (en) * | 2003-09-08 | 2005-03-08 | Texas Instruments Deutschland Gmbh | Transimpedance amplifier with adjustable output amplitude and wide input dynamic-range |
US7358818B2 (en) * | 2003-10-20 | 2008-04-15 | Sumitomo Electric Industries, Ltd. | Optical receiver for an optical communication |
-
2004
- 2004-03-25 DE DE602004031602T patent/DE602004031602D1/de not_active Expired - Lifetime
- 2004-03-25 WO PCT/JP2004/004194 patent/WO2005093946A1/ja not_active Application Discontinuation
- 2004-03-25 US US10/543,390 patent/US7268628B2/en not_active Expired - Lifetime
- 2004-03-25 JP JP2006519097A patent/JP4361087B2/ja not_active Expired - Fee Related
- 2004-03-25 EP EP04723359A patent/EP1619792B1/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001144552A (ja) * | 1999-11-10 | 2001-05-25 | Nec Corp | バーストモード光受信システム及び方法 |
JP2002039827A (ja) * | 2000-07-21 | 2002-02-06 | Matsushita Electric Ind Co Ltd | ガス保安装置 |
JP2003163544A (ja) * | 2001-11-26 | 2003-06-06 | Opnext Japan Inc | 帰還増幅回路及びそれを用いた受信装置 |
JP2003347861A (ja) * | 2002-05-24 | 2003-12-05 | Olympus Optical Co Ltd | 光信号増幅回路 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010166216A (ja) * | 2009-01-14 | 2010-07-29 | Mitsubishi Electric Corp | 前置増幅器 |
Also Published As
Publication number | Publication date |
---|---|
EP1619792A4 (en) | 2006-03-22 |
US7268628B2 (en) | 2007-09-11 |
DE602004031602D1 (de) | 2011-04-14 |
JPWO2005093946A1 (ja) | 2007-08-30 |
US20060103471A1 (en) | 2006-05-18 |
EP1619792A1 (en) | 2006-01-25 |
JP4361087B2 (ja) | 2009-11-11 |
EP1619792B1 (en) | 2011-03-02 |
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