WO1998008257A1

WO1998008257A1 - Integrated circuit

Info

Publication number: WO1998008257A1
Application number: PCT/DE1997/001647
Authority: WO
Inventors: Heiko Fibranz
Original assignee: Siemens Aktiengesellschaft
Priority date: 1996-08-20
Filing date: 1997-08-05
Publication date: 1998-02-26
Also published as: DE19633549C2; DE19633549A1

Abstract

Described is an integrated circuit (1) with a mode select circuit (3) enabling the integrated circuit to be set in a test and/or initialization mode of operation. The integrated circuit is distinguished by an electroconductive protective layer (4) which is located above the mode select circuit, covering it at least partially. Unauthorized interventions setting the integrated circuit in a test and/or initialization mode are thus prevented in a reliable manner.

Description

description

Integrated circuit

The present invention relates to an integrated circuit according to the preamble of claim 1, i.e. an integrated circuit with an operating mode selection line, with the assistance of which the integrated circuit can be put into a test and / or initialization operating mode.

Integrated circuits are generally known with regard to their basic structure and function and do not require any further explanation in this regard.

The provision of a test and / or initialization operating mode for integrated circuits primarily serves to test the integrated circuits as quickly and easily as possible immediately after their manufacture, preferably before their final completion, and / or to initialize the non-volatile memories contained therein.

However, the test and / or initialization mode of operation may often only be able to be activated in a manner that reliably prevents its activation by the subsequent user during "normal" operation. Otherwise, later users of the integrated circuit could, for example, read out secret data, change the content of the non-volatile memory or engage in other misuse.

It is known to carry out the activation of the test and / or initialization operating mode in each case via a mode selection line of the integrated circuit, which is rendered unusable (severed) before delivery to the later users.

A possible practical implementation of such a mode selection line for activating the test and / or Initialization mode consists in the provision of a so-called saw bracket.

Such a saw bracket is explained in more detail below with reference to FIGS. 4 and 5, of which FIG. 4 shows a schematic partial plan view of a semiconductor wafer (wafer) containing integrated circuits, and FIG. 5 shows a greatly enlarged detailed view thereof.

On the semiconductor wafer, as can be seen in particular from FIG. 4, a large number of integrated circuits 1 are provided, which in the example under consideration are separated by sawing the semiconductor wafer and are to be accommodated in housings, on printed circuit boards or the like; the respective saw channels along which the semiconductor wafer is to be sawed for separating the integrated circuits 1 are denoted in the figures by the reference number 2.

The integrated circuits 1, which are separated by sawing along said sawing channels 2, consist of a circuit area 11 and an edge area 12 surrounding it.

The circuit area 11 is delimited in the example under consideration by a frame 13 (which can also be omitted), which may be formed here in a so-called metal layer of the integrated circuit 1. Metallic conductor tracks usually run in said metal layer, via which the supply voltages and / or the input and / or output signals of the components contained in the integrated circuit are routed and which are connected to corresponding connection points of the components via plated-through holes.

Each of the integrated circuits 1 has on its right side, as shown in FIGS. 4 and 5, a saw bracket 3 already mentioned above. The respective Saw brackets are loop-shaped structures which, in the example under consideration, pass under the frame 13 from the circuit area 11 through the edge area 12 and extend far beyond the respectively assigned saw channel 2.

In the example considered, the saw brackets 3 are formed in a so-called poly layer of the integrated circuit. As is known, the said poly layer has local structures made of (electrically conductive) polysilicon, which are otherwise provided in particular for forming the gate sections of the transistors contained in the integrated circuit.

Taking the respective integrated circuits 1 in the one shown in FIG. in the non-isolated state for test and / or initialization purposes, the integrated circuits 1 can automatically put themselves into the test and / or initialization mode via the respective saw brackets 3. This can be accomplished by outputting a voltage (or a suitable voltage profile) suitable for activating the test and / or initialization mode of operation from the integrated circuit via one of the legs of the respective saw frame and outputting it into a corresponding (via the other of the legs Mode selection) input of the integrated circuit is entered. Alternatively, it can be provided that the saw bracket does not automatically put the integrated circuit into the test and / or initialization mode of operation, but that its (undamaged) presence is "only" a necessary requirement m the integrated circuit into the test and / or initialization mode.

Since the design of the mode selection line as a saw bracket 3 enables the integrated circuit to put itself into the test and / or initialization mode, In the following, the saw bracket 3 is also partially referred to in general as a self-activation line.

If the wafer is sawed in order to feed the integrated circuits 1 provided thereon for their intended use, the saw brackets 3, more precisely their legs, are also separated, as can clearly be seen in FIGS. 4 and 5, which in turn can be seen has the consequence that the integrated circuit can no longer be put into the test and / or initialization mode.

However, if a user finds a way to connect the leg sections of the former saw bracket 3 that run through the edge region 12 of the integrated circuit, he thereby obtains the possibility of using the integrated circuit in its test and / or initialization mode for abuse purposes offset.

To avoid this, provision can be made, for example, to provide further lines or structures in the immediate vicinity of the saw bracket 3 which, because they represent important components of the integrated circuit, for example, must not be destroyed.

However, such a procedure has the disadvantage that lines and / or structures which must not be destroyed by the sawing must be provided up to very close to the respective sawing channels.

Instead of the saw brackets, which, as already mentioned above, connect an output connection of the integrated circuit with an input connection of the same, mode selection lines can also be provided in the form of lines hereinafter referred to as external activation lines, which, as the name implies, "only""represent an input terminal of the integrated circuit and A predetermined activation voltage or a predetermined activation voltage curve must be applied from the outside (for example by the testing and / or initialization device) in order to initiate or enable the integrated circuit to be switched into its test and / or initialization mode. These external activation lines, the construction of which, apart from the difference mentioned, roughly corresponds to the construction of the saw frame described above, can also be interrupted if necessary, that is to say after the testing and / or initialization of the integrated circuit, similarly to the previously described saw frame, the interruption here, however, not only by sawing, but alternatively or additionally, by burning with high current or the like. Similar to the opening of the saw bracket, this has the consequence that the integrated circuit can no longer be put into the test and / or initialization mode without further ado.

As an additional safeguard, provision can also be made here to provide further lines or structures in the immediate vicinity of the external activation line which must not be destroyed. The previously mentioned disadvantage that lines and / or structures must be provided up to very close to the sawing channel, which must not be destroyed by sawing or otherwise separating the line, is not here either, or at most with a great deal of effort to avoid.

The present invention is therefore based on the object of developing the integrated circuit in accordance with the preamble of claim 1 in such a way that unauthorized access to the operating mode selection line, which places the integrated circuit in the test and / or initialization operating mode, can be reliably prevented in a simple manner is. This object is achieved by the features claimed in the characterizing part of patent claim 1.

Accordingly, it is provided that an electrically conductive protective layer is provided at least partially covering the mode selection line.

If you now try to contact the operating mode selection line from above in order to connect parts of it to one another or to apply a certain voltage or a certain voltage profile, this inevitably results in an electrical connection between the operating mode selection line to be contacted and the one above it running electrically conductive protective layer, whereby the operating mode selection line can be acted upon by a voltage excluding an activation of the test and / or initialization operating mode.

The provision of the electrically conductive protective layer above the operating mode selection line thus enables, in an amazingly simple manner, that unauthorized access to the operating mode selection line which places the integrated circuit in the test and / or initialization operating mode can be reliably prevented.

Advantageous developments of the invention are the subject of the dependent claims.

The invention is explained in more detail below on the basis of exemplary embodiments with reference to the drawing. Show it

FIG. 1 shows a schematic illustration of a plan view of a section of an integrated circuit designed according to the invention, which contains a mode selection line, FIG. 2 shows a sectional view along the line AB in FIG. 1,

Figure 3 is a sectional view taken along the line A-B in Figure 1, but here the legs of a contact bracket are contacted from above and connected to each other.

FIG. 4 shows a schematic illustration of a plan view of a semiconductor wafer containing conventional integrated circuits, and

FIG. 5 shows a schematic illustration of a plan view of a section of a conventional integrated circuit containing an operating mode selection line.

In contrast to the conventional integrated circuits, the integrated circuit according to the invention described below with reference to FIGS. 1 to 3 has an electrically conductive protective layer which extends over the operating mode selection line. However, the operating mode selection line can still be designed as a saw bracket (self-activation line) or as an external activation line, but also in any other way.

The integrated circuit according to the invention is produced - apart from the additional measures required for producing the said protective layer - in the same way as is the case with conventional integrated circuits.

Insofar as the same reference symbols are used in FIGS. 1 to 3 as in FIGS. 4 and 5, they denote the same or at least corresponding elements, unless expressly stated otherwise. The embodiment of an integrated circuit having a saw bracket as a mode selection line is now described with reference to FIGS. 1 to 3. However, it should already be pointed out at this point that the explanations related to this also apply correspondingly to integrated circuits with other operating mode selection lines, such as, for example, differently designed self-activation lines or third-party activation lines.

FIG. 1 is a schematic representation of the section containing the saw bow of an integrated circuit designed according to the invention; The representation shown in FIG. 1 corresponds in terms of the section shown and the manner of representation to the representation shown in FIG. 5 of the conventional integrated circuit described at the beginning and therefore allows a comparative comparison.

The integrated circuit according to the invention has a circuit area 11 delimited by a (not absolutely necessary) frame 13, an edge area 12 surrounding the circuit area 11, and an area which extends from within the circuit area 11 via the edge area 12 to clearly beyond a saw channel 2 Cable loop trained saw bracket 3. With regard to the structure, the function and the mode of operation of these elements, there is not complete, but there is, to a large extent, agreement with the corresponding elements of the conventional integrated circuit described at the outset, so that for further details reference can first be made to the explanations given there.

The sections running within the edge area 12 and in some cases also the sections of the saw bracket 3 running through the saw channel 2 are as in FIGS. 1 to 3 shown covered by an electrically conductive protective layer 4.

Contrary to the representation in the figures, the protective layer 4 does not have to be a single coherent protective layer or a protective layer that completely covers the saw bracket 3. As will be understood even better from the later description of the function of the protective layer 4, it is of particular importance for the design of the protective layer 4 that the saw frame sections remaining on the integrated circuit after it has been separated do not come into contact with the (with a predetermined Voltage applied) protective layer 4 can be contacted.

FIG. 2 shows a schematic representation of the layer structure of the integrated circuit in the region of the protective layer 4, more precisely a cross section along the line A-B in FIG. 1.

As can be seen from FIG. 2, a carrier element carrying the integrated circuit is provided at the bottom in the form of a substrate 15 consisting of semiconductor material. The components contained in the integrated circuit are formed in and / or on the substrate 15. The section of the integrated circuit shown in FIG. 2 is, however, free of components, since it is the edge region 12 of the circuit area outside the circuit area 11.

The substrate 15 is covered by an insulating layer 16 consisting, for example, of silicon oxide, in which the saw arm 3 and the protective layer 4 are embedded, for example, as shown in FIG.

In the example under consideration, the saw bracket 3 is again a polysilicon structure in a poly layer, more precisely in FIG realized a polyl layer close to the substrate. However, there is no restriction to this. The saw bracket 3 can in principle also be formed in any other electrically conductive layer, for example in a metal layer; However, it is advantageous if the saw bracket 3 is arranged as close as possible to the substrate (low-lying), because then its subsequent contacting from the outside is particularly difficult.

The protective layer 4 running above the saw bracket 3 is also implemented in the example under consideration as a polysilicon structure in a poly layer, more precisely in a poly2 layer located further away from the substrate. However, there is no restriction to this either. The protective layer 4 can in principle also be formed in any other electrically conductive layer that can be arranged above the saw frame, for example in a metal layer; However, it is advantageous if the protective layer 4 runs relatively slightly above the saw bracket 3.

A layer made of the insulating material 16 already mentioned is provided between the saw frame 3 and the structures forming the protective layer 4.

If and as long as the integrated circuits provided on a semiconductor wafer next to one another and one above the other have not yet been isolated, more precisely not yet sawn, the integrated circuit can be set to the test and / or initialization mode as intended.

By sawing along the saw channels 2, the saw bracket 3 is separated, as can be clearly seen from FIG. 1. The result of this is that the integrated circuit can no longer be put into the test and / or initialization mode as intended. In this state, the activation of the test and / or initialization mode can, if at all, only take place by contacting the saw frame sections (legs) remaining on the integrated circuit after separating them from above and connecting them to one another.

This state is illustrated in Figure 3. There, a cross-sectional view of the integrated circuit corresponding to FIG. 2 is shown, but here the legs of the saw bracket are contacted (by unauthorized persons) from above and are connected to one another.

The contacting of the legs of the saw bracket 3 from above must be carried out in a manner similar to the production of the so-called vias. Accordingly, it is necessary for this to locally remove the layers covering the legs and to fill the preferably funnel-shaped openings formed thereby with metallic material, for example tungsten. Such contact elements, formed in the manner described or otherwise, which are designated by the reference symbol 21 in FIG. 3, can be connected by a connecting element 22, for example running along the surface of the integrated circuit, as a result of which the legs contacted by the contact elements 21 also result of the former saw bracket 3 are electrically connected to each other.

If the protective layer 4 had not been provided, the function and mode of operation of which will be described in more detail below, the integrated circuit manipulated in this or similar manner could, under certain circumstances, be switched to the test and / or initialization mode without authorization.

However, as can be seen from the following explanations, this can be reliably prevented by the protective layer 4. The arrangement of the protective layer 4 over the legs of the former saw bracket 3 entails that the contact elements 21 not only come into contact with the said legs, but also automatically with the protective layer 4 when the said legs are contacted. That is, the bridges are connected not only to one another by a bridging as shown in FIG. 3, but also to the protective layer 4 at the same time.

As already mentioned above, the protective layer 4 is formed from electrically conductive material. If the protective layer is therefore subjected to a voltage which is unsuitable for activating the test and / or initialization operating mode, the legs of the former saw bracket 3 are also acted upon or pulled to this potential. This in turn means that one of the legs of the former saw bracket cannot be supplied with a voltage suitable for activating the test and / or initialization mode of operation via the other of the legs.

The voltage with which the protective layer 4 is to be acted upon in order to fulfill its intended function depends on the voltage with which the saw arm 3 must be applied in order to activate the test and / or initialization operating mode. The voltage to be applied to the protective layer 4 is preferably a voltage which counteracts the activation of the test and / or initialization mode, for example 0 V in the event that the test and / or initialization mode is or can be activated by +5 V or +5 V in the event that the test and / or initialization mode can be activated at or by 0 V.

In order to apply a voltage that is unsuitable for activating the test and / or initialization operating mode to the protective layer 4, it has an extension 5 shown in FIG. 1, which extends into the circuit area 11 of FIG extends into and integrated circuit there nschlußstelle to _A passes via which it is connected to a said power-providing power source. The internal resistance of the voltage source and the resistance of the protective layer are so low that the legs of the former saw bracket are largely pulled to the potential of the protective layer regardless of the voltage applied to them.

The protective layer 4 extends, as can be seen from FIG. 1, only to a very small extent into the saw channel 2. As a result, it is relatively easy to cut the saw bracket 2 by means of a laser beam or the like before sawing along the saw channel. Such a pre-separation of the saw bracket can be of particular interest if the integrated circuits are not sawn, ie are delivered to the customer for further processing there on the semiconductor wafer.

Of course, it is also possible for the protective layer to cross the saw channel in its full width.

It is crucial, however, that the saw frame sections remaining on the integrated circuit after it has been separated or - in general terms - mode selection line sections are covered so extensively by the protective layer 4 that contacting the mode selection line sections without simultaneous contacting of the protective layer is excluded.

Claims

claims

1. Integrated circuit (1) with an operating mode selection line (3), with the participation of which the integrated circuit can be put into a test and / or initialization operating mode, characterized in that above the operating mode selection line one which at least partially covers it , electrically conductive protective layer (4) is provided.

2. Integrated circuit according to claim 1, so that the mode selection line (3) is designed as a polysilicon structure lying close to a substrate (15).

3. Integrated circuit according to claim 1 or 2, so that the protective layer (4) is designed as a polysilicon structure running above the mode selection line (3).

4. Integrated circuit according to one of the preceding claims, that the operating mode selection line (3) and the protective layer (4) are separated from one another by at least one insulating layer (16).

5. Integrated circuit according to one of the preceding claims, characterized in that the protective layer (4) in the not yet separated state of the integrated circuit (1) provided on a semiconductor wafer together with a large number of further integrated circuits at least partially over a saw channel (2) extends along which the semiconductor wafer for The purpose of separating the integrated circuits is sawn.

6. Integrated circuit according to one of the preceding claims, characterized in that the protective layer (4) is arranged and / or structured above the mode selection line (3) in such a way that the mode selection line in the isolated state of the integrated circuit ( 1) cannot be contacted from the outside without simultaneously establishing an electrical connection between the operating mode selection line and the protective layer.

7. Integrated circuit according to one of the preceding claims, characterized in that the protective layer (4) is connected to a voltage source, through which the protective layer is subjected to a voltage which is unsuitable for activating the test and / or initialization mode is.

8, Integrated circuit according to claim 7, so that the voltage source and the protective layer (4) are designed such that the operating mode selection line (3) in the case of an electrical connection with the protective layer is drawn at least approximately to the electrical potential of the protective layer.