Nothing Special   »   [go: up one dir, main page]

US20050013106A1 - Peripheral card with hidden test pins - Google Patents

Peripheral card with hidden test pins Download PDF

Info

Publication number
US20050013106A1
US20050013106A1 US10/621,882 US62188203A US2005013106A1 US 20050013106 A1 US20050013106 A1 US 20050013106A1 US 62188203 A US62188203 A US 62188203A US 2005013106 A1 US2005013106 A1 US 2005013106A1
Authority
US
United States
Prior art keywords
circuit board
die
test terminals
peripheral card
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US10/621,882
Inventor
Hem Takiar
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Technologies LLC
Original Assignee
SanDisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SanDisk Corp filed Critical SanDisk Corp
Priority to US10/621,882 priority Critical patent/US20050013106A1/en
Assigned to SANDISK CORPORATION reassignment SANDISK CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: TAKIAR, HEM P.
Priority to US10/782,969 priority patent/US7307848B2/en
Priority to US10/851,466 priority patent/US7416132B2/en
Priority to TW093119088A priority patent/TWI251785B/en
Priority to TW093119109A priority patent/TWI248619B/en
Priority to KR1020067001155A priority patent/KR20060063896A/en
Priority to KR1020067001156A priority patent/KR101199600B1/en
Priority to PCT/US2004/021253 priority patent/WO2005010812A1/en
Priority to CNA2004800205453A priority patent/CN1823341A/en
Priority to JP2006520195A priority patent/JP2007531083A/en
Priority to JP2006520207A priority patent/JP2007531920A/en
Priority to PCT/US2004/020898 priority patent/WO2005010808A2/en
Priority to EP04777413A priority patent/EP1649413A1/en
Priority to EP04756368A priority patent/EP1649410A2/en
Priority to CN200480020546A priority patent/CN100589121C/en
Priority to US10/952,609 priority patent/US7306160B2/en
Priority to US10/952,591 priority patent/US7336498B2/en
Priority to US10/995,989 priority patent/US7306161B2/en
Publication of US20050013106A1 publication Critical patent/US20050013106A1/en
Priority to US11/930,909 priority patent/US7864540B2/en
Assigned to SANDISK TECHNOLOGIES INC. reassignment SANDISK TECHNOLOGIES INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SANDISK CORPORATION
Assigned to SANDISK TECHNOLOGIES LLC reassignment SANDISK TECHNOLOGIES LLC CHANGE OF NAME (SEE DOCUMENT FOR DETAILS). Assignors: SANDISK TECHNOLOGIES INC
Abandoned legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/0772—Physical layout of the record carrier
    • G06K19/07732—Physical layout of the record carrier the record carrier having a housing or construction similar to well-known portable memory devices, such as SD cards, USB or memory sticks
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0266—Marks, test patterns or identification means
    • H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01004—Beryllium [Be]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H05K3/284—Applying non-metallic protective coatings for encapsulating mounted components
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49004—Electrical device making including measuring or testing of device or component part
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49174—Assembling terminal to elongated conductor
    • Y10T29/49179—Assembling terminal to elongated conductor by metal fusion bonding

Definitions

  • the present invention is directed to technology for peripheral cards.
  • Memory cards are relatively small removable cards that provide data storage. In most cases, but not required in all cases, the memory card is integrated circuit based. These memory cards plug into or are received by ports or connectors on electronic devices, including computing devices, cameras, mobile telephones, PDAs and other devices.
  • a memory card uses non-volatile memory. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
  • EEPROM Electrical Erasable Programmable Read Only Memory
  • flash memory are among the most popular non-volatile semiconductor memories.
  • Some examples of memory cards includes CompactFlashTM, MMCTM, Smart Media, Secure DigitalTM, and the Memory Stick.
  • a flash memory card is a memory card that has one or more arrays of flash memory cells. Some flash memory cards also include bit line decoders, word line decoders, a state machine, a controller and other circuitry. In many cases the controller will be implemented in a first semiconductor die, while the array of flash memory cells, bit line decoders, word line decoders, and state machine are implemented in a second semiconductor die. Over time, flash memory arrays have increased density by shrinking the size of an individual memory cell and by implementing greater numbers of memory cells in the array.
  • test pins on the memory card connect to the controller.
  • a test performed during manufacturing typically seeks to directly access the memory array (bypassing the controller) in order to test each cell in the memory array.
  • more pins will allow for more efficient and complete testing of the relevant components of the memory card.
  • many memory cards will include test pins, in addition to the user I/O pins. To protect the memory card from electrostatic discharge relative to the test pins and to protect the data on the card from being wrongfully accessed via the test pins, the test pins should not be exposed to the user of the memory card after the manufacturing process.
  • a memory card using flash memory is manufactured with a set of test pins at one edge of the memory card. After the memory card is tested, the test pins are cut off of the memory card and the memory card is then packaged. While the device of the '355 patent has worked well, there is a need for an improvement. First, the test pins that are cut off use real estate on the circuit board. There is a trend to increase density on circuit boards; therefore, it would be advantageous to not use a portion of the circuit board for components that will not ship to customers. Second, if the memory card fails in the field, there are no test pins to test the device in order to determine why the memory card failed. Such tests following device failure allow a manufacturer of memory cards to improve device reliability and the manufacturing process.
  • Mini-SD Card Another example of a memory card using flash memory is the recently released Mini-SD Card.
  • the memory array is mounted on the top of the circuit board and the controller is mounted on the memory array.
  • User I/O pins and test pins are formed on the bottom of the circuit board.
  • the circuit board (with the controller, memory array and other components) are enclosed by attaching a top lid to a bottom lid. Both the bottom lid and the top lid are made of a hard plastic, and are manufactured from a mold prior to enclosing the circuit board. After the top and bottom lids are made, the top lid is ultra- sonically welded to the bottom lid to enclose the circuit board (with the controller, memory array and other components).
  • the bottom lid has an opening for the user I/O pins.
  • the bottom lid does not have an opening for the test pins; therefore, the test pins are not exposed to users.
  • peripheral cards that implement wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, and other devices.
  • the present invention pertains to technology for a peripheral card with hidden test pins.
  • One embodiment of the present invention includes a circuit board, circuit elements on said circuit board, a set of user terminals on the circuit board that are in communication with at least a subset of the circuit elements, a set of test terminals on said circuit board that are in communication with one or more of the circuit elements, an enclosure that covers a portion of the circuit board without covering the set of user terminals and the set of test terminals, and a conformal contact coating on a first surface of the circuit board covering the test terminals and preventing access to the test terminals.
  • One embodiment of manufacturing such a peripheral card includes adding circuit elements to a circuit board, where the circuit board (at some point in time) includes a set of test terminals. One or more of the circuit elements are tested using the test terminals. The test terminals are subsequently covered with a conformal contact coating in order to prevent access to the test terminals. In one implementation, the test terminals are covered with a conformal contact coating by applying a liquid directly to a first surface of the circuit board. In another implementation, the test terminals are covered with a conformal contact coating by applying a film directly to a first surface of said circuit board.
  • Some embodiments of the present invention will include manufacturing the peripheral cards a batch at a time, followed by singulation of the batch into individualized memory cards.
  • the present invention allows for the covering of the test pins before or after singulation.
  • one implementation includes the steps of adding circuit elements to a plurality of circuit boards of a strip (each of the plurality of circuit boards includes a set of test terminals), separating the connected circuit boards, testing the circuit elements of the circuit boards using the test terminals, and applying a conformal contact coating on a first surface of each of the circuit boards.
  • the conformal contact coating covers the test terminals and prevents access to the test terminals such that a particular circuit board has its test terminals covered after that particular circuit board has been tested.
  • the present invention can be applied to the manufacture of memory cards, including flash memory cards.
  • the technology disclosed herein can also be applied to other peripheral cards.
  • the present invention can be used with removable peripheral cards that include wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, and other devices.
  • the present invention is not limited to any one type of peripheral card and is meant to be used with many different types of peripheral cards.
  • FIG. 1 is a perspective view of the bottom of a memory card according to a first embodiment of the present invention.
  • FIG. 2 is a perspective view of the top of the memory card according to the first embodiment of the present invention.
  • FIG. 3 is a first side view of the memory card according to the first embodiment of the present invention.
  • FIG. 4 is a perspective view of the top of a memory card according to a second embodiment of the present invention.
  • FIG. 5 is a perspective view of the top of a memory card according to a third embodiment of the present invention.
  • FIG. 6 is a perspective view of the top of a memory card according to a fourth embodiment of the present invention.
  • FIG. 7 is a perspective view of the bottom of the memory card according to the fourth embodiment of the present invention.
  • FIG. 8 is a perspective view of the top of a memory card according to a fifth embodiment of the present invention.
  • FIG. 9 is a perspective view of the bottom of the memory card according to the fifth embodiment of the present invention.
  • FIG. 10 is a side view of the memory card according to the fifth embodiment of the present invention.
  • FIG. 11 is a top view of a circuit board used for various embodiments of the present invention.
  • FIG. 12 is a bottom view of the circuit board used for various embodiments of the present invention.
  • FIG. 13 is a cross section of an exemplar circuit board.
  • FIG. 14 is a cross sectional view of one embodiment of a circuit board and various components on the circuit board during the manufacturing process.
  • FIG. 15 is a cross sectional view of one embodiment of a circuit board and various components encapsulated on the circuit board during the manufacturing process.
  • FIG. 16 is a cross sectional view of one embodiment of a circuit board and various components on the circuit board, with a conformal contact coating applied to a surface of the circuit board.
  • FIG. 17 is a flow chart describing one embodiment of a process for manufacturing a memory card according to the present invention.
  • FIG. 18 is a plan view of a strip of memory cards prior to singulation.
  • FIG. 19 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 20 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 19 .
  • FIG. 21 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 22 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 21 .
  • FIGS. 1-10 depict various embodiments of a memory card.
  • FIG. 1 is a perspective view of the bottom of a memory card according to a first embodiment of the present invention.
  • FIG. 2 is a perspective view of the top of the memory card according to the first embodiment of the present invention.
  • FIG. 3 is a side view of the memory card according to the first embodiment of the present invention.
  • the memory card of FIGS. 1-3 includes a top surface 10 , a bottom surface, a front surface 12 , a back surface 14 and two side surfaces. One of the side surfaces has an angle portion 16 .
  • Top surface 10 has a raised portion 18 adjacent to back surface 14 .
  • Raised portion 18 allows the memory card to be more easily grabbed by a human hand (or mechanical device) and also provides additional room to store passive devices such as capacitors and/or resistors.
  • raised portion 18 of FIG. 1 has a curved profile.
  • the bottom surface includes a first portion 22 and a second portion 24 .
  • Second portion 24 is raised from first portion 22 .
  • First portion 22 includes a set of user I/O pins 26 and corresponds to a bottom surface of a circuit board, as discussed below.
  • the memory card is 12 mm wide and 15 mm long.
  • the angled portion is at a forty five degree angle.
  • the thickness of the memory card is 0.9 mm at second portion 24 , 1.0 mm at raised portion 18 and 0.8 mm at first portion 22 .
  • the thickness of the memory card is 0.8 mm at second portion 24 , 1.0 mm at raised portion 18 and 0.7 mm at first portion 22 . In other embodiments, other dimensions can also be used.
  • a label will be placed on the top surface.
  • This label can be a sticker or can be ink which is pad printed.
  • FIG. 4 is a perspective view of the top of a memory card according to a second embodiment of the present invention.
  • the second embodiment includes a raised portion 1 8 a that has a straight profile.
  • FIG. 5 is a perspective view of the top of a memory card according to a third embodiment of the present invention which does not include a raised portion 18 .
  • FIG. 6 is a perspective view of the top of a memory card according to a fourth embodiment of the present invention.
  • FIG. 7 is a perspective view of the bottom of the memory card according to the fourth embodiment of the present invention.
  • the fourth embodiment includes notch 30 . The notch is used to secure the card in position when connected to a host device.
  • FIG. 8 is a perspective view of the top of the memory card according to a fifth embodiment of the present invention.
  • FIG. 9 is a perspective view of the bottom of the memory card according to the fifth embodiment of the present invention.
  • FIG. 10 is a side view of the memory card according to the fifth embodiment of the present invention.
  • the fifth embodiment of the present invention implements a different orientation than the other embodiments described above.
  • the top surface of the memory card in the fifth embodiment includes a raised portion 54 adjacent back edge 52 , which runs along the length as opposed to the width of the memory card.
  • the memory card of the fifth embodiment includes a front surface 50 that also runs along the length of the memory card.
  • the bottom surface of the memory card includes a first portion 54 and second portion 56 .
  • First portion 54 includes a set of user I/O pins 58 and corresponds to a bottom surface of a circuit board, as discussed below.
  • Second portion 56 is raised from first portion 54 .
  • FIG. 11 provides a top view of a circuit board used for various embodiments of the present invention.
  • FIG. 11 shows circuit board 200 .
  • first die 202 and second die 204 are mounted on circuit board 200 .
  • die 202 includes a flash memory array with associated circuitry and die 204 includes a controller.
  • the memory card may include more than one memory array.
  • the dies can be components other than or in addition to memory arrays and controllers.
  • die 202 includes contacts 212 (e.g. die bond pads) which are used to connect die 202 to other components.
  • die 204 includes contacts 214 (e.g. die bond pads) to connect die 204 to other components.
  • Circuit board 200 also includes passive components 220 , which could include capacitors and/or resistors.
  • Circuit board 200 includes a number of conductive traces (not shown) which interconnect the devices mounted on the circuit board. Connecting regions (not depicted) are provided on the circuit board so that the leads from dies can be connected to the circuit board by conventional wire bonding. In other embodiments, other means different than wire bonding can be used to connect the dies to the circuit board.
  • FIG. 12 shows the bottom of circuit board 200 .
  • the bottom of circuit board 200 includes user I/O pins 230 and test pins 232 .
  • FIG. 12 depicts eight user I/O pins 230 and sixteen test pins 232 ; however, different numbers of pins can also be used.
  • the test pins 232 can include data pins and/or power pins.
  • the test pins are used to test one or more of the components of the memory card. For example, the test pins can be used to test each of the cells of the memory array.
  • the user I/O pins 230 are used by a host device connected to the memory card in order to communicate with the memory card. For example, the user I/O pins 230 can be used to communicate with the controller on die 204 .
  • one embodiment of the present invention includes mounting the integrated circuits on a first surface of the circuit board (e.g. the top surface) and forming the terminals (user I/O pins and test pins) on a conductive layer on another surface of the circuit board (e.g. the bottom surface).
  • FIG. 13 shows a cross sectional view of circuit board 200 .
  • FIG. 13 shows five layers 260 , 262 , 264 , 266 , and 268 .
  • Layer 260 the middle layer, is an insulating core layer.
  • Layers 262 and 264 are routing layers, which include conductive metal traces.
  • Layers 266 and 268 include solder masks. Connections between layers (such as layers 262 and 264 ) can be made by conductive vias.
  • the circuit board is a printed circuit board. In another embodiment, the circuit board is a lead frame. Other types of circuit boards may also be used within the spirit of the present invention.
  • FIGS. 14-16 graphically depict the manufacturing process for creating the memory card according one embodiment of the present invention.
  • FIG. 14 is a side view of the memory card during the manufacturing process, prior to encapsulation.
  • FIG. 14 depicts circuit board 200 .
  • Mounted on circuit board 200 is die 202 .
  • Mounted on die 202 is die 204 .
  • FIG. 14 shows die 202 and die 204 wire bonded to circuit board 200 .
  • FIG. 14 also shows passive devices 220 , which can be capacitors and/or resistors.
  • die 202 is mounted on circuit board 200 using an adhesive material.
  • the adhesive material may be an epoxy adhesive, soft solder or any other adhesive material for mounting a die to a substrate.
  • Die 204 is mounted on die 202 by way of an adhesive material applied to the top surface of die 202 and the bottom surface of die 204 . More information about stacking two dies on top of each other can be found in U.S. Pat. No. 5,502,289, incorporated herein by reference in its entirety.
  • the passive devices are surface mounted using solder.
  • FIG. 15 shows the memory card of FIG. 14 after encapsulation. That is, using an injection mold process or a transfer mold process, molding material 280 is used to encapsulate the components of the memory card. Note that the encapsulation covers the side surfaces, front surface, back surface, and top surface of circuit board 200 . The encapsulation also covers all the components mounted on the top surface of circuit board 200 . The bottom surface of circuit board 200 , which includes user I/O pins 230 and test pins 232 , is not covered by the encapsulation.
  • a conformal contact coating 290 is applied to a portion of the bottom surface of circuit board 200 in order to cover test pins 232 .
  • the conformal contact coating does not cover user I/O pins 230 .
  • FIG. 16 depicts the memory card after the conformal contact coating 290 has been applied.
  • the conformal contact coating 290 is applied to portion 24 (see FIG. 1 ) of the bottom surface of the memory card, but not to portion 22 of the memory card.
  • the conformal contact coating protects the test pins from electrostatic discharge and protects the data in the memory from unwanted access via the test pins by blocking the test pins.
  • the coating is a conformal contact coating because it conforms to the shape of the surface it is being applied to and it is in direct contact to that surface.
  • Some other memory cards may use a lid to cover the bottom of the circuit board. That lid is not in contact with the bottom surface of the circuit board. Rather, an air gap will exist between the bottom lid and circuit board. Additionally, because the lid is prefabricated it will not conform to the shape of the bottom surface of the bottom of the circuit board.
  • the application of the conformal contact coating includes applying a liquid directly to the bottom surface of the circuit board.
  • the coating then dries to a solid.
  • the coating is applied as a film directly to the bottom surface of the circuit board.
  • coatings include photoresist, solder mask, epoxy, thermoplastic, and polyimide.
  • PSR-400 Solder Mask from Taiyo America, Inc., www.taivo-america.com.
  • a film include mylar with an adhesive or polyimide with an adhesive.
  • An example of a suitable polyimide is Kapton, by DuPont.
  • One example of how to apply a liquid coating is to use a screen printing process.
  • FIG. 17 is a flowchart depicting one embodiment of a process for manufacturing a memory card according to the present invention.
  • vias are drilled in the circuit board.
  • a top pattern is applied to circuit board 200 to add the conductive traces and connection regions discussed above.
  • a bottom pattern is applied to the bottom surface of circuit board 200 to add the user I/O pins 230 , 232 test pins and conductive traces.
  • solder mask is added to the top surface of circuit board 200 .
  • step 408 the solder mask is added to the bottom surface of circuit board 200 .
  • first die 202 is mounted to circuit board 200 .
  • step 412 second die 204 is mounted to circuit board 200 .
  • step 414 passive devices 220 are mounted to circuit board 200 .
  • step 416 wire bonds are added to connect dies 202 and 204 to circuit board 200 .
  • protective coatings are applied to the wire bonds and/or the dies.
  • step 418 circuit board 200 and the components mounted on circuit board 200 are subject to a transfer mold process so that the circuit board and its components are encapsulated, as described above. However, the encapsulation process of step 418 does not cover the bottom surface of circuit board 200 .
  • a memory card is manufactured as a unitary structure. In that case, step 420 is skipped and the process of FIG. 17 proceeds to step 422 .
  • the memory cards are produced a batch at a time. That is, a strip of memory cards are produced at one time and then a singulation process is performed to cut the strip into individualized memory cards.
  • step 420 includes cutting the strip to separate the various memory cards. Step 420 is referred to as singulation.
  • step 422 the memory cards are tested.
  • step 424 the test pins are covered, as described above, by applying the conformal contact coating to a portion of the bottom surface of the circuit board 200 (e.g. bottom portion 24 of FIG. 1 ).
  • Step 422 includes testing the memory cards.
  • the manufacturer may perform a bum-in test of the memory card to verify that each of the memory cells in the memory array are functional. The manufacturer may then program the memory card to avoid bad memory cells.
  • the memory array may include a portion of memory that stores addresses for bad memory cells and pointers to replacement memory cells.
  • the other components of the memory card may also be tested. Note that FIG. 17 shows that the devices are tested and receive the conformal contact coating after singulation. In another embodiment, step 420 is performed after to step 422 ; therefore, the various devices are tested and receive the conformal contact coating prior to singulation.
  • FIG. 18 is a plan view of a strip of memory cards prior to singulation.
  • FIG. 18 shows strip 500 .
  • Strip 500 On top of strip 500 are various instances of the memory cards. Each memory card is depicted in dashed lines.
  • strip 500 includes 100 memory cards (5 wide, 20 long). Note that other numbers of memory cards can also be manufactured on a strip.
  • Strip 500 is manufactured by performing steps 400 - 418 simultaneously for each of the memory cards on the strip. That is, the steps are performed on the strip as a whole.
  • Step 420 is performed by cutting the strip into separate devices.
  • the memory cards are not fully rectangular in their shape. Therefore, the singulation of the strip into individual memory cards includes nonlinear (e.g. curvilinear) sawings.
  • Such sawing can be performed efficiently with a very thin saw with high precision and detail, such that the sawing action is very fine.
  • the sawing devices include, for example, a water jet cutting device, a laser cutting apparatus, a water guided laser, a dry media cutting device, and a diamond coated wire.
  • Water jet cutting may be the preferred cutting method given its small cutting width (e.g. 50 microns), its ability to shape small features and its rapid cutting rate.
  • the failed memory card can be debugged by removing the conformal contact coating and using the test pins to test the memory card.
  • FIG. 19 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 20 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 19 .
  • Card 600 depicted in FIGS. 19 and 20 includes rounded notches 602 and 604 , raised portion 606 and angled portion 608 .
  • Bottom surface 612 includes pins 620 and portion 622 .
  • Portion 622 is raised from surface 612 and covers the test pins as described herein.
  • FIG. 21 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 22 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 21 .
  • Card 700 depicted in FIGS. 21 and 22 includes notch 702 , raised portion 706 and angled portion 708 .
  • Bottom surface 712 includes pins 720 and portion 722 .
  • Portion 722 is raised from surface 712 and covers the test pins as described herein.
  • memory cards One set of embodiments of the present invention specifically pertain to flash memory cards, which include one or more memory arrays that utilize flash memory technology.
  • flash memory cards which include one or more memory arrays that utilize flash memory technology.
  • the embodiments explained above pertaining to memory cards are for example purposes and are not mean to limit the invention.
  • the technology disclosed herein can also be applied to other peripheral cards that connect to a computing device and are controlled or operated with the computing device.
  • a removable peripheral card is a PCMCIA card.
  • applications, in addition to memory systems, that can be implemented on peripheral cards include wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, etc.
  • the present invention is not limited to any one type of peripheral card and is meant to be used with many different types of peripheral cards.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Credit Cards Or The Like (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Coupling Device And Connection With Printed Circuit (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)

Abstract

A peripheral card includes a circuit board, various circuit elements on the circuit board, a set of user terminals, a set of test terminals, and an enclosure that covers a portion of the circuit board and the circuit elements. The enclosure does not cover the user terminals and test terminals. After the peripheral card is tested, the test terminals are covered with a conformal contact coating in order to prevent access to the test terminals.

Description

    CROSS-REFERENCE TO RELATED APPLICATIONS
  • This Application is related to U.S. patent application Ser. No. ______, “Method For Efficiently Producing Removable Peripheral Cards,” filed Jun. 23, 2003, Hem P. Takiar, Atty. Docket SDK1P014/370, which is incorporated herein by reference in its entirety.
    • BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention is directed to technology for peripheral cards.
  • 2. Description of the Related Art
  • Memory cards are relatively small removable cards that provide data storage. In most cases, but not required in all cases, the memory card is integrated circuit based. These memory cards plug into or are received by ports or connectors on electronic devices, including computing devices, cameras, mobile telephones, PDAs and other devices. One example of a memory card uses non-volatile memory. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories. Some examples of memory cards includes CompactFlash™, MMC™, Smart Media, Secure Digital™, and the Memory Stick.
  • A flash memory card is a memory card that has one or more arrays of flash memory cells. Some flash memory cards also include bit line decoders, word line decoders, a state machine, a controller and other circuitry. In many cases the controller will be implemented in a first semiconductor die, while the array of flash memory cells, bit line decoders, word line decoders, and state machine are implemented in a second semiconductor die. Over time, flash memory arrays have increased density by shrinking the size of an individual memory cell and by implementing greater numbers of memory cells in the array.
  • To maintain product reliability and customer satisfaction, manufacturers of memory cards will test the memory cards during the manufacturing process in order to determine if there are any manufacturing defects. In many cases, the user I/O pins on the memory card connect to the controller. However, a test performed during manufacturing typically seeks to directly access the memory array (bypassing the controller) in order to test each cell in the memory array. Additionally, more pins will allow for more efficient and complete testing of the relevant components of the memory card. Thus, many memory cards will include test pins, in addition to the user I/O pins. To protect the memory card from electrostatic discharge relative to the test pins and to protect the data on the card from being wrongfully accessed via the test pins, the test pins should not be exposed to the user of the memory card after the manufacturing process.
  • One example of a memory card is described in U.S. Pat. No. 6,410,355 (the '355 patent”), incorporated herein by reference in its entirety. In the '355 patent, a memory card using flash memory is manufactured with a set of test pins at one edge of the memory card. After the memory card is tested, the test pins are cut off of the memory card and the memory card is then packaged. While the device of the '355 patent has worked well, there is a need for an improvement. First, the test pins that are cut off use real estate on the circuit board. There is a trend to increase density on circuit boards; therefore, it would be advantageous to not use a portion of the circuit board for components that will not ship to customers. Second, if the memory card fails in the field, there are no test pins to test the device in order to determine why the memory card failed. Such tests following device failure allow a manufacturer of memory cards to improve device reliability and the manufacturing process.
  • Another example of a memory card using flash memory is the recently released Mini-SD Card. In one commercial version of the Mini-SD Card, the memory array is mounted on the top of the circuit board and the controller is mounted on the memory array. User I/O pins and test pins are formed on the bottom of the circuit board. After the memory card is tested, the circuit board (with the controller, memory array and other components) are enclosed by attaching a top lid to a bottom lid. Both the bottom lid and the top lid are made of a hard plastic, and are manufactured from a mold prior to enclosing the circuit board. After the top and bottom lids are made, the top lid is ultra- sonically welded to the bottom lid to enclose the circuit board (with the controller, memory array and other components). The bottom lid has an opening for the user I/O pins. The bottom lid does not have an opening for the test pins; therefore, the test pins are not exposed to users. There will be a small air gap between the bottom lid and the bottom of the circuit board While this design works well, the top and bottom lids are relatively expensive to manufacture. Additionally, the lids are relatively bulky which limits how small the memory cards can be manufactured. The trend in the industry to further decrease the size of memory cards.
  • Thus, there is a need to provide for test pins for a memory card without the limitations described above. Similar issues exist with other types of peripheral cards, such as peripheral cards that implement wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, and other devices.
    • SUMMARY OF THE INVENTION
  • The present invention, roughly described, pertains to technology for a peripheral card with hidden test pins. One embodiment of the present invention includes a circuit board, circuit elements on said circuit board, a set of user terminals on the circuit board that are in communication with at least a subset of the circuit elements, a set of test terminals on said circuit board that are in communication with one or more of the circuit elements, an enclosure that covers a portion of the circuit board without covering the set of user terminals and the set of test terminals, and a conformal contact coating on a first surface of the circuit board covering the test terminals and preventing access to the test terminals.
  • One embodiment of manufacturing such a peripheral card includes adding circuit elements to a circuit board, where the circuit board (at some point in time) includes a set of test terminals. One or more of the circuit elements are tested using the test terminals. The test terminals are subsequently covered with a conformal contact coating in order to prevent access to the test terminals. In one implementation, the test terminals are covered with a conformal contact coating by applying a liquid directly to a first surface of the circuit board. In another implementation, the test terminals are covered with a conformal contact coating by applying a film directly to a first surface of said circuit board.
  • Some embodiments of the present invention will include manufacturing the peripheral cards a batch at a time, followed by singulation of the batch into individualized memory cards. The present invention allows for the covering of the test pins before or after singulation. For example, one implementation includes the steps of adding circuit elements to a plurality of circuit boards of a strip (each of the plurality of circuit boards includes a set of test terminals), separating the connected circuit boards, testing the circuit elements of the circuit boards using the test terminals, and applying a conformal contact coating on a first surface of each of the circuit boards. The conformal contact coating covers the test terminals and prevents access to the test terminals such that a particular circuit board has its test terminals covered after that particular circuit board has been tested.
  • The present invention can be applied to the manufacture of memory cards, including flash memory cards. The technology disclosed herein can also be applied to other peripheral cards. For example, the present invention can be used with removable peripheral cards that include wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, and other devices. The present invention is not limited to any one type of peripheral card and is meant to be used with many different types of peripheral cards.
  • These and other objects and advantages of the present invention will appear more clearly from the following description in which the preferred embodiment of the invention has been set forth in conjunction with the drawings.
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 is a perspective view of the bottom of a memory card according to a first embodiment of the present invention.
  • FIG. 2 is a perspective view of the top of the memory card according to the first embodiment of the present invention.
  • FIG. 3 is a first side view of the memory card according to the first embodiment of the present invention.
  • FIG. 4 is a perspective view of the top of a memory card according to a second embodiment of the present invention.
  • FIG. 5 is a perspective view of the top of a memory card according to a third embodiment of the present invention.
  • FIG. 6 is a perspective view of the top of a memory card according to a fourth embodiment of the present invention.
  • FIG. 7 is a perspective view of the bottom of the memory card according to the fourth embodiment of the present invention.
  • FIG. 8 is a perspective view of the top of a memory card according to a fifth embodiment of the present invention.
  • FIG. 9 is a perspective view of the bottom of the memory card according to the fifth embodiment of the present invention.
  • FIG. 10 is a side view of the memory card according to the fifth embodiment of the present invention.
  • FIG. 11 is a top view of a circuit board used for various embodiments of the present invention.
  • FIG. 12 is a bottom view of the circuit board used for various embodiments of the present invention.
  • FIG. 13 is a cross section of an exemplar circuit board.
  • FIG. 14 is a cross sectional view of one embodiment of a circuit board and various components on the circuit board during the manufacturing process.
  • FIG. 15 is a cross sectional view of one embodiment of a circuit board and various components encapsulated on the circuit board during the manufacturing process.
  • FIG. 16 is a cross sectional view of one embodiment of a circuit board and various components on the circuit board, with a conformal contact coating applied to a surface of the circuit board.
  • FIG. 17 is a flow chart describing one embodiment of a process for manufacturing a memory card according to the present invention.
  • FIG. 18 is a plan view of a strip of memory cards prior to singulation.
  • FIG. 19 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 20 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 19.
  • FIG. 21 is a perspective view of the top of the memory card according to an additional embodiment of the present invention.
  • FIG. 22 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 21.
    • DETAILED DESCRIPTION
  • FIGS. 1-10 depict various embodiments of a memory card. For example, FIG. 1 is a perspective view of the bottom of a memory card according to a first embodiment of the present invention. FIG. 2 is a perspective view of the top of the memory card according to the first embodiment of the present invention. FIG. 3 is a side view of the memory card according to the first embodiment of the present invention. The memory card of FIGS. 1-3 includes a top surface 10, a bottom surface, a front surface 12, a back surface 14 and two side surfaces. One of the side surfaces has an angle portion 16. Top surface 10 has a raised portion 18 adjacent to back surface 14. Raised portion 18 allows the memory card to be more easily grabbed by a human hand (or mechanical device) and also provides additional room to store passive devices such as capacitors and/or resistors. Note that raised portion 18 of FIG. 1 has a curved profile. The bottom surface includes a first portion 22 and a second portion 24. Second portion 24 is raised from first portion 22. First portion 22 includes a set of user I/O pins 26 and corresponds to a bottom surface of a circuit board, as discussed below.
  • In one implementation, the memory card is 12 mm wide and 15 mm long. The angled portion is at a forty five degree angle. The thickness of the memory card is 0.9 mm at second portion 24, 1.0 mm at raised portion 18 and 0.8 mm at first portion 22. In another embodiment, the thickness of the memory card is 0.8 mm at second portion 24, 1.0 mm at raised portion 18 and 0.7 mm at first portion 22. In other embodiments, other dimensions can also be used.
  • In one embodiment, a label will be placed on the top surface. This label can be a sticker or can be ink which is pad printed.
  • FIG. 4 is a perspective view of the top of a memory card according to a second embodiment of the present invention. The second embodiment includes a raised portion 1 8a that has a straight profile. FIG. 5 is a perspective view of the top of a memory card according to a third embodiment of the present invention which does not include a raised portion 18.
  • FIG. 6 is a perspective view of the top of a memory card according to a fourth embodiment of the present invention. FIG. 7 is a perspective view of the bottom of the memory card according to the fourth embodiment of the present invention. The fourth embodiment includes notch 30. The notch is used to secure the card in position when connected to a host device.
  • FIG. 8 is a perspective view of the top of the memory card according to a fifth embodiment of the present invention. FIG. 9 is a perspective view of the bottom of the memory card according to the fifth embodiment of the present invention. FIG. 10 is a side view of the memory card according to the fifth embodiment of the present invention. The fifth embodiment of the present invention implements a different orientation than the other embodiments described above. For example, the top surface of the memory card in the fifth embodiment includes a raised portion 54 adjacent back edge 52, which runs along the length as opposed to the width of the memory card. The memory card of the fifth embodiment includes a front surface 50 that also runs along the length of the memory card. The bottom surface of the memory card includes a first portion 54 and second portion 56. First portion 54 includes a set of user I/O pins 58 and corresponds to a bottom surface of a circuit board, as discussed below. Second portion 56 is raised from first portion 54.
  • FIG. 11 provides a top view of a circuit board used for various embodiments of the present invention. FIG. 11 shows circuit board 200. Mounted on circuit board 200 are first die 202 and second die 204. In one embodiment, die 202 includes a flash memory array with associated circuitry and die 204 includes a controller. In some embodiments, the memory card may include more than one memory array. In embodiments that include a peripheral card other than a memory card, the dies can be components other than or in addition to memory arrays and controllers. Note that die 202 includes contacts 212 (e.g. die bond pads) which are used to connect die 202 to other components. Similarly, die 204 includes contacts 214 (e.g. die bond pads) to connect die 204 to other components. Circuit board 200 also includes passive components 220, which could include capacitors and/or resistors. Circuit board 200 includes a number of conductive traces (not shown) which interconnect the devices mounted on the circuit board. Connecting regions (not depicted) are provided on the circuit board so that the leads from dies can be connected to the circuit board by conventional wire bonding. In other embodiments, other means different than wire bonding can be used to connect the dies to the circuit board.
  • FIG. 12 shows the bottom of circuit board 200. In one embodiment, the bottom of circuit board 200 includes user I/O pins 230 and test pins 232. FIG. 12 depicts eight user I/O pins 230 and sixteen test pins 232; however, different numbers of pins can also be used. The test pins 232 can include data pins and/or power pins. The test pins are used to test one or more of the components of the memory card. For example, the test pins can be used to test each of the cells of the memory array. The user I/O pins 230 are used by a host device connected to the memory card in order to communicate with the memory card. For example, the user I/O pins 230 can be used to communicate with the controller on die 204. Note that in order to have a small package, one embodiment of the present invention includes mounting the integrated circuits on a first surface of the circuit board (e.g. the top surface) and forming the terminals (user I/O pins and test pins) on a conductive layer on another surface of the circuit board (e.g. the bottom surface).
  • FIG. 13 shows a cross sectional view of circuit board 200. FIG. 13 shows five layers 260, 262, 264, 266, and 268. Other embodiments have less than or more than five layers. Layer 260, the middle layer, is an insulating core layer. Layers 262 and 264 are routing layers, which include conductive metal traces. Layers 266 and 268 include solder masks. Connections between layers (such as layers 262 and 264) can be made by conductive vias. In one embodiment, the circuit board is a printed circuit board. In another embodiment, the circuit board is a lead frame. Other types of circuit boards may also be used within the spirit of the present invention.
  • FIGS. 14-16 graphically depict the manufacturing process for creating the memory card according one embodiment of the present invention. FIG. 14 is a side view of the memory card during the manufacturing process, prior to encapsulation. FIG. 14 depicts circuit board 200. Mounted on circuit board 200 is die 202. Mounted on die 202 is die 204. FIG. 14 shows die 202 and die 204 wire bonded to circuit board 200. FIG. 14 also shows passive devices 220, which can be capacitors and/or resistors. In one embodiment, die 202 is mounted on circuit board 200 using an adhesive material. The adhesive material may be an epoxy adhesive, soft solder or any other adhesive material for mounting a die to a substrate. Die 204 is mounted on die 202 by way of an adhesive material applied to the top surface of die 202 and the bottom surface of die 204. More information about stacking two dies on top of each other can be found in U.S. Pat. No. 5,502,289, incorporated herein by reference in its entirety. In one embodiment, the passive devices are surface mounted using solder.
  • FIG. 15 shows the memory card of FIG. 14 after encapsulation. That is, using an injection mold process or a transfer mold process, molding material 280 is used to encapsulate the components of the memory card. Note that the encapsulation covers the side surfaces, front surface, back surface, and top surface of circuit board 200. The encapsulation also covers all the components mounted on the top surface of circuit board 200. The bottom surface of circuit board 200, which includes user I/O pins 230 and test pins 232, is not covered by the encapsulation.
  • Subsequent to encapsulation, a conformal contact coating 290 is applied to a portion of the bottom surface of circuit board 200 in order to cover test pins 232. The conformal contact coating does not cover user I/O pins 230. FIG. 16 depicts the memory card after the conformal contact coating 290 has been applied. For example, the conformal contact coating 290 is applied to portion 24 (see FIG. 1) of the bottom surface of the memory card, but not to portion 22 of the memory card. The conformal contact coating protects the test pins from electrostatic discharge and protects the data in the memory from unwanted access via the test pins by blocking the test pins. The coating is a conformal contact coating because it conforms to the shape of the surface it is being applied to and it is in direct contact to that surface. Some other memory cards may use a lid to cover the bottom of the circuit board. That lid is not in contact with the bottom surface of the circuit board. Rather, an air gap will exist between the bottom lid and circuit board. Additionally, because the lid is prefabricated it will not conform to the shape of the bottom surface of the bottom of the circuit board.
  • In one embodiment, the application of the conformal contact coating includes applying a liquid directly to the bottom surface of the circuit board. The coating then dries to a solid. In another embodiment, the coating is applied as a film directly to the bottom surface of the circuit board. Examples of coatings include photoresist, solder mask, epoxy, thermoplastic, and polyimide. One specific example of a suitable coating is the PSR-400 Solder Mask from Taiyo America, Inc., www.taivo-america.com. Examples of a film include mylar with an adhesive or polyimide with an adhesive. An example of a suitable polyimide is Kapton, by DuPont. One example of how to apply a liquid coating is to use a screen printing process.
  • FIG. 17 is a flowchart depicting one embodiment of a process for manufacturing a memory card according to the present invention. In step 400, vias are drilled in the circuit board. In step 402, a top pattern is applied to circuit board 200 to add the conductive traces and connection regions discussed above. In step 404, a bottom pattern is applied to the bottom surface of circuit board 200 to add the user I/O pins 230, 232 test pins and conductive traces. In step 406, solder mask is added to the top surface of circuit board 200. In step 408, the solder mask is added to the bottom surface of circuit board 200. In step 410, first die 202 is mounted to circuit board 200. In step 412, second die 204 is mounted to circuit board 200. In step 414, passive devices 220 are mounted to circuit board 200. In step 416, wire bonds are added to connect dies 202 and 204 to circuit board 200. In one embodiment, protective coatings are applied to the wire bonds and/or the dies. In step 418, circuit board 200 and the components mounted on circuit board 200 are subject to a transfer mold process so that the circuit board and its components are encapsulated, as described above. However, the encapsulation process of step 418 does not cover the bottom surface of circuit board 200.
  • In one embodiment, a memory card is manufactured as a unitary structure. In that case, step 420 is skipped and the process of FIG. 17 proceeds to step 422. However, in other embodiments the memory cards are produced a batch at a time. That is, a strip of memory cards are produced at one time and then a singulation process is performed to cut the strip into individualized memory cards. In the case where the memory cards are produced at a batch at a time, step 420 includes cutting the strip to separate the various memory cards. Step 420 is referred to as singulation.
  • In step 422, the memory cards are tested. In step 424, the test pins are covered, as described above, by applying the conformal contact coating to a portion of the bottom surface of the circuit board 200 (e.g. bottom portion 24 of FIG. 1).
  • Step 422 includes testing the memory cards. During the manufacturing process, the manufacturer may perform a bum-in test of the memory card to verify that each of the memory cells in the memory array are functional. The manufacturer may then program the memory card to avoid bad memory cells. For example, the memory array may include a portion of memory that stores addresses for bad memory cells and pointers to replacement memory cells. In some embodiments, the other components of the memory card may also be tested. Note that FIG. 17 shows that the devices are tested and receive the conformal contact coating after singulation. In another embodiment, step 420 is performed after to step 422; therefore, the various devices are tested and receive the conformal contact coating prior to singulation.
  • FIG. 18 is a plan view of a strip of memory cards prior to singulation. FIG. 18 shows strip 500. On top of strip 500 are various instances of the memory cards. Each memory card is depicted in dashed lines. In one embodiment, strip 500 includes 100 memory cards (5 wide, 20 long). Note that other numbers of memory cards can also be manufactured on a strip. Strip 500 is manufactured by performing steps 400-418 simultaneously for each of the memory cards on the strip. That is, the steps are performed on the strip as a whole. Step 420 is performed by cutting the strip into separate devices. According to one aspect of the present invention, the memory cards are not fully rectangular in their shape. Therefore, the singulation of the strip into individual memory cards includes nonlinear (e.g. curvilinear) sawings. Such sawing can be performed efficiently with a very thin saw with high precision and detail, such that the sawing action is very fine. Examples of the sawing devices include, for example, a water jet cutting device, a laser cutting apparatus, a water guided laser, a dry media cutting device, and a diamond coated wire. Water jet cutting may be the preferred cutting method given its small cutting width (e.g. 50 microns), its ability to shape small features and its rapid cutting rate.
  • If the memory card fails after it is in use, then the failed memory card can be debugged by removing the conformal contact coating and using the test pins to test the memory card.
  • FIG. 19 is a perspective view of the top of the memory card according to an additional embodiment of the present invention. FIG. 20 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 19. Card 600 depicted in FIGS. 19 and 20 includes rounded notches 602 and 604, raised portion 606 and angled portion 608. Bottom surface 612 includes pins 620 and portion 622. Portion 622 is raised from surface 612 and covers the test pins as described herein.
  • FIG. 21 is a perspective view of the top of the memory card according to an additional embodiment of the present invention. FIG. 22 is a perspective view of the bottom of the memory card according to the embodiment of FIG. 21. Card 700 depicted in FIGS. 21 and 22 includes notch 702, raised portion 706 and angled portion 708. Bottom surface 712 includes pins 720 and portion 722. Portion 722 is raised from surface 712 and covers the test pins as described herein.
  • The description above specifically discusses memory cards. One set of embodiments of the present invention specifically pertain to flash memory cards, which include one or more memory arrays that utilize flash memory technology. The embodiments explained above pertaining to memory cards are for example purposes and are not mean to limit the invention. The technology disclosed herein can also be applied to other peripheral cards that connect to a computing device and are controlled or operated with the computing device. One example of a removable peripheral card is a PCMCIA card. Examples of applications, in addition to memory systems, that can be implemented on peripheral cards include wireless communication devices, GPS devices, cellular devices, network interfaces, modems, disk storage systems, etc. The present invention is not limited to any one type of peripheral card and is meant to be used with many different types of peripheral cards.
  • The foregoing detailed description of the invention has been presented for purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. The described embodiments were chosen in order to best explain the principles of the invention and its practical application to thereby enable others skilled in the art to best utilize the invention in various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the claims appended hereto.

Claims (51)

1. A method of making a memory card card, comprising the steps of:
adding circuit elements to a circuit board, said circuit board includes a set of test terminals;
testing one or more of said circuit elements using said test terminals; and
covering said test terminals with a conformal contact coating in order to prevent access to said test terminals.
2. A method according to claim 1, wherein:
said step of covering includes applying a liquid directly to a first surface of said circuit board.
3. A method according to claim 2, wherein:
said liquid includes a solder mask.
4. A method according to claim 2, wherein:
said liquid includes a photoresist.
5. A method according to claim 2, wherein:
said liquid includes a thermoplastic.
6. A method according to claim 2, wherein:
said liquid includes an epoxy.
7. A method according to claim 2, wherein:
said liquid includes polyimide.
8. A method according to claim 2, wherein:
said liquid is applied using a screen printing process.
9. A method according to claim 1, wherein:
said step of covering includes applying a film directly to a first surface of said circuit board.
10. A method according to claim 9, wherein:
said film includes an adhesive on one surface.
11. A method according to claim 9, wherein:
said film includes mylar.
12. A method according to claim 9, wherein:
said film includes polyimide.
13. A method according to claim 1, wherein:
said step of adding circuit elements includes adding a flash memory array to said circuit board.
14. A method according to claim 1, wherein:
said step of adding circuit elements includes mounting a first die on said circuit board and mounting a second die on said first die.
15. A method according to claim 14, wherein:
said first die includes a flash memory array and said second die includes a controller.
16. A method according to claim 14, wherein:
said first die is wire bonded to said circuit board; and
said second die is wire bonded to said circuit board.
17. A method according to claim 1, wherein:
said circuit board includes a conductive layer and a first portion of said conductive layer forms said test terminals.
18. A method according to claim 17, wherein:
a second portion of said conductive layer forms user terminals;
said user terminals are positioned on an outside surface of said memory card; and
said user terminals are in communication with at least a subset of said circuit elements.
19. A method according to claim 1, wherein:
said step of adding circuit elements includes performing a transfer mold process to encapsulate said circuit elements without covering said test terminals.
20. A method according to claim 1, wherein:
said step of covering is performed after said circuit board is removed from a strip of circuit boards.
21. A method according to claim 1, wherein:
said step of covering is performed before said circuit board is removed from a strip of circuit boards.
22. A method according to claim 1, wherein:
said memory card is a flash memory card.
23. A method according to claim 22, wherein:
said step of covering includes applying a liquid directly to a first surface of said circuit board.
24. A method according to claim 22, wherein:
said step of covering includes applying a film directly to a first surface of said circuit board.
25. A method of making a peripheral card, comprising the steps of:
adding circuit elements to a plurality of circuit boards of a strip of circuit boards, each of said plurality of circuit boards includes a set of test terminals;
separating said connected circuit boards;
testing said circuit elements of said circuit boards using said test terminals; and
applying a conformal contact coating on a first surface of each of said circuit boards to cover said test terminals and prevent access to said test terminals such that a particular circuit board has its test terminals covered after said particular circuit board has been tested.
26. A method according to claim 25, wherein:
said step of separating is performed after said step of applying.
27. A method according to claim 25, wherein:
said step of separating is performed prior to said step of applying.
28. A method according to claim 25, wherein:
said step of applying includes applying a liquid directly to a first surface of said circuit boards.
29. A method according to claim 25, wherein:
said step of applying includes applying a film directly to a first surface of said circuit boards.
30. A method according to claim 25, wherein:
said step of adding circuit elements includes mounting a first die on a first circuit board and mounting a second die on said first die;
said first die includes a flash memory array and said second die includes a controller;
said first die is wire bonded to said first circuit board; and
said second die is wire bonded to said first circuit board.
31. A method according to claim 25, wherein:
said peripheral card is a memory card.
32. A peripheral card manufactured according to a process comprising the steps of:
adding circuit elements to a circuit board, said circuit board includes a set of test terminals;
testing one or more of said circuit elements using said test terminals; and
applying a conformal contact coating on a first surface of said circuit board to cover said test terminals and prevent access to said test terminals.
33. A peripheral card according to claim 32, wherein:
said step of applying includes applying a liquid directly to a first surface of said circuit board.
34. A peripheral card according to claim 32, wherein:
said step of applying includes applying a film directly to a first surface of said circuit board.
35. A peripheral card according to claim 32, wherein:
said circuit board includes a first die mounted on said circuit board and a second die mounted on said first die;
said first die includes a flash memory array and said second die includes a controller;
said first die is wire bonded to said circuit board; and
said second die is wire bonded to said circuit board.
36. A peripheral card according to claim 32, wherein:
said circuit board includes a conductive layer;
a first portion of said conductive layer forms said test terminals;
a second portion of said conductive layer forms user terminals;
said user terminals are positioned on an outside surface of said peripheral card; and
said circuit elements are encapsulated by a transfer mold process without covering said test terminals.
37. A peripheral card according to claim 32, wherein:
said peripheral card is a memory card.
38. A peripheral card, comprising:
a circuit board;
circuit elements on said circuit board;
a set of user terminals on said circuit board, said user terminals are in communication with at least a subset of said circuit elements;
a set of test terminals on said circuit board, said test terminals are in communication with one or more of said circuit elements;
an enclosure that covers a portion of said circuit board and said circuit elements without covering said set of user terminals and said set of test terminals; and
a conformal contact coating on a first surface of said circuit board covering said test terminals and preventing access to said test terminals.
39. A peripheral card according to claim 38, wherein:
said conformal contact coating is applied as a liquid directly to said first surface of said circuit board.
40. A peripheral card according to claim 38, wherein:
said conformal contact coating includes a film that is applied directly to said first surface of said circuit board.
41. A peripheral card according to claim 38, wherein:
said circuit elements board include a first die mounted on said circuit board and a second die mounted on said first die.
42. A peripheral card according to claim 41, wherein:
said first die is wire bonded to said circuit board; and
said second die is wire bonded to said circuit board.
43. A peripheral card according to claim 42, wherein:
said first die includes a flash memory array and said second die includes a controller.
44. A peripheral card according to claim 41, wherein:
said first die includes a flash memory array and said second die includes a controller.
45. A peripheral card according to claim 38, wherein:
said circuit board includes a conductive layer;
a first portion of said conductive layer forms said test terminals;
a second portion of said conductive layer forms said user terminals; and
said user terminals are positioned on an outside surface of said peripheral card.
46. A peripheral card according to claim 38, wherein:
said peripheral card is a memory card.
47. A method performed for a peripheral card, comprising the steps of:
testing one or more circuit elements of a first peripheral card using one or more test terminals of said first peripheral card; and
covering said test terminals with a conformal contact coating in order to prevent access to said test terminals.
48. A method according to claim 47, wherein:
said step of covering includes applying a liquid directly to said first peripheral card.
49. A method according to claim 47, wherein:
said step of covering includes applying a film directly to said first peripheral card.
50. A method according to claim 47, wherein:
said circuit elements include a flash memory array.
51. A method according to claim 47, wherein:
said first peripheral card is a memory card.
US10/621,882 2003-07-17 2003-07-17 Peripheral card with hidden test pins Abandoned US20050013106A1 (en)

Priority Applications (19)

Application Number Priority Date Filing Date Title
US10/621,882 US20050013106A1 (en) 2003-07-17 2003-07-17 Peripheral card with hidden test pins
US10/782,969 US7307848B2 (en) 2003-07-17 2004-02-20 Memory card with raised portion
US10/851,466 US7416132B2 (en) 2003-07-17 2004-05-20 Memory card with and without enclosure
TW093119088A TWI251785B (en) 2003-07-17 2004-06-29 Memory card with raised portion
TW093119109A TWI248619B (en) 2003-07-17 2004-06-29 Peripheral card with hidden test pins
KR1020067001156A KR101199600B1 (en) 2003-07-17 2004-06-30 Memory card with raised portion
JP2006520207A JP2007531920A (en) 2003-07-17 2004-06-30 Peripheral card with hidden test pin
CN200480020546A CN100589121C (en) 2003-07-17 2004-06-30 Storage card with bossing
PCT/US2004/021253 WO2005010812A1 (en) 2003-07-17 2004-06-30 Peripheral card with hidden test pins
CNA2004800205453A CN1823341A (en) 2003-07-17 2004-06-30 Memory card with raised portion
JP2006520195A JP2007531083A (en) 2003-07-17 2004-06-30 Memory card with ridge
KR1020067001155A KR20060063896A (en) 2003-07-17 2004-06-30 Peripheral card with hidden test pins
PCT/US2004/020898 WO2005010808A2 (en) 2003-07-17 2004-06-30 Memory card with raised portion
EP04777413A EP1649413A1 (en) 2003-07-17 2004-06-30 Peripheral card with hidden test pins
EP04756368A EP1649410A2 (en) 2003-07-17 2004-06-30 Memory card with raised portion
US10/952,609 US7306160B2 (en) 2003-07-17 2004-09-28 Memory card with adapter
US10/952,591 US7336498B2 (en) 2003-07-17 2004-09-28 Memory card with push-push connector
US10/995,989 US7306161B2 (en) 2003-07-17 2004-11-23 Memory card with chamfer
US11/930,909 US7864540B2 (en) 2003-07-17 2007-10-31 Peripheral card with sloped edges

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/621,882 US20050013106A1 (en) 2003-07-17 2003-07-17 Peripheral card with hidden test pins

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
US29/186,546 Continuation-In-Part USD525248S1 (en) 2003-07-17 2003-07-17 Memory card
US29/194,064 Continuation-In-Part USD523435S1 (en) 2003-07-17 2003-11-19 Memory card

Related Child Applications (4)

Application Number Title Priority Date Filing Date
US29/186,546 Continuation-In-Part USD525248S1 (en) 2003-07-17 2003-07-17 Memory card
US29/194,064 Continuation-In-Part USD523435S1 (en) 2003-07-17 2003-11-19 Memory card
US10/782,969 Continuation US7307848B2 (en) 2003-07-17 2004-02-20 Memory card with raised portion
US10/851,466 Continuation-In-Part US7416132B2 (en) 2003-07-17 2004-05-20 Memory card with and without enclosure

Publications (1)

Publication Number Publication Date
US20050013106A1 true US20050013106A1 (en) 2005-01-20

Family

ID=34063084

Family Applications (2)

Application Number Title Priority Date Filing Date
US10/621,882 Abandoned US20050013106A1 (en) 2003-07-17 2003-07-17 Peripheral card with hidden test pins
US10/782,969 Expired - Lifetime US7307848B2 (en) 2003-07-17 2004-02-20 Memory card with raised portion

Family Applications After (1)

Application Number Title Priority Date Filing Date
US10/782,969 Expired - Lifetime US7307848B2 (en) 2003-07-17 2004-02-20 Memory card with raised portion

Country Status (7)

Country Link
US (2) US20050013106A1 (en)
EP (1) EP1649413A1 (en)
JP (1) JP2007531920A (en)
KR (1) KR20060063896A (en)
CN (2) CN100589121C (en)
TW (2) TWI248619B (en)
WO (1) WO2005010812A1 (en)

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050248926A1 (en) * 2004-05-06 2005-11-10 Moses Asom SDIO memory and interface card
US20060267165A1 (en) * 2003-06-23 2006-11-30 Sandisk Corporation Method for efficiently producing removable peripheral cards
US20080049392A1 (en) * 2003-07-17 2008-02-28 Sandisk Corporation Peripheral card with hidden test pins
US20080096317A1 (en) * 2006-10-20 2008-04-24 Warren Middlekauff Method for producing portable memory devices
WO2008051838A2 (en) * 2006-10-20 2008-05-02 Sandisk Corporation Portable memory devices and method therefor
US20080180919A1 (en) * 2007-01-29 2008-07-31 Samsung Electronics Co., Ltd. Semiconductor module, module substrate structure, and method of fabricating the same
US20080189475A1 (en) * 2007-02-01 2008-08-07 Samsung Electronics Co., Ltd. Memory module having high data processing rate
US20080185582A1 (en) * 2006-10-20 2008-08-07 Warren Middlekauff Portable memory devices
US20080206904A1 (en) * 2007-02-26 2008-08-28 Mccarthy Michael Method of making pcb circuit modification from multiple to individual chip enable signals
US20080208384A1 (en) * 2007-02-26 2008-08-28 Mccarthy Michael Pcb circuit modification from multiple to individual chip enable signals
US20090153163A1 (en) * 2007-12-12 2009-06-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US20090305792A1 (en) * 2004-03-31 2009-12-10 Nintendo Co., Ltd. Game console and memory card
US20100079969A1 (en) * 2008-09-30 2010-04-01 Fujitsu Limited Function expansion device, manufacturing method thereof and electronic apparatus system
US8446750B2 (en) 2007-02-01 2013-05-21 Samsung Electronics Co., Ltd. Memory module using optical signal
WO2018024422A1 (en) * 2016-08-01 2018-02-08 Endress+Hauser Flowtec Ag Test system for testing electronic connections between components and a printed circuit board, and printed circuit board
US10403329B2 (en) 2014-07-02 2019-09-03 Samsung Electronics Co., Ltd. Memory card
US10433430B2 (en) * 2017-12-18 2019-10-01 Sung-Yu Chen Memory module card structure
USD873822S1 (en) 2014-07-04 2020-01-28 Sakai Display Products Corporation Image display
USD877147S1 (en) * 2014-07-04 2020-03-03 Sakai Display Products Corporation Image display
US11278793B2 (en) 2004-03-31 2022-03-22 Nintendo Co., Ltd. Game console

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080185694A1 (en) * 1999-08-04 2008-08-07 Super Talent Electronics, Inc. Processes of Manufacturing Portable Electronic Storage Devices Utilizing Lead Frame Connectors
JP2006236261A (en) * 2005-02-28 2006-09-07 Renesas Technology Corp Adapter for memory card, and memory card
US7384817B2 (en) * 2005-05-13 2008-06-10 Sandisk Corporation Method of assembling semiconductor devices with LEDs
TWM292742U (en) * 2005-12-05 2006-06-21 Ping-Yang Chuang Memory card capable of protecting test points
JP4843447B2 (en) * 2006-03-31 2011-12-21 株式会社東芝 Semiconductor device and memory card using the same
JP2008164385A (en) * 2006-12-27 2008-07-17 Sanyo Electric Co Ltd Circuit device and digital broadcast receiving device
KR100936057B1 (en) * 2008-06-30 2010-01-08 (주)이엔티 Mounted Testing Device For External Memory Card
USD638431S1 (en) 2009-10-20 2011-05-24 Sandisk Corporation MicroSD memory card with a semi-transparent color surface
US8690283B2 (en) 2009-10-20 2014-04-08 Sandisk Il Ltd. Method and system for printing graphical content onto a plurality of memory devices and for providing a visually distinguishable memory device
USD628202S1 (en) 2009-10-20 2010-11-30 Sandisk Corporation MicroSD memory card with different color surfaces
KR101097247B1 (en) * 2009-10-26 2011-12-21 삼성에스디아이 주식회사 Electronic circuit module and method of making the same
US20130039018A1 (en) * 2011-08-11 2013-02-14 Research In Motion Limited Three-Dimensionally Molded Electronic Substrate
US20130258576A1 (en) * 2012-03-29 2013-10-03 Gadi Ben-Gad Memory Card
USD729808S1 (en) * 2013-03-13 2015-05-19 Nagrastar Llc Smart card interface
AU2014247983B2 (en) * 2013-04-05 2017-08-10 Pny Technologies, Inc. Reduced length memory card
USD735203S1 (en) * 2013-06-26 2015-07-28 Samsung Electronics Co., Ltd. Solid state drive
USD734755S1 (en) * 2013-06-26 2015-07-21 Samsung Electronics Co., Ltd. Solid state drive
USD735202S1 (en) * 2013-06-26 2015-07-28 Samsung Electronics Co., Ltd. Solid state drive
USD735204S1 (en) * 2013-06-26 2015-07-28 Samsung Electronics Co., Ltd. Solid state drive
USD734756S1 (en) 2014-04-04 2015-07-21 Pny Technologies, Inc. Reduced length memory card
USD764424S1 (en) * 2014-05-15 2016-08-23 Kabushiki Kaisha Toshiba Substrate for an electronic circuit
USD736212S1 (en) * 2014-07-01 2015-08-11 Samsung Electronics Co., Ltd. Memory card
USD736213S1 (en) * 2014-07-01 2015-08-11 Samsung Electronics Co., Ltd. Memory card
USD739856S1 (en) * 2014-07-30 2015-09-29 Samsung Electronics Co., Ltd. Memory card
USD736216S1 (en) * 2014-07-30 2015-08-11 Samsung Electronics Co., Ltd. Memory card
US9620875B2 (en) 2014-08-01 2017-04-11 Samsung Electronics Co., Ltd. Memory card
USD753073S1 (en) * 2014-12-30 2016-04-05 Altia Systems, Inc. Printed circuit board
USD780763S1 (en) * 2015-03-20 2017-03-07 Nagrastar Llc Smart card interface
USD798868S1 (en) * 2015-08-20 2017-10-03 Isaac S. Daniel Combined subscriber identification module and storage card
USD773466S1 (en) * 2015-08-20 2016-12-06 Isaac S. Daniel Combined secure digital memory and subscriber identity module
USD783622S1 (en) * 2015-08-25 2017-04-11 Samsung Electronics Co., Ltd. Memory card
USD783621S1 (en) * 2015-08-25 2017-04-11 Samsung Electronics Co., Ltd. Memory card
USD772232S1 (en) * 2015-11-12 2016-11-22 Samsung Electronics Co., Ltd. Memory card
USD773467S1 (en) * 2015-11-12 2016-12-06 Samsung Electronics Co., Ltd. Memory card
JP1564043S (en) * 2016-04-27 2017-11-13
JP1564455S (en) * 2016-05-11 2017-11-13
USD798251S1 (en) * 2016-11-07 2017-09-26 Transcend Information, Inc. Printed circuit board of solid-state memory
USD887998S1 (en) * 2017-02-17 2020-06-23 Stat Peel Ag Chip
KR102440366B1 (en) * 2018-01-04 2022-09-05 삼성전자주식회사 Memory card and electronic apparatus including the same

Citations (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5490891A (en) * 1993-07-15 1996-02-13 Duel Systems Method of manufacturing a memory card package
US5502289A (en) * 1992-05-22 1996-03-26 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
US5608606A (en) * 1994-06-14 1997-03-04 Apple Computer, Inc. Computer plug-in module and interconnection system for wireless applications
US5663901A (en) * 1991-04-11 1997-09-02 Sandisk Corporation Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
US5736727A (en) * 1994-01-11 1998-04-07 Nakata; Eiichi IC communication card
US5933328A (en) * 1998-07-28 1999-08-03 Sandisk Corporation Compact mechanism for removable insertion of multiple integrated circuit cards into portable and other electronic devices
US6040622A (en) * 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6085412A (en) * 1996-06-11 2000-07-11 Kabushiki Kaisha Toshiba Method for manufacturing card type memory device
US6109939A (en) * 1997-06-04 2000-08-29 Sony Corporation Memory card and receptacle for same
US6151248A (en) * 1999-06-30 2000-11-21 Sandisk Corporation Dual floating gate EEPROM cell array with steering gates shared by adjacent cells
US6266724B1 (en) * 1993-09-01 2001-07-24 Sandisk Corporation Removable mother/daughter peripheral card
US6279114B1 (en) * 1998-11-04 2001-08-21 Sandisk Corporation Voltage negotiation in a single host multiple cards system
US6323064B1 (en) * 1999-10-11 2001-11-27 Samsung Electronics Co., Ltd Method for fabricating a memory card
US6333517B1 (en) * 1999-01-12 2001-12-25 Nec Corporation Semiconductor integrated circuit device equipped with power make-up circuit used in burn-in test after packaging and method for testing the same
US6445060B1 (en) * 1995-09-26 2002-09-03 Micron Technology, Inc. Coated semiconductor die/leadframe assembly and method for coating the assembly
US6456528B1 (en) * 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
US6462273B1 (en) * 2001-03-16 2002-10-08 Micron Technology, Inc. Semiconductor card and method of fabrication
US6537842B2 (en) * 2000-06-08 2003-03-25 Micron Technology, Inc. Methods for fabricating protective structures for bond wires
US6726508B2 (en) * 2001-12-21 2004-04-27 Tyco Electronics Amp K.K. Card connector
US6733954B2 (en) * 1998-02-10 2004-05-11 Nissha Printing Co., Ltd. Semiconductor module substrate sheet, semiconductor module substrate sheet fabricating method and semiconductor module
US20040089717A1 (en) * 2002-11-13 2004-05-13 Sandisk Corporation Universal non-volatile memory card used with various different standard cards containing a memory controller
US6843421B2 (en) * 2001-08-13 2005-01-18 Matrix Semiconductor, Inc. Molded memory module and method of making the module absent a substrate support
US7065656B2 (en) * 2001-07-03 2006-06-20 Hewlett-Packard Development Company, L.P. Tamper-evident/tamper-resistant electronic components
US7094633B2 (en) * 2003-06-23 2006-08-22 Sandisk Corporation Method for efficiently producing removable peripheral cards

Family Cites Families (57)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5296692A (en) 1988-10-24 1994-03-22 Sharp Kabushiki Kaisha IC card adapter for use in memory card slot with or without superimposed memory card
JP2559834B2 (en) 1989-01-12 1996-12-04 三菱電機株式会社 IC card
JP2672924B2 (en) 1992-07-30 1997-11-05 三菱電機株式会社 Non-contact IC card, manufacturing method and testing method thereof
US5408386A (en) * 1992-10-30 1995-04-18 Intel Corporation Socket assembly including a first circuit board located between a receptacle housing and a second circuit board
US5367571A (en) * 1992-12-02 1994-11-22 Scientific-Atlanta, Inc. Subscriber terminal with plug in expansion card
FR2707433B1 (en) 1993-07-08 1995-08-18 Pontarlier Connectors Card connector, in particular for electronic card.
US6773291B1 (en) 1993-11-12 2004-08-10 Intel Corporation Compliant communications connectors
JP3476910B2 (en) * 1994-06-22 2003-12-10 オリンパス株式会社 Imaging device
CA2138303C (en) 1994-12-15 1999-03-30 Albert John Kerklaan Ic card package
JPH08230367A (en) 1994-12-27 1996-09-10 Mitsubishi Electric Corp Non-contact type ic card and its manufacturing method and apparatus
US5617297A (en) * 1995-09-25 1997-04-01 National Semiconductor Corporation Encapsulation filler technology for molding active electronics components such as IC cards or PCMCIA cards
US5752857A (en) 1996-05-24 1998-05-19 Itt Corporation Smart card computer adaptor
JP3585336B2 (en) 1997-02-24 2004-11-04 沖電気工業株式会社 IC card adapter
JP4147281B2 (en) 1997-08-08 2008-09-10 株式会社セガ Memory device, controller and electronic device
WO1999033559A1 (en) 1997-12-24 1999-07-08 Cepheid Integrated fluid manipulation cartridge
US6241153B1 (en) 1998-03-17 2001-06-05 Cardxx, Inc. Method for making tamper-preventing, contact-type, smart cards
USD445096S1 (en) 1998-04-01 2001-07-17 Sandisk Corporation Removable memory card for use with portable electronic devices
USD447481S1 (en) 1998-04-01 2001-09-04 Sandisk Corporation Memory card for use with portable electronic devices
US6611284B2 (en) * 1998-04-03 2003-08-26 Intel Corporation Temporary conversion of a video conferencing camera into a digital camera
EP0964360B1 (en) 1998-06-08 2003-08-27 International Business Machines Corporation Automatic data recovery of integrated circuit cards
JP4231572B2 (en) 1998-07-07 2009-03-04 沖電気工業株式会社 Voltage monitoring circuit and memory card incorporating the same
US6357663B1 (en) 1998-07-30 2002-03-19 Fujitsu Takamisawa Component Limited Fingerprint identifying PC card
AU1814500A (en) 1998-11-06 2000-05-29 Who? Vision Systems Inc. Relief object sensor adaptor
US6353870B1 (en) 1999-05-11 2002-03-05 Socket Communications Inc. Closed case removable expansion card having interconnect and adapter circuitry for both I/O and removable memory
USD442598S1 (en) 1999-08-19 2001-05-22 Sandisk Corporation Portable memory card for storage of personal information
USD444473S1 (en) 1999-08-24 2001-07-03 Kabushiki Kaisha Toshiba IC memory card
USD446525S1 (en) 1999-08-24 2001-08-14 Kabushiki Kaisha Toshiba IC memory card
USD445111S1 (en) 1999-08-24 2001-07-17 Kabushiki Kaisha Toshiba IC memory card
USD439579S1 (en) 1999-11-22 2001-03-27 Sandisk Corporation Memory card reader
US6658516B2 (en) 2000-04-11 2003-12-02 Li-Ho Yao Multi-interface memory card and adapter module for the same
DE20008692U1 (en) 2000-05-15 2000-08-31 SCM Microsystems GmbH, 85276 Pfaffenhofen Interface device for chip cards
USD452243S1 (en) 2000-06-07 2001-12-18 Sandisk Corporation Integrated circuit memory card
USD452864S1 (en) 2000-06-12 2002-01-08 Sandisk Corporation Electronic memory card
JP3713428B2 (en) 2000-09-27 2005-11-09 ヒロセ電機株式会社 Card connector
US6658510B1 (en) 2000-10-18 2003-12-02 International Business Machines Corporation Software method to retry access to peripherals that can cause bus timeouts during momentary busy periods
USD453515S1 (en) 2000-11-06 2002-02-12 Sandisk Corporation Electronic memory card holder
WO2002059831A1 (en) 2001-01-26 2002-08-01 Sony Corporation Ic card and ic card adaptor
USD467586S1 (en) 2001-03-16 2002-12-24 Kabushiki Kaisha Toshiba IC memory card
USD459355S1 (en) 2001-03-16 2002-06-25 Kabushiki Kaisha Toshiba IC memory card
USD460456S1 (en) 2001-03-16 2002-07-16 Kabushiki Kaisha Toshiba IC memory card
JP3443102B2 (en) 2001-03-23 2003-09-02 山一電機株式会社 Card connector
US6618258B2 (en) 2001-05-10 2003-09-09 Hewlett-Packard Development, L.P. Portable memory card system
JP4416969B2 (en) 2001-07-30 2010-02-17 キヤノン株式会社 adapter
USD457887S1 (en) 2001-09-28 2002-05-28 Sony Corporation Recording medium
US6738259B2 (en) 2001-11-19 2004-05-18 Imation Corp. Apparatus supporting multiple memory card formats
KR100395896B1 (en) 2001-12-11 2003-08-27 한국몰렉스 주식회사 Secure digital memory card socket
US6709278B2 (en) 2002-03-21 2004-03-23 Unication Co., Ltd. Personal digital assistant with a foldable memory card adapter
US6736678B2 (en) 2002-06-26 2004-05-18 Li-Ho Yao Memory card interface adapter
TW555110U (en) 2002-08-28 2003-09-21 Carry Computer Eng Co Ltd Adapter for xD memory card
JP4286506B2 (en) 2002-09-02 2009-07-01 山一電機株式会社 Card connector
TW556905U (en) 2002-09-27 2003-10-01 Carry Computer Eng Co Ltd Memory card adapting device
USD492688S1 (en) 2002-12-09 2004-07-06 Sandisk Corporation Memory card
USD488476S1 (en) 2002-12-13 2004-04-13 C-One Technology Corp. Removable dual-head electronic card
USD488477S1 (en) 2002-12-13 2004-04-13 C-One Technology Corp. Removable electronic card
USD487747S1 (en) 2003-01-08 2004-03-23 C-One Technology Corporation Removable electronic card
US7416132B2 (en) 2003-07-17 2008-08-26 Sandisk Corporation Memory card with and without enclosure
US20050021909A1 (en) 2003-07-24 2005-01-27 Leapfrog Enterprises, Inc. Memory cartridge including selecting mechanism

Patent Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5663901A (en) * 1991-04-11 1997-09-02 Sandisk Corporation Computer memory cards using flash EEPROM integrated circuit chips and memory-controller systems
US5502289A (en) * 1992-05-22 1996-03-26 National Semiconductor Corporation Stacked multi-chip modules and method of manufacturing
US5490891A (en) * 1993-07-15 1996-02-13 Duel Systems Method of manufacturing a memory card package
US6266724B1 (en) * 1993-09-01 2001-07-24 Sandisk Corporation Removable mother/daughter peripheral card
US5736727A (en) * 1994-01-11 1998-04-07 Nakata; Eiichi IC communication card
US5608606A (en) * 1994-06-14 1997-03-04 Apple Computer, Inc. Computer plug-in module and interconnection system for wireless applications
US6445060B1 (en) * 1995-09-26 2002-09-03 Micron Technology, Inc. Coated semiconductor die/leadframe assembly and method for coating the assembly
US6085412A (en) * 1996-06-11 2000-07-11 Kabushiki Kaisha Toshiba Method for manufacturing card type memory device
US6109939A (en) * 1997-06-04 2000-08-29 Sony Corporation Memory card and receptacle for same
US6733954B2 (en) * 1998-02-10 2004-05-11 Nissha Printing Co., Ltd. Semiconductor module substrate sheet, semiconductor module substrate sheet fabricating method and semiconductor module
US6040622A (en) * 1998-06-11 2000-03-21 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US6410355B1 (en) * 1998-06-11 2002-06-25 Sandisk Corporation Semiconductor package using terminals formed on a conductive layer of a circuit board
US5933328A (en) * 1998-07-28 1999-08-03 Sandisk Corporation Compact mechanism for removable insertion of multiple integrated circuit cards into portable and other electronic devices
US6279114B1 (en) * 1998-11-04 2001-08-21 Sandisk Corporation Voltage negotiation in a single host multiple cards system
US6333517B1 (en) * 1999-01-12 2001-12-25 Nec Corporation Semiconductor integrated circuit device equipped with power make-up circuit used in burn-in test after packaging and method for testing the same
US6151248A (en) * 1999-06-30 2000-11-21 Sandisk Corporation Dual floating gate EEPROM cell array with steering gates shared by adjacent cells
US6323064B1 (en) * 1999-10-11 2001-11-27 Samsung Electronics Co., Ltd Method for fabricating a memory card
US6537842B2 (en) * 2000-06-08 2003-03-25 Micron Technology, Inc. Methods for fabricating protective structures for bond wires
US6462273B1 (en) * 2001-03-16 2002-10-08 Micron Technology, Inc. Semiconductor card and method of fabrication
US7065656B2 (en) * 2001-07-03 2006-06-20 Hewlett-Packard Development Company, L.P. Tamper-evident/tamper-resistant electronic components
US6843421B2 (en) * 2001-08-13 2005-01-18 Matrix Semiconductor, Inc. Molded memory module and method of making the module absent a substrate support
US6456528B1 (en) * 2001-09-17 2002-09-24 Sandisk Corporation Selective operation of a multi-state non-volatile memory system in a binary mode
US6726508B2 (en) * 2001-12-21 2004-04-27 Tyco Electronics Amp K.K. Card connector
US20040089717A1 (en) * 2002-11-13 2004-05-13 Sandisk Corporation Universal non-volatile memory card used with various different standard cards containing a memory controller
US7094633B2 (en) * 2003-06-23 2006-08-22 Sandisk Corporation Method for efficiently producing removable peripheral cards

Cited By (52)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060267165A1 (en) * 2003-06-23 2006-11-30 Sandisk Corporation Method for efficiently producing removable peripheral cards
US8354749B2 (en) 2003-06-23 2013-01-15 Sandisk Technologies Inc. Method for efficiently producing removable peripheral cards
US20080049392A1 (en) * 2003-07-17 2008-02-28 Sandisk Corporation Peripheral card with hidden test pins
US7864540B2 (en) 2003-07-17 2011-01-04 Sandisk Corporation Peripheral card with sloped edges
US8972658B2 (en) * 2004-03-31 2015-03-03 Nintendo Co., Ltd. Game console and memory card
US10722783B2 (en) 2004-03-31 2020-07-28 Nintendo Co., Ltd. Game console
US11278793B2 (en) 2004-03-31 2022-03-22 Nintendo Co., Ltd. Game console
US20090305792A1 (en) * 2004-03-31 2009-12-10 Nintendo Co., Ltd. Game console and memory card
US10173132B2 (en) 2004-03-31 2019-01-08 Nintendo Co., Ltd. Game console
US20050248926A1 (en) * 2004-05-06 2005-11-10 Moses Asom SDIO memory and interface card
US7170754B2 (en) * 2004-05-06 2007-01-30 Sychip Inc. SDIO memory and interface card
US20110315987A1 (en) * 2006-10-20 2011-12-29 Warren Middlekauff Portable memory devices
US8013332B2 (en) * 2006-10-20 2011-09-06 Sandisk Technologies Inc. Portable memory devices
US20080185582A1 (en) * 2006-10-20 2008-08-07 Warren Middlekauff Portable memory devices
TWI407860B (en) * 2006-10-20 2013-09-01 Sandisk Technologies Inc Portable memory devices and method therefor
US7928010B2 (en) 2006-10-20 2011-04-19 Sandisk Corporation Method for producing portable memory devices
WO2008051838A3 (en) * 2006-10-20 2008-06-12 Sandisk Corp Portable memory devices and method therefor
WO2008051838A2 (en) * 2006-10-20 2008-05-02 Sandisk Corporation Portable memory devices and method therefor
US20080096317A1 (en) * 2006-10-20 2008-04-24 Warren Middlekauff Method for producing portable memory devices
US20080180919A1 (en) * 2007-01-29 2008-07-31 Samsung Electronics Co., Ltd. Semiconductor module, module substrate structure, and method of fabricating the same
US20110141790A1 (en) * 2007-02-01 2011-06-16 Gwang-Man Lim Memory Module Having High Data Processing Rate
US7916512B2 (en) 2007-02-01 2011-03-29 Samsung Electronics Co., Ltd. Memory module having high data processing rate
US8174861B2 (en) 2007-02-01 2012-05-08 Samsung Electronics Co., Ltd. Memory module having high data processing rate
US8625323B2 (en) 2007-02-01 2014-01-07 Samsung Electronics Co., Ltd. Memory module having high data processing rate
US20080189475A1 (en) * 2007-02-01 2008-08-07 Samsung Electronics Co., Ltd. Memory module having high data processing rate
US8446750B2 (en) 2007-02-01 2013-05-21 Samsung Electronics Co., Ltd. Memory module using optical signal
US20100309707A1 (en) * 2007-02-26 2010-12-09 Mccarthy Michael Pcb circuit modification from multiple to individual chip enable signals
US7778057B2 (en) * 2007-02-26 2010-08-17 Sandisk Corporation PCB circuit modification from multiple to individual chip enable signals
US7709278B2 (en) 2007-02-26 2010-05-04 Sandisk Corporation Method of making PCB circuit modification from multiple to individual chip enable signals
US20080208384A1 (en) * 2007-02-26 2008-08-28 Mccarthy Michael Pcb circuit modification from multiple to individual chip enable signals
US20080206904A1 (en) * 2007-02-26 2008-08-28 Mccarthy Michael Method of making pcb circuit modification from multiple to individual chip enable signals
US8817511B2 (en) 2007-02-26 2014-08-26 Sandisk Technologies Inc. PCB circuit modification from multiple to individual chip enable signals
US20090153163A1 (en) * 2007-12-12 2009-06-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US9627360B2 (en) 2007-12-12 2017-04-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US8248093B2 (en) 2007-12-12 2012-08-21 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US8203355B2 (en) 2007-12-12 2012-06-19 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US8917107B2 (en) 2007-12-12 2014-12-23 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US20110037491A1 (en) * 2007-12-12 2011-02-17 Sang-Guk Han Circuit Board Having Bypass Pad
US9069036B2 (en) 2007-12-12 2015-06-30 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US9171644B2 (en) 2007-12-12 2015-10-27 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US9449716B2 (en) 2007-12-12 2016-09-20 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US20100289157A1 (en) * 2007-12-12 2010-11-18 Sang-Guk Han Circuit board having bypass pad
US7872483B2 (en) 2007-12-12 2011-01-18 Samsung Electronics Co., Ltd. Circuit board having bypass pad
US8488332B2 (en) * 2008-09-30 2013-07-16 Fujitsu Limited Function expansion device, manufacturing method thereof and electronic apparatus system
US20100079969A1 (en) * 2008-09-30 2010-04-01 Fujitsu Limited Function expansion device, manufacturing method thereof and electronic apparatus system
US10403329B2 (en) 2014-07-02 2019-09-03 Samsung Electronics Co., Ltd. Memory card
US20190341082A1 (en) * 2014-07-02 2019-11-07 Samsung Electronics Co., Ltd. Memory card
US11043247B2 (en) * 2014-07-02 2021-06-22 Samsung Electronics Co., Ltd. Memory card
USD873822S1 (en) 2014-07-04 2020-01-28 Sakai Display Products Corporation Image display
USD877147S1 (en) * 2014-07-04 2020-03-03 Sakai Display Products Corporation Image display
WO2018024422A1 (en) * 2016-08-01 2018-02-08 Endress+Hauser Flowtec Ag Test system for testing electronic connections between components and a printed circuit board, and printed circuit board
US10433430B2 (en) * 2017-12-18 2019-10-01 Sung-Yu Chen Memory module card structure

Also Published As

Publication number Publication date
US7307848B2 (en) 2007-12-11
CN100589121C (en) 2010-02-10
EP1649413A1 (en) 2006-04-26
WO2005010812A1 (en) 2005-02-03
US20050014298A1 (en) 2005-01-20
TW200515422A (en) 2005-05-01
CN1823341A (en) 2006-08-23
TWI248619B (en) 2006-02-01
JP2007531920A (en) 2007-11-08
TW200508982A (en) 2005-03-01
CN1823339A (en) 2006-08-23
TWI251785B (en) 2006-03-21
KR20060063896A (en) 2006-06-12

Similar Documents

Publication Publication Date Title
US7307848B2 (en) Memory card with raised portion
US7864540B2 (en) Peripheral card with sloped edges
US7306161B2 (en) Memory card with chamfer
US7094633B2 (en) Method for efficiently producing removable peripheral cards
EP0810656B1 (en) Semiconductor device substrate and method of manufacturing the same
US20060261489A1 (en) Semiconductor memory card and method of fabricating the same
US20110315987A1 (en) Portable memory devices
JP2002118225A (en) Multichip package and high-density memory card using the multichip package
US8283664B2 (en) Disguising test pads in a semiconductor package
JP2007005443A (en) Semiconductor device and its manufacturing method
TWI407860B (en) Portable memory devices and method therefor

Legal Events

Date Code Title Description
AS Assignment

Owner name: SANDISK CORPORATION, CALIFORNIA

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:TAKIAR, HEM P.;REEL/FRAME:014306/0015

Effective date: 20030714

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION

AS Assignment

Owner name: SANDISK TECHNOLOGIES INC., TEXAS

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SANDISK CORPORATION;REEL/FRAME:038438/0904

Effective date: 20160324

AS Assignment

Owner name: SANDISK TECHNOLOGIES LLC, TEXAS

Free format text: CHANGE OF NAME;ASSIGNOR:SANDISK TECHNOLOGIES INC;REEL/FRAME:038807/0980

Effective date: 20160516