548540 A7 8 008twf.doc / 0 09548540 A7 8 008twf.doc / 0 09
本發明是有關於--種連續自動執行停止、回復運作之 測試方法及測試裝置’且特別是有關於一種對一待測電腦 自動執行停止、回復運作之測試方法及測試裝置。 通常電腦在一段時間不用時，都會進入省電模式中， 其可能會關閉記憶體、硬碟等裝置，更甚者，若超過一段 待機時間’則電腦會自動關機，在關機之前，若使用者^ 再次使用電腦，則電腦就會回復到正常操作模式中。 而爲了確保電腦可進入不同階段的省電狀態，於是製 造商的測機人員就必須在電腦製作完成塒，測驗其是否可 進入省電f吴式’是以電腦在製作完成時仍爲一待測電腦。 但爲了測驗待測電腦是否可進入省電模式，測機人員都得 在待測電腦旁邊待相當長的一段時間，因爲待測電腦在自 動進入省電模式後，若要待測電腦回復到正常操作模式， 則需要測機人員在一旁敲打一回復鍵，使待測電腦回復到 正吊作f旲式’且通常測試時，一台待測電腦就需要測試 好幾十次’才能確保待測電腦可回復到正常操作模式的穩 定性’但這樣的測試方法卻會耗費測機人員相當久的測試 時間’只爲了在待測電腦旁邊等待待測電腦進入省電模 式’之後敲打回復鍵使待測電腦回復到正常操作模式。 有鑒於此，本發明即提出一種連續自動執行停止、回 復運作之測試方法及測試裝置，使得測機人員不需長時間 待在待測電腦旁邊等待待測電腦進入省電模式及敲打回復 鏈使待測電腦回復到|K常操作模式，即可自動使待測電腦 進人省電模式及回復到」κ常操作模式，減少測機人員的測 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） 褒--- (請先閱讀背面之注意事項再填寫本頁) Λσ· 線- 經濟部智慧財產局員工消費合作社印製 A7 B7 548540 8 0 0 8twf . doc/ 0 09 五、發明說明（V ) 試時間。 在本發明所提出的一種連續自動執行停止、回復運作 之測試方法中，即是適用於以一測試裝置自動喚醒待測電 腦之系統。 此連續自動執行停止、回復運作之測試方法之步驟即 包括：先利用測試程式自動使待測電腦進入省電模式，再 利用測試裝置自動使待測電腦回復至正常操作模式，之後 重覆執行測試程式之設定値，使之不斷重覆上述步驟，直 至關閉測試裝置爲止。 本發明又提出一種自動執行停止、回復運作之測試方 法，其步驟包括：先進行執行停止運作步驟，即利用測試 程式自動使待測電腦進入省電模式。再進行執行回復運作 步驟，包括：先偵測待測電腦中省電電壓之有無，其中若待. 測電腦無省電電壓，則產生第一脈波訊號，之後延長此第 一脈波訊號的脈波寬度，將延長後之第一脈波訊號轉換成 第二脈波訊號。 經由第二脈波訊號邊緣觸發測試裝置，使測試裝置傳 遞一致能訊號至待測電腦，使進入省電模式之待測電腦自 動回復至正常操作模式。綜上，重覆執行停止運作步驟及 執行回復運作步驟，直至關閉測試裝置爲止。 本發明又提出一種自動執行停止、回復運作之測試裝 置，適用於可以以測試程式使待測電腦進入省電模式之系 統，其中待測電腦在正常操作模式下需具備打·必要電壓 及▲省電電懸II在待測電腦中之主機板上配麗有…t機連 本紙張又度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁) -裝--------訂---------線. 經濟部智慧財產局員工消費合作社印製 548540 0 0 δtwf . do c / 〇 〇 9 Α7 Β7 五 _ 經濟部智慧財產局員工消費合作社印製 号务明說明（3 ) 接介面與測胃式裝置連接。 此連續_動執行停止、回復運作之測試裝置包括：省 電電壓感測器、脈波處理器、脈波寬度控制器及脈波輸出 裝置。 其中，省電電壓感測器，電性連接主機連接介面，用 以偵測待測電腦省電電壓之有無，其中若偵測待測電腦無 此省電電壓，則產生一第一脈波訊號。 脈波處理器，電性連接於省電電壓感測器，用以接收 第一脈波訊號並對此第一脈波訊號進行處理。脈波寬度控 制器，電性連接脈波處理器，用以延長第一脈波訊號之脈 波寬度，轉換成一第二脈波訊號，使之傳回至脈波處理器。 脈波輸出裝置，係電性連接於脈波處理器及主機連接 介面，用以接收經由第二脈波訊號邊緣觸發脈波處理器時 所傳遞之致能訊號，及將致能訊號輸出至主機連接介面， 使進入省電模式之待測電腦回復至正常操作模式。 綜上所述，本發明可利用一測試程式使待測電腦自動 進入省電模式，之後再利用一測試裝置使待測電腦自動從 省電模式中回復至一正常操作模式，以減少測機人員的測 機時間。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細 說明如下： 圖式之簡單說明： 第〗圓繪示的是本發明自動執行停止、丨"丨復之·流程 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） --------------裝·-- (請先閱讀背面之注意事項再填寫本頁) · -線- 548540 五、發明說明（今） 圖； 第2圖繪示的是圖1中回復過程之一詳細流程圖； 第3圖繪示的是本發明測試裝置與待測電腦之一內部 方塊圖； 第4圖繪示的是本發明測試裝置之一詳細電路圖；以 及 第5圖繪示的是本發明測試裝置中部分元件進行脈波 訊號處理之一示意圖。 標號說明 30 :主機板 32 :主機連接介面 40 :測試裝置 42 :測試裝置連接介面 44 :省電電壓感測器 46 :脈波處理器 48 :脈波寬度控制器 50 :脈波輸出裝置 52，54，56，442，482 ··電阻 58，444，484 :電容 440，481 :電阻-電容電路 44卜480，486 :反向器 5 00 i切換器 502 :電晶體 步驟si 0至步驟si 4係本發明之一實施步驟； 6 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) _裝--------訂---------線- 經濟部智慧財產局員工消費合作社印製 548540 A7 8〇〇8twf.doc/0〇9 五、發明說明（6 ) 步驟s2〇至步驟s34係本發明回復過程之一詳細實施步驟 --------------裝--- (請先閱讀背面之注咅？事項再填寫本頁} 請梦照弟^圖，其繪示的是依照本發明一較佳實施例 的一種自動病行停止、回復運作之測試方法，適用於可以 以測試裝置自動喚醒待測電腦之系統。 ·% 經濟部智慧財產局員工消費合作社印製 此連續自動執行停止、回復運作之測試方法包括：先 在步驟slO中，利用測試程式自動使待測電腦進入省電模 =的狀態即-種軟體控制方式使賴電腦進入省電 f旲式的狀縣，再在步驟sl2中，利用一麵體控制方式的 測試裝置自動使待測電腦回復至正常操作模式。而爲了讓 測機人員不需長時間待在待測電腦旁邊以專心於其他事 務，於是在沏J試程式中設定一設定値，可以讓測機人員設 定測驗次數使待測電腦不斷進行停止（進入省電模式）及 回復（進入正常操作模式）的動作，使測試程式及測試裝 置在步驟sl4中’不斷重覆執行設定値所設定的測試次數 及測忒的方式，自動重覆步驟sl〇及si2，直至關閉測試裝 置爲止’而因爲在電腦中即有可讓電腦進入省電模式之機 3 *疋以即使測試次數已達設定的次數，電腦仍會進入省 电換式’但在關閉測試裝置後，即不會再繼續進行測試的 步驟。 其中由於待測電腦中具有數個元件可進入省電模式， 如電源供應器、記憶體及硬碟等裝置。於是設定値的設定 測'1式方式’ 以以亂數（random )方式使上述元件進入 模式’或是以預足的排列方式使丨：述儿件進人畨電模 [氏張尺度相中國國家標參規格 297公釐） 548540 8008 twf. doc / 009 A7 B7 經濟部智慧財產局員工消費合作社印？衣 五、發明說明（b ) 式，如第一個進入省電模式的裝置爲記憶體、第二個進入 省電模式的裝置爲硬碟、第三個進入省電模式的裝置則爲 電源供應器，即在長時間沒有使用者操作電腦時，電腦會 自動暫時關掉電源呈現待機狀態以節省用電，而設定好的 測試次數就會不斷重覆上述測試方式，直至關閉測試裝置 爲止。 另外，在執行測試程式的設定値時，可以以模擬鍵盤 掃描碼（scan code)方式使上述元件進入省電模式，或是 利用呼叫函式方式使上述元件進入省電模式。其中，所謂 的模擬鍵盤掃描碼方式，是指電腦在設計之初，若是以掃 描鍵盤碼的方式使電腦進入省電模式，則測試程式即可模 擬進入省電模式的鍵盤掃描碼，使作業系統（Operation System ;簡稱OS)接收到掃描碼後，啓動省電模式函式， 以進入省電模式，而另外一種方式即是直接呼叫省電模式 函式以進入省電模式。 而在進入省電模式後，測試裝置就會執行一序列的動 作以喚醒進入省電模式之元件。 請參考第2圖，其繪示的是測試裝置進行一序列的動 作以喚醒進入省電模式之元件之步驟流程圖。 其實此測試裝置是不斷的在偵測是否有上述元件已進 入省電模式，而其偵測的方式是偵測待測電腦中省電電壓 的有無（步驟s20)，因爲在上述元件中，皆有一必要電壓 及·省電電壓使t述元件可在一正常操作模式K進行運 作，茗無此省電電壓（步驟s22)，則上述元件會呈現一待 8 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝 n ϋ ·ϋ n 一一口t · 1 ϋ ϋ I ϋ I.- 548540 五、發明說明（η ) 機狀態，而測試裝置會產生第一脈波訊號（步驟s24)，之 後測試裝置會在步驟s26中，延長第一脈波訊號的脈波寬 度，也就是測試裝置不會立即在偵測到待測電腦無省電電 壓後即喚醒待測電腦，而是會在一段時間後才會使待測電 腦回復至正常操作模式。 之後，測試裝置會在步驟s28中，將延長後之第一脈 波訊號轉換形成第二脈波訊號，經由第二脈波訊號邊緣觸 發（步驟s30)，使測試裝置傳遞致能訊號至待測電腦（步 驟s32)，讓進入省電模式之待測電腦自動回復至正常模式 操作（步驟s34 )。 其中，第二脈波訊號的觸發時間即爲第一脈波訊號長 度加上脈波寬度的時間。 請參考第3圖，其繪示的是測試裝置與待測電腦之間 的一內部方塊圖。其中，在待測電腦中的主機板30上配置 有一主機連接介面32與測試裝置40連接，而在測試裝置 40中也配置與主機連接介面32相對應進行訊號傳遞之測 試裝置連接介面42,其中由主機連接介面32傳送之電壓係 維持元件在待機狀態之必要電壓，而由主機連接介面32傳 送之電壓即爲維持元件正常運作之省電電壓，其中不管是 必要電壓或是省電電壓，其電壓値皆可爲3.3伏特（volt) 或是5伏特。 在測試裝置40中包括：省電電壓感測器44、脈波處理 器46、脈波寬度控制器48及脈波輸出裝置50。 其中，省電電壓感測器44,電性連接:U機連接介丨ill 32， 本紙張尺度適用中國國家標準（CNS)A4規格（2】0 X 297公釐） ------------舄裝—— (請先閱讀背面之注意事項再填寫本頁) ••線 經濟部智慧財產局員工消費合作社印製 548540 A7 B7 8008twf.doc / 009 五、發明說明（艺） 用以偵測待測電腦之省電電壓之有無，若省電電壓感測器 44偵測待測電腦無省電電壓，則產生第一脈波訊號。 脈波處理器46，電性連接省電電壓感測器44，則係用 以接收此第一脈波訊號並對此第一脈波訊號進行處理。脈 波寬度控制器48，電性連接脈波處理器46，用以延長第一 脈波訊號的脈波寬度，並將其轉換後形成第二脈波訊號傳 回至脈波處理器46。 脈波輸出裝置50,電性連接脈波處理器46及主機連接 介面32，用以接收經由第二脈波訊號邊緣觸發脈波處理器 46時所傳遞的致能訊號，及將此致能訊號輸出至主機連接 介面32，使進入省電模式之待測電腦回復至正常操作模 式。 請繼續參考第4圖，其繪示的是圖3中測試裝置40的 一詳細電路圖。其中，在省電電壓感測器44中用以感測省 電電壓有無之元件包括：電阻-電容電路（R_Ccnxmt) 440 及反向器（Inverter) 441。其中，電阻442，電性連接主機 連接介面32，用以接收省電電壓，其中此省電電壓可爲3.3 伏特或5伏特，而電容444的第一端電性連接電阻442，第 二端則爲接地端。 反向器441，電性連接電阻-電容電路440及脈波處理 器46。其中當省電電壓低於一反向電壓時，反向器441會 將電附-電容電路442所傳送之訊號形成-第…脈波訊號， 並將此第·脈波訊號傳送至脈波處理器46。 請參考第5圖，其繪示的是由電阻-電容電路440與反 10 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） -----------·裝-----*---訂---------線# (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 548540 五、發明說明（q ) 向器44 ]組成的電路特性的一示意圖。即當電阻-電容電路 440所接收的省電電壓不存在時，會使得電容444儲存的電 壓會逐漸下降’當其下降到反向器44〗所能承受的反向電 壓値時，會觸發反向器輸出一個反向訊號，於是即形成圖5 所繪示的現象，發出一個脈波訊號至脈波處理器46。 在脈波處理器46接收到此脈波訊號（即第一脈波訊 號）時，會將此脈波訊號輸出至脈波寬度控制器4 8，其中， 輸出的脈波訊號已是經由反向後輸出的訊號，是以脈波寬 度控制器48即會利用反向器480將脈波處理器46傳送的 脈波訊號再加以反向運作，而在脈波寬度控制器48中亦具 有與省電電壓感測器44相同的電阻-電容電路及反向器裝 置，其功能亦相同，在此不再贅述其原理，其係用以延長 第一脈波訊號之脈波寬度，之後經由反向器486的反向操 作，使得第一脈波訊號加上延長的脈波寬度反向形成第二 脈波訊號，而脈波寬度控制器48亦會將此第二脈波訊號傳 回至脈波處理器46。 而^弟——^脈波d 5虎傳回脈波處理器4 6時，即會觸發^一* 個致能訊號自輸出端Q傳送至脈波輸出裝置50，其中在脈 波輸出裝置50包括：切換器500及電晶體502，其中切換 器500即爲一個開關，作爲測試裝置4〇的開關元件，其控 制可由人爲或程式控制將其開關設定爲導通的狀態，而切 換器500即係電性連接脈波處理器46，當其係處於導通 (on)的狀態時，則可接收由脈波處理器46所傳送之致會巨 訊號。 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） --------------裝— (請先閱讀背面之注意事項再填寫本頁)The present invention relates to a test method and test device for continuously and automatically performing stop and resume operations, and more particularly to a test method and test device for automatically performing stop and resume operations to a computer under test. Normally, the computer will enter the power saving mode when it is not used for a period of time. It may turn off the memory, hard disk and other devices. Moreover, if the standby time is exceeded, the computer will automatically shut down. ^ Use the computer again and the computer will return to normal operating mode. And in order to ensure that the computer can enter the power-saving state at different stages, the manufacturer ’s testing staff must complete the computer production test, and test whether it can enter the power-saving mode. Test computer. However, in order to test whether the computer under test can enter the power saving mode, the testers have to stay beside the computer under test for a considerable period of time, because after the computer under test automatically enters the power saving mode, the computer under test needs to return to normal. In the operation mode, the tester needs to tap a reply button on the side to return the computer under test to the forward hanging mode. In general, a computer under test needs to be tested dozens of times to ensure the test. The computer can return to the stability of the normal operating mode ', but this test method will take a long time for the test staff to test' just to wait for the computer under test to enter the power saving mode ' The test computer returns to normal operation mode. In view of this, the present invention proposes a test method and a test device for continuously and automatically performing stop and resume operations, so that the tester does not need to wait for a long time next to the computer to be tested, wait for the computer to be tested to enter the power saving mode and tap the recovery chain The computer under test returns to the | K normal operation mode, which automatically puts the computer under test into the power saving mode and returns to the "κ normal operation mode, reducing the number of testers. The paper size applies to the Chinese National Standard (CNS) A4 specification. (210 x 297 mm) 褒 --- (Please read the notes on the back before filling out this page) Λσ · Line-Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 548540 8 0 0 8twf. Doc / 0 09 5. Description of the invention (V) Test time. In a test method for continuously and automatically performing stop and resume operations provided by the present invention, it is applicable to a system for automatically waking a computer under test with a test device. The steps of this continuous and automatic test method for stopping and resuming operations include: firstly using a test program to automatically put the computer under test into a power saving mode, and then using the test device to automatically restore the computer under test to the normal operating mode, and then repeatedly executing the test Program settings 値, make it repeat the above steps until the test device is turned off. The present invention also proposes a test method for automatically performing stop and resume operations. The steps include: performing the stop operation step first, that is, using a test program to automatically put the computer under test into a power saving mode. Then perform the recovery operation steps, including: first detecting the existence of the power saving voltage in the computer under test, and if the test computer has no power saving voltage, a first pulse signal is generated, and then the first pulse signal is extended The pulse width converts the extended first pulse signal into a second pulse signal. The test device is triggered by the edge of the second pulse signal, so that the test device transmits a uniform energy signal to the computer under test, so that the computer under test that enters the power saving mode automatically returns to the normal operation mode. In summary, the steps of stopping the operation and performing the operations of recovery are repeated until the test device is turned off. The present invention also proposes a test device for automatically performing stop and resume operations, which is suitable for a system that can make a computer under test enter a power-saving mode by using a test program, wherein the computer under test needs to have the required voltage and voltage in normal operation mode. The electric suspension II is equipped on the motherboard of the computer under test. The machine and the paper are applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm). (Please read the precautions on the back before filling in this. Page)-installed -------- order --------- line. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 548540 0 0 δtwf. Do c / 〇〇9 Α7 Β7 Five_ Economy The Ministry of Intellectual Property Bureau's Consumer Cooperatives printed the numbering instructions (3) The interface is connected to the stomach-testing device. The test device for continuously stopping and resuming operation includes: a power-saving voltage sensor, a pulse wave processor, a pulse width controller, and a pulse wave output device. Among them, the power-saving voltage sensor is electrically connected to the host connection interface to detect the presence or absence of the power-saving voltage of the computer under test. If the power-saving voltage of the computer under test is detected, a first pulse signal is generated. . The pulse wave processor is electrically connected to the power-saving voltage sensor, and is used for receiving the first pulse wave signal and processing the first pulse wave signal. The pulse width controller is electrically connected to the pulse wave processor to extend the pulse width of the first pulse wave signal, convert it into a second pulse wave signal, and return it to the pulse wave processor. The pulse wave output device is electrically connected to the pulse wave processor and the host connection interface, and is used for receiving the enabling signal transmitted when the pulse wave processor is triggered by the edge of the second pulse wave signal, and outputting the enabling signal to the host. Connect the interface to return the computer under test that enters the power saving mode to the normal operation mode. In summary, the present invention can use a test program to make the computer under test automatically enter the power-saving mode, and then use a test device to automatically restore the computer under test from the power-saving mode to a normal operation mode to reduce the number of testers. Test time. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following describes the preferred embodiments and the accompanying drawings in detail, as follows: Brief description of the drawings: Shown is the automatic execution stop of the present invention, and " 丨 Future · Process. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 x 297 mm) -------------- Equipment ... (Please read the precautions on the back before filling out this page) · -line- 548540 V. Description of the invention (today) Figure; Figure 2 shows a detailed flowchart of the reply process in Figure 1; Figure 3 shows an internal block diagram of one of the testing device and the computer to be tested; Figure 4 shows a detailed circuit diagram of the testing device of the invention; and Figure 5 shows a part of the testing device of the invention A schematic diagram of components performing pulse signal processing. Reference sign 30: main board 32: host connection interface 40: test device 42: test device connection interface 44: power-saving voltage sensor 46: pulse wave processor 48: pulse width controller 50: pulse wave output device 52, 54, 56, 442, 482 Resistors 58, 444, 484: Capacitors 440, 481: Resistor-capacitor circuits 44, 480, 486: Inverters 5 00 i, Switchers 502: Transistors, steps si 0 to si 4 This is one of the implementation steps of the present invention; 6 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the precautions on the back before filling this page) _Installation ------- -Order --------- Line- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 548540 A7 80〇08twf.doc / 0〇 V. Description of the invention (6) Steps s20 to s34 are the originals One of the detailed implementation steps of the invention reply process -------------- install --- (Please read the note on the back? Matters before filling out this page} Please dream brother ^ picture, its drawing Shown is a test method for automatically stopping and resuming operation according to a preferred embodiment of the present invention, which is applicable to a system that can automatically wake up a computer under test by a test device. ·% The Ministry of Economic Affairs Intellectual Property Bureau employee consumer cooperative prints this test method for continuous automatic execution stop and resume operation including: first in step 10, use the test program to automatically put the computer under test into the state of power saving mode = a kind of software The control method makes the Lai computer enter the power-saving state, and then in step sl2, the test device of the polyhedron control method is used to automatically restore the computer to be tested to the normal operation mode. In order to make the tester's personnel not long Time is next to the computer under test to concentrate on other affairs, so set a setting in the J test program, which allows the tester to set the number of tests to stop the computer under test (enter the power saving mode) and reply (enter (Normal operation mode), the test program and test device in step sl4 'continuously repeat the execution of the set number of test times and test methods, automatically repeat steps sl0 and si2 until the test device is closed' And because there is a machine in the computer that allows the computer to enter the power saving mode 3 * 疋 Even if the number of tests has reached the set number, the computer will still Enter the power saving switch type, but after the test device is turned off, the test steps will not be continued. Among them, there are several components in the computer under test that can enter the power saving mode, such as power supply, memory and hard disk, etc. The device is then set to measure the "1 type" to make the above elements enter the mode in a random manner or in a pre-arranged arrangement. Relative to China's national standard 297 mm specifications) 548540 8008 twf. Doc / 009 A7 B7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs? 5. The description of the invention (b), for example, the first device that enters the power saving mode is a memory, the second device that enters the power saving mode is a hard disk, and the third device that enters the power saving mode is a power supply. Device, that is, when no user operates the computer for a long time, the computer will automatically turn off the power temporarily to save standby power, and the set number of tests will continue to repeat the above test method until the test device is turned off. In addition, when executing the setting of the test program, the above components can be put into the power saving mode by using a scan code of the simulated keyboard, or the above components can be put into the power saving mode by using a call function. Among them, the so-called simulated keyboard scan code method means that at the beginning of the design of the computer, if the computer enters the power saving mode by scanning the keyboard code, the test program can simulate the keyboard scan code that enters the power saving mode, so that the operating system (Operation System; OS for short) After receiving the scan code, the power saving mode function is activated to enter the power saving mode, and the other method is to directly call the power saving mode function to enter the power saving mode. After entering the power saving mode, the test device performs a sequence of actions to wake up the components that enter the power saving mode. Please refer to FIG. 2, which shows a flowchart of the steps performed by the test device to perform a sequence of actions to wake up the components entering the power saving mode. In fact, the test device continuously detects whether the above-mentioned components have entered the power saving mode, and the detection method is to detect the presence or absence of the power-saving voltage in the computer to be tested (step s20), because all of the above components are A necessary voltage and a power-saving voltage enable the components described above to operate in a normal operating mode K. Without this power-saving voltage (step s22), the above components will appear for a while. ) A4 size (210 x 297 mm) (Please read the precautions on the back before filling this page) Install n ϋ · ϋ n One bite t · 1 ϋ ϋ I ϋ I.- 548540 V. Description of the invention (η) And the test device will generate the first pulse signal (step s24), and then the test device will extend the pulse width of the first pulse signal in step s26, that is, the test device will not immediately detect the The test computer wakes up the computer under test when there is no power saving voltage, but it will return the computer under test to normal operation mode after a period of time. After that, the test device converts the extended first pulse signal into a second pulse signal in step s28, and triggers by the edge of the second pulse signal (step s30), so that the test device transmits the enable signal to the test. The computer (step s32), so that the computer under test that has entered the power saving mode automatically returns to normal mode operation (step s34). The trigger time of the second pulse signal is the time of the length of the first pulse signal plus the pulse width. Please refer to Figure 3, which shows an internal block diagram between the test device and the computer under test. Among them, a host connection interface 32 is arranged on the motherboard 30 in the computer to be tested and is connected to the test device 40, and a test device connection interface 42 corresponding to the host connection interface 32 is also provided in the test device 40, of which The voltage transmitted by the host connection interface 32 is a necessary voltage to maintain the device in the standby state, and the voltage transmitted by the host connection interface 32 is the power-saving voltage to maintain the normal operation of the device. Whether it is a necessary voltage or a power-saving voltage, it The voltage can be either 3.3 volts or 5 volts. The test device 40 includes a power-saving voltage sensor 44, a pulse wave processor 46, a pulse width controller 48, and a pulse wave output device 50. Among them, power-saving voltage sensor 44, electrical connection: U machine connection medium ill 32, this paper size applies to China National Standard (CNS) A4 specifications (2) 0 X 297 mm) ------- ----- Outfit—— (Please read the precautions on the back before filling out this page) •• Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Online Economics 548540 A7 B7 8008twf.doc / 009 5. Description of the Invention (Art) It is used to detect the presence or absence of power saving voltage of the computer under test. If the power saving voltage sensor 44 detects that the computer under test has no power saving voltage, a first pulse signal is generated. The pulse wave processor 46 is electrically connected to the power-saving voltage sensor 44 and is used to receive the first pulse wave signal and process the first pulse wave signal. The pulse width controller 48 is electrically connected to the pulse wave processor 46 to extend the pulse width of the first pulse wave signal and convert it to form a second pulse wave signal and return it to the pulse wave processor 46. The pulse wave output device 50 is electrically connected to the pulse wave processor 46 and the host connection interface 32, and is configured to receive the enable signal transmitted when the pulse wave processor 46 is triggered by the edge of the second pulse wave signal, and output the enable signal Connect to the host connection interface 32 to return the computer under test that enters the power saving mode to the normal operation mode. Please continue to refer to FIG. 4, which shows a detailed circuit diagram of the test device 40 in FIG. 3. The components used in the power-saving voltage sensor 44 to sense the presence or absence of the power-saving voltage include: a resistor-capacitor circuit (R_Ccnxmt) 440 and an inverter (441). The resistor 442 is electrically connected to the host connection interface 32 to receive a power saving voltage. The power saving voltage can be 3.3 volts or 5 volts. The first end of the capacitor 444 is electrically connected to the resistance 442 and the second end is Is the ground terminal. The inverter 441 is electrically connected to the resistor-capacitor circuit 440 and the pulse wave processor 46. When the power-saving voltage is lower than a reverse voltage, the inverter 441 forms a -th ... pulse wave signal transmitted by the electric capacitor-capacitor circuit 442, and transmits the first pulse wave signal to the pulse wave processor. 46. Please refer to Figure 5, which shows the resistance-capacitance circuit 440 and the inverse 10 paper size applicable to the Chinese National Standard (CNS) A4 specification (210 x 297 mm) ----------- · Install ----- * --- Order --------- Line # (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 548540 V. Invention A schematic diagram illustrating the characteristics of the circuit composed of (q) director 44]. That is, when the power-saving voltage received by the resistor-capacitor circuit 440 does not exist, the voltage stored in the capacitor 444 will gradually decrease. When it drops to the reverse voltage 反向 that the inverter 44 can withstand, the reaction will be triggered. The inverter outputs a reverse signal, and then the phenomenon shown in FIG. 5 is formed, and a pulse signal is sent to the pulse processor 46. When the pulse wave processor 46 receives the pulse wave signal (that is, the first pulse wave signal), it will output the pulse wave signal to the pulse width controller 4 8, where the output pulse wave signal has been reversed. The output signal is that the pulse width controller 48 will use the inverter 480 to reverse the pulse signal transmitted by the pulse processor 46, and the pulse width controller 48 also has power saving The same resistance-capacitance circuit and inverter device of the voltage sensor 44 have the same function, so the principle is not repeated here. It is used to extend the pulse width of the first pulse signal, and then via the inverter The reverse operation of 486 makes the first pulse signal plus the extended pulse width reverse to form a second pulse signal, and the pulse width controller 48 will also return this second pulse signal to the pulse processing器 46。 46. And ^ brother-^ pulse wave d 5 when the tiger returns to the pulse wave processor 46, it will trigger ^ * enabling signals from the output terminal Q to the pulse wave output device 50, where the pulse wave output device 50 Including: switcher 500 and transistor 502, where switcher 500 is a switch, as a switching element of test device 40, its control can be set to a conductive state by human or program control, and switcher 500 is The pulse wave processor 46 is electrically connected. When the pulse wave processor 46 is on, it can receive the giant signal sent by the pulse wave processor 46. This paper size applies to China National Standard (CNS) A4 specification (210 x 297 mm) -------------- packing-- (Please read the precautions on the back before filling this page)
經濟部智慧財產局員工消費合作社印製 548540 8008twf.doc/009 A7 B7 經濟部智慧財產局員工消費合作社印製 五、潑^明說明（YO ) 電晶體502,電性連接切換器500及主機連接介面32 ’ 在切換器500爲on的狀態下，作爲致能訊號傳遞至主機連 接介面32的導通元件，其中在接收到致能訊號的狀況下’ 電晶體502的集極C所導通的致能訊號爲低電位脈波訊 號，是以可輸送至Low傳輸端，但亦可將致能訊號從電晶 體502的基極B與切換器500中連接至High傳輸端傳輸咼 電位脈波訊號至待測電腦，使進入省電模式之待測電腦0 復至正常操作模式，端看電腦在設計元件啓動時所傳輸的 訊號爲低電位脈波訊號或是高電位脈波訊號。 另外’脈波處理器46，係一個具有淸除（clear)及預 置（preset)接腳的正反器，其可爲一顆由motorola所提供 之具有數個接收端及數個輸出端之74HC74系列D型正反 器，或是其他廠商所提供之正反器。其中接收端C ’係電 1生連接省電電壓感測器44，用以接收第一脈波訊號，在脈 波處理器46內部至少具有一反向電路（未繪出），將第一 接收端接收到之第一脈波訊號進行反向操作，經由與脈波 寬度控制器48第一端電性連接之輸出端Q’，將進行反向操 作之第一脈波訊號輸出至脈波寬度控制器48，其中，由與 脈波寬度控制器48第二端電性連接的接收端R，（即爲clear 端），接收第二脈波訊號。 輸出端Q，電性連接脈波輸出裝置50，用以將致能訊 號輸出至脈波輸出裝置50。接收端D，電性連接高位電壓， 在經由第：脈波訊號邊緣觸發脈波處埋器46時，傳送致能 iiH號/j令輸ίι丨丨端）Q。 本紙張瓦度適用中國國家標準（CNS)A4規格（210 x 297公釐） (請先閱讀背面之注意事項再填寫本頁) · ϋ «ϋ n I «ϋ 1 一eJI ·ϋ ϋ ·ϋ ϋ 1^ ϋ· 1 548540 A7 8008twf.doc/009 五、發明說明（\\ ) 綜上所述，本發明的優點在於使測機人員不需長時間 待在待測電腦（如筆記型電腦、桌上型電腦）旁邊測試待 測電腦是否可進入省電模式及敲打回復鍵後是否可使待測 電腦回復到正常操作模式，只要利用本發明之測試程式及 測試裝置即可自動使待測電腦進入省電模式及回復到正常 操作模式，減少測機人員的測試時間。 雖然本發明已以較佳實施例揭露如上，然其並非用以 限定本發明，任何熟習此技藝者，在不脫離本發明之精神 和範圍內，當可作各種之更動與潤飾，因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填寫本頁) 裝 丨線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 548540 8008twf.doc / 009 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Printing instructions (YO) Transistor 502, electrical connection switch 500 and host connection Interface 32 'In the state where the switch 500 is on, the conduction element is transmitted to the host connection interface 32 as an enabling signal, where the enabling signal is turned on by the collector C of the transistor 502 when the enabling signal is received. The signal is a low-potential pulse signal, which can be transmitted to the Low transmission end, but the enable signal can also be connected from the base B of the transistor 502 and the switch 500 to the High transmission end to transmit the pseudo-potential pulse signal to the standby Test the computer so that the computer under test that enters the power saving mode returns to the normal operation mode. Check that the signal transmitted by the computer when the design component starts is a low-potential pulse wave signal or a high-potential pulse wave signal. In addition, the pulse processor 46 is a flip-flop with clear and preset pins, which can be a motor provided by motorola with several receiving ends and several output ends. 74HC74 series D type flip-flops, or flip-flops provided by other manufacturers. The receiving terminal C ′ is connected to the power-saving voltage sensor 44 for receiving the first pulse wave signal. The pulse wave processor 46 has at least one inverting circuit (not shown) to receive the first pulse wave signal. The first pulse wave signal received by the terminal is reversely operated, and the first pulse wave signal that is reversely operated is output to the pulse width via the output terminal Q ′ electrically connected to the first terminal of the pulse width controller 48. The controller 48 is configured to receive the second pulse signal by a receiving terminal R (that is, a clear terminal) electrically connected to the second terminal of the pulse width controller 48. The output terminal Q is electrically connected to the pulse wave output device 50 for outputting the enabling signal to the pulse wave output device 50. The receiving end D is electrically connected to a high-level voltage, and when the pulse wave embedding device 46 is triggered through the edge of the pulse wave signal, it transmits an enabling number iiH / j 令 input) Q. The paper wattage is in accordance with China National Standard (CNS) A4 (210 x 297 mm) (Please read the precautions on the back before filling out this page) · ϋ «ϋ n I« ϋ 1 eJI · ϋ ϋ · ϋ ϋ 1 ^ ϋ · 1 548540 A7 8008twf.doc / 009 V. Description of the invention (\\) In summary, the advantage of the present invention is that the tester does not need to stay in the computer to be tested for a long time (such as a notebook computer, a desk) Next, test whether the computer under test can enter the power-saving mode and whether the computer under test can return to the normal operation mode by hitting the reply button. As long as the test program and test device of the present invention are used, the computer under test can be automatically entered Power saving mode and return to normal operation mode, reducing the test time of the tester. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling out this page.) 丨 Line Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)