TW200849325A - Plasma processing method and plasma processing apparatus - Google Patents

Abstract

The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.

Description

200849325 IX. Description of the Invention [Technical Field] The present invention relates to a semiconductor manufacturing method, and more particularly to a metal gate/high-k structure and a step structure, a three-dimensional structure, and a high selectivity to an underlying film and a mask layer, Further, a plasma processing method and a plasma processing apparatus which are used when forming a gate of a vertical shape are required. [Prior Art] A MOSFET (Gold Oxygen Half Field Effect Transistor) device used for digital home appliances, personal computers, and mobile phones is required to be integrated, speeded, and functionalized. Corresponding to this requirement, the miniaturization of the polysilicon/SiO2 structure gate of the pith mobile phone, the gate of new materials and new structures was reviewed. The principle of dry etching used in the gate forming method of a planar MOSFET or F IN-FET having such a metal gate/high_k structure is to electrolyze a reactive gas by electromagnetic waves, using the generated ions and radicals. Ions promote the reaction. Therefore, the plasma processing apparatus embodying this method is a plasma generating mechanism, a reactive gas introducing mechanism, a pressure control mechanism, a lower electrode mechanism for Si wafer mounting, a Si wafer transfer mechanism, and the like. The timing control mechanism and the like are constituted. The lower electrode mechanism is composed of an electrostatic adsorption mechanism for fixing a Si wafer, a Si wafer temperature control mechanism, and a bias application mechanism. The method of controlling the distribution of Ion Energy Distribution Function (IEDF) using a plasma processing apparatus having such a mechanism is known to have a waveform or frequency applied by a bias voltage. For example, in 200849325, a technique of applying a pulse-like bias and a method of applying a two-frequency bias having a local frequency of 2 MHz or more and a low frequency of 2 MHz or more are proposed, and a technique for improving the selectivity of Si in an insulating film is proposed (for example, Patent Document 1). The frequency at which the output of the biasing mechanism is subjected to the passage of the plasma through the plasma sheath has the IEDF, which is reported, for example, in Non-Patent Document 1. In addition, a technique for detecting an abnormality such as insulation degradation of an insulating film in a chamber wall or a lower electrode by monitoring a high frequency, a current, and a phase is proposed, for example, in Patent Document 2. Patent Document 1: JP-A-2002- 1 4 1 34 No. Patent Document 2: JP-A-2007-250755 Non-Patent Document 1: Journal of Vacuum Science Technology A Volume 20 ρ·1759 [Summary of the Invention] Problem to be solved) As shown in FIG. 3( a ), when a conventional plasma processing apparatus is formed by dry etching using a metal gate/high-k gate having a film structure having an STI step difference 310, it is as shown in FIG. As shown in Fig. 3(b), it is difficult to prevent the bottom layer of the high-k gate insulating film from penetrating 312, preventing the hem shape 3 1 4 from being generated, and obtaining a vertical pendulum shape. In the same way, the selectivity and vertical processability are more severe for the gate etching of the FIN-FET based on the problem that the wiring is densely distributed on the substrate and the density difference is generated. Because the bottom of the FIN segment of 50nm is the bottom of the bottom, the side etching of the upper part of the gate length portion and the uranium engraving additionally affect the voltage coverage and multiple layers, so that the bottom layer is turned into a layer, The difference in the vertical direction of the 200849325 and the skirt of the lower part of the skirt will become the main reason for the special _. An object of the present invention is to provide a gate material composed of a film having a STI structure or a three-dimensional gate structure (FIN-FET or the like) and a plurality of layers including a metal material and a high-k material, which can be used for dry etching. A plasma processing method and an electric paddle processing apparatus for selecting a stable and stable vertical processing of the underlying film of the stomach. r (Means for Solving the Problem) The plasma processing apparatus for achieving the above object includes a vacuum container, and a lower electrode disposed in a processing chamber of the vacuum container, on which a wafer to be subjected to plasma processing is placed; An application mechanism supplies a bias power of a plurality of frequencies to form a bias potential at the lower electrode; a gas supply mechanism that introduces a reactive gas into the processing chamber; an adjustment mechanism that adjusts a gas pressure in the processing chamber; and an electromagnetic wave supply mechanism And generating plasma in the processing chamber; comprising: an IEDF control mechanism that independently changes energy of ions entering the wafer and the IEDF; and a detecting mechanism that detects a plasma state with respect to a bias frequency. In this case, the IEDF control unit is composed of a power supply unit that generates a plurality of frequencies by oscillation, and each of the matching units, and the mechanism for detecting the state of the plasma includes detecting the impedance of the plasma with respect to each frequency supplied from the bias applying unit. mechanism. A plasma processing method for achieving the above object includes: mounting a project: a wafer having a film structure is placed on a 200849325 electrode under a processing chamber inside a vacuum vessel, the membrane being constructed such that the surface is made of a high-k material a film comprising a plurality of layers of a metal material and having a step structure; introducing a project to introduce an etching gas into the processing chamber; adjusting the process to adjust the processing pressure; generating a project to generate a plasma in the processing chamber; and supplying the project Providing a bias potential of 1 or a plurality of frequencies to form a bias potential on the wafer; and performing the film structure by changing the output of the bias power; and having the following features: The time change of the plasma impedance is detected by the bias applying mechanism side; the end point determining project determines the end point of the plasma processing according to the detection result; and the control project, after the end point judgment, independently controls the injection into the wafer The ion energy and its distribution. Control engineering for independently controlling the ion energy and its distribution of the above-mentioned wafers, including the output of the bias power that changes most frequencies and their mixing ratios or after the process of detecting the time variation of the impedance of the plasma, Separating into the impedance of the wall state component and the component directly above the wafer, having: comparing engineering, comparing the separated data with the database or the variation model; and performing wall cleaning according to the comparison result, or changing the second time Engineering of wafer processing conditions. [Embodiment] Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, an example of a film structure which is an object of the embodiment of the present invention will be described with reference to Fig. 3 . Figure 3 (a) is a cross-sectional view of the sample before the engraving process of a planar CMOS with a metal pole/high-k structure, and Figure 3 (b) is a cross-sectional view of the conventional method after etching treatment. (c) is a cross-sectional view of the etching process of the present invention. -8- 200849325 In FIG. 3(a), the wafer is composed of: STI 308 formed on the S i substrate 309; HfSiON (high-k) insulating film 3 07 formed on the Si substrate 309 and the STI 308; a metal gate layer 3 0 6 formed on the High-k insulating film 307; a gate C ap layer 305 formed thereon in this order; a lower mask 304; an intermediate layer mask 303; BARC (anti-reflection film) a layer 3 02; and a resist 3 01 formed thereon. As shown in the figure, for a planar laminated metal/hi gh-k gate having an STI step difference 310 caused by the formation of STI 308, a gate etching apparatus using a conventional mechanism having a single bias frequency of 400 kHz is used, and Cl2 is used. When the /HBr gas is etched, as shown in FIG. 3(b), the underlayer 311 of the HfSiON (high-k) film is formed in the lower portion of the gate which becomes the active portion of the MOSFET. Further, at the corner of the STI step 310, the residual portion 3 1 3 of the STI step gate material is generated by a skirt enlargement. In addition, a lower portion of the gate portion of the field portion of the wiring portion may have a lower sag pull-down shape 314 that becomes a skirt-like shape, or a residual portion 315 of the gate material on the STI surface. . That is, in the etching process of the laminated metal/high-k gate, it is difficult to balance the improvement of the underlying high-k selectivity near the gate and the prevention of the sag pull-down shape. As shown in Fig. 3(b), the reason why the improvement of the underlying selectivity at 400 kHz bias and the prevention of the sag pull-down shape are caused by the fact that the IEDF (ion energy distribution) has diffusion centered on the average energy, and the optical on the film The etching end point of the transparent material is judged to be slow. Fig. 2 shows an example in which the energy distribution of ions is centered on the average energy of the same time as - 9 - 200849325. Figure 2 is a sample of Vpp II 200 V applied to a low frequency 400 kHz and a high frequency 13.56 MHz wafer at a plasma temperature of 3 eV, mass of injected ions of 79.9, and plasma density of 1 X ΙΟ Γ Γ Γ1. A pattern diagram of most of the IEDF examples at RF. The IEDF 203 'with respect to the time average of 100 eV 'distribution width 204 becomes about 200 eV at 400 kHz. 'There are two peaks at around 0 V and 200 V near the vicinity of 200 V. In addition, the IEDF 201 at 13.56 MHz of high frequency has a narrower distribution width 202. 50eV. The IEDF205' with a mixture of low frequency and high frequency at 100Vpp each has an intermediate distribution. This is because the higher the frequency of the high-frequency bias, the faster the period of the sheath voltage change of the accelerated ion becomes, the shorter the sheath vibration time is relative to the time the ion passes through the sheath, and the ion cannot follow the sheath change and is accelerated by the average value of the electric field. The reason. As described above, when the etching is performed at a frequency of 400 kHz, the high-energy ion of about twice the time-averaged ion energy deteriorates the selectivity, and the low-energy ion of about OeV becomes the hem shape of the hem. It becomes difficult. Therefore, in order to achieve both the selectivity and the hem pendulum shape, it is preferred to narrow the ion energy distribution at a high frequency. Further, a distribution having a large diffusion at a low frequency is used, for example, when a metamorphic layer of a surface is physically sputtered with high energy ions, or when an insulating film of high energy ions is required to be etched. In addition, by using low frequencies, high energy ions with a diffusion distribution relative to the average energy can be utilized without affecting the dissociation or distribution of the plasma.

. As described above, it is necessary to be able to control the IEDF when etching through the multilayer film. In addition, another cause of the shape abnormality as shown in Fig. 3(b), that is, the end point of the -10-200849325 is slow, which corresponds to the gate. Thin film formation (about 1 〇 ~ 3 Onm) and it is necessary to reduce the etching speed. That is, in the conventional method of using luminescence, when the etching rate is slow, the composition ratio in the plasma of the reaction product becomes small, and the luminescence intensity in the plasma is weakened, and the change is also small. In addition, when the end point is judged by the conventional film thickness interference method, the gate thickness of the material to be etched becomes smaller than the 1/4 wavelength of the wavelength of the detection light source (200 to 800 nm), and it is difficult to find a periodic region, and the gate is There is a large amount of surface roughness of the material, or a case where the underlying high-k film is as thin as about 2 nm and is heterogeneous. Therefore, the intensity of the interference waveform is affected by the etching area in the viewing angle of the interference light, resulting in the addition of a pattern crystal. The judgment of the end of the circle is more difficult. In addition, in the method for detecting the electrical characteristics of the plasma used in the present invention, the density of the reaction product directly above the wafer is sensitive to changes in the portion of the high-plasma sheath, and even when the initial film thickness is thin, the roughness can be detected. . In addition, with regard to the stable operation of the device, the end point detection can be performed by detecting the impedance of the low frequency and the high frequency at a frequency directly above the wafer, and separating the change in the state of the plasma wall from the change directly above the wafer. Usually, when the bias voltage applied to the plasma is represented by an equivalent circuit, not only the angular velocity of the high frequency, H, the angular velocity of the low frequency, L, and the impedance of the sheath directly above the wafer (Zly, y = H, L) The electric gas supply portion may be formed by the impedance (Z 2 y, y = Η, L) of the sheath formed by the wall surface of the chamber, and is expressed by the following formulas (1) and (2). That is, 'detect the voltage at different frequencies (Vly, y = H, L), current pressure (Ily, y = H, L), phase monitoring 値, on the high frequency side (1), low frequency side (2), resistance-11 - 200849325 The relationship between the resistance and the frequency, that is, the equation of (3) is the real part of the solution. If the imaginary part is solved, the impedance information directly above the wafer and the wall of the chamber can be separated.

=Kr"(1)

AlIl^Z2LIl^Vl -(2) Equation (2)

x = l, 2; y = H or L = Rx + jXx > r - (3) The present invention is based on the fact that a plurality of impedances can be separated by a plurality of frequencies. In the embodiment described below, various shape abnormalities (for example, poorly formed shape, notch, sidewall engraving, underlying film damage, skirt, bottom layer) generated when etching a multilayered gate of a planar CMSOFET having a stepped structure are performed. The problem of penetrating, pushing out, etc. is solved by using a plasma processing apparatus having a bias applying mechanism having: an ion energy distribution (IEDF) control mechanism having a plurality of frequencies; and a majority of plasma Impedance detector. (First Embodiment) First, an embodiment of an apparatus for carrying out the present invention will be described. Fig. 1 -12 - 200849325 is a schematic longitudinal sectional view showing a configuration of a plasma processing apparatus according to an embodiment of the present invention. In the plasma processing apparatus shown in Fig. 1, a plasma is formed on the inside of the inside of the vacuum vessel. A plasma processing apparatus for treating a saturated material, that is, a substrate-like sample, such as a semiconductor wafer disposed in the processing chamber, using the plasma. The plasma generating mechanism of the plasma processing apparatus includes a UHF power supply 101 of 450 MHz, a high-speed response UHF matching unit 102 with an impedance detector, an antenna 103, and an electromagnet 104. The antenna 103 that emits UHF waves in the chamber 107 constituting the vacuum vessel is disposed closer to the atmosphere than the quartz plate 105 that maintains the vacuum. The etching gas is mixed with the high-speed reactive gas introduction mechanism 1 1 1 composed of a flow rate controller and a check valve by a gas flow rate of several seconds to form an etching gas, and then introduced into the chamber 107 by the gas jet head 106, and is etched into the gas. The gas pressure can be controlled by a high speed response pressure control mechanism 110 located above the high vacuum pump 109. The lower electrode 1 1 3 in which the material to be etched, that is, the S i wafer 1 1 2 is disposed, is provided with a rough surface covering the upper surface side and the side wall of the mounting surface on which the Si wafer 112 is placed. The ring-shaped susceptor 1 14 is composed of two or more concentric shapes and different heat regions, and the temperature control mechanism 115 can control the temperature of the lower electrode in each region to be specific. In the uranium engraving process, a DC voltage of 2,000 V to +2000 V DC voltage is used to electrostatically adsorb the Si wafer 1 1 2, and the He wafer is filled with a gap between the Si wafer 1 1 2 and the lower electrode 1 1 3 . Pressure control. Adjusting the temperature of the etched Si wafer 1 1 2 by the use of the above electrostatic adsorption technique to the lower electrode 1 1 3 is connected to the bias applying mechanism 1 1 7 for introducing ions into the plasma-13-200849325 The Si wafer 1 1 2 controls the ion energy distribution thereof. The biasing mechanism 1 1 7 is composed of an IEDF control unit 1 2 7 that controls the ion energy distribution of the incident, and a gyro state detector (hereinafter referred to as PIM) 126. In the present embodiment, the IEDF control unit 127 uses a power source that transmits and supplies power of a plurality of frequencies, that is, a low-frequency bias power supply unit 120, and a low-frequency matching unit 1 2 1 'high-frequency bias power supply unit n. 8, the high frequency matcher 丨丨 9 constitutes. The frequency of the low-frequency bias power supply unit 20 is 400 kHz, and the frequency of the high-frequency bias power supply unit 1 18 is used. 56MHz, respectively, can output the equivalent of about 1W to the maximum power of about 150W (continuous sine wave) / 12 inches diameter, 0n-0ff modulation in the range of 500Hz ~ 3kHz, using time modulation (Time Modulate, hereinafter TM) function (maximum power of about 1 50 W ° during modulation) At this time, the high frequency matcher 1 19 and the low frequency matcher 1 2 1 need to be set to output at the lowest output, for example, the maximum output of 0 · 5 % or more The sensitivity can be matched by the output of 1 w. In addition, the plasma state detector 1 26 detects the voltage with respect to each frequency by disposing it between the IEDF control mechanism 127 and the lower electrode 1 13 , The time change of the current and the phase, that is, the change in the impedance including the change in the electron density and the electron temperature. In the plasma processing apparatus of the present embodiment, the light-emitting and light-receiving unit that receives the plasma light-emitting signal in the etching process is used. It is disposed, for example, at the bottom of the container constituting the chamber 107. The output of the illuminating light receiving unit 122 is transmitted to the illuminating beam splitter 123. Further, it is provided with the S i wafer 1 1 2 on the lower electrode 1 1 3 To, -1 4- 200849325 A film thickness interference monitor 124 for detecting the film thickness of the Si surface by receiving interference light in the plasma or an external light source. It is disposed on the surface of the side wall of the chamber 107, and is disposed so as to be disposed so that the temperature of the side wall is adjusted to a suitable temperature in the plasma before and after the treatment. Further, in the plasma processing apparatus according to the present embodiment, the control unit 125 is provided, and the timing can be controlled according to the preset setting, or the output of the sensor for measuring the operation of each unit can be received, and the received signal can be used. The operation of the various parts is performed by the operation or reading of the data by the memory device. The control device 125 is configured to be connected to the UHF power source 101, the high-speed response UHF matcher 102 of the additional detector, the heater 108, the high pump 1 〇9, the high-speed response pressure control mechanism 110, the high-speed response reactant introduction mechanism 111, The temperature control unit 115, the IEDF control unit, and the high-frequency bias power supply unit 1 1 8 disposed therein, and the illuminator 123, the film thickness interference monitor 124, and the plasma state detector 126 communicate and receive their outputs. , issued an action signal to each of them. Receiving the output of the illuminating beam splitter 123, the film thickness monitor 124, and the plasma detector 126, detecting the film thickness of the Si wafer or the end state of the processing, according to the detection result, 1 27, UHF power supply 01, additional High-speed response of the detector UHF matching device 102, heater 108, high pump 109, high-speed response pressure control mechanism 1 1 〇, high-speed response reaction body introduction mechanism 1 1 1 , temperature control mechanism 1 1 5 calculation of operation signal, signal adjustment Its action. The high-speed response UHF 102 of the additional impedance detector functions as a matching device that records a majority of the matching of the UHF power source 101 and selects its matching path to match. Wafer peripheral processing device self-test knot command impedance vacuum gas 127 splitting, for example, state detection, etc., impedance vacuum gas emission matching point, -15- 200849325 Hereinafter, according to the timing diagram of FIG. 4, the plasma processing apparatus of FIG. 1 is used. , as shown in Figure 3 (a), with STI step difference 310 and resist 301 / BARC layer 032 / intermediate layer mask 303 / lower layer mask 3 04 / gate Cap layer 3 0 5 / metal gate layer 3 A portion of a planar MOS of a 06/HfSiON insulating film 307, a thin metal gate layer 306 (TiN) of 10 to 30 nm, which is etched using the present invention. After the BARC layer 302 to the gate Cap layer 305 are etched in the same chamber, a TiN (metal gate layer) 3 06 break turough (hereinafter referred to as BT) step is performed. The BT step is intended to eliminate the Ti0 surface layer that hinders TiN etching when combined with oxygen gas when the BARC layer 302 is overetched (represented by 0E). The conditions of the BT step are that ArlOO~200cc, pressure iPa, UHF applied power 500W, 400kHz, bias low frequency application power 5〇~100W. With the use of a 400 kHz low frequency bias, it is easy to obtain the necessary high energy for Ti0 removal. As shown in FIG. 4( a ), the voltage, current, and phase results detected by the plasma impedance monitoring of the 400 KHz in the plasma state detector 126 are judged by the time change of the impedance ( EPD). With the BT step of TiN, the surface TiO is removed, and Ti, N, etc. are released to the vicinity of the plasma sheath, causing changes in electrical characteristics such as electron density and sheath thickness. At the time when the impedance becomes large, it is moved to the main etch (hereinafter referred to as ME). In the ME step of ΊΊΝ306, HBr, NF3, CF4, SF6, pressure 〇 are added on the basis of Ch or HC1. 2Pa, UHF applied power -16 - 200849325 500W conditions. The bias of the ME step of TiN3 06 400kHz low frequency bias mixing 50% of the 13_56MHz high frequency bias 4 (b), the 2 frequency mixing ratio of the TiN ME is 403). The advantage of high-frequency bias can be obtained at the same time as the narrow block width suppresses the slab hard block caused by the ion, and the anisotropy caused by the high-frequency bias applied by the high-energy ion can be obtained, and the chamber wall-shaped wafer can be positively The impedance of the sheath formed above is separated, and the end point of high precision can be judged by the impedance of the crystal. The ME step is terminated by the plasma impedance detector 402 detected by the plasma state detector 1 26, switched to the OE1 step of TiN, and the output 404 of the IEDF control is set to be a high frequency bias power of 1%. This is the next step of OE1, which needs to integrate the STI step difference, the film thickness, the poor circuit shape or the difference in the material to be etched, and the in-wafer difference caused by the wafer. Therefore, the pattern of the underlying film can be maintained and the choice of the underlying layer can be maintained. At the same time, it is necessary to etch the portion that does not reach the bottom layer. At this time, by using the signal of the plasma state detector 1 26 as shown in FIG. 4(c), the end point 406 obtained by conventionally detecting the time change pattern of the reaction product or the etchant , is about 1 to 5 Get the end of ME. Thereafter, in the OE2 step of the signal stabilization of the plasma state detector 126, the plasma condition of the 〇E2 step is used, HBr/02, full flow rate of 200 to 400 cc, pressure of 3 to 10 Pa, and UHF power supply of 500 to 700 W. Use high-frequency bias power 80%, low-frequency 20% mixed bias power (in Figure 4 (c), TiN OE2 system used (the reason is to make low energy plus advantages of the sheath and circle) The point above the point is judged, the changing time mechanism 1 2 7 is because of the etching of the pattern between the high-k, compared with the illuminating peak seconds, it can be taken to the time when the Ar is diluted by 1 〇1. 2 frequency -17- 200849325 rate mixing ratio 4 0 5 ). The reason is to reduce the electron shading damage while reducing the shape of the underlying film selective step or non-opening portion. A ratio of high energy ions close to a multiple of the average energy, while reducing the shape of the hem pendulum, while maintaining selectivity, physical damage caused by sub-collision, and also reducing the source/drainage Neutralization of the charged electrons and low-energy ions in the upper part of the cover can avoid the gap caused by the loss of the electron shadow. The above, by the application of the present invention, the pole processing is as shown in Fig. 3 (c), and the underlayer can be prevented from being generated. In addition, in addition to the gate structure of the present embodiment, other insulating materials such as hi gh-k Zr02 , Υ 2 〇 3 , La 203 , La A 10 x , La SiO x , A 120 3 , and HfAlO (N) are used, and the metal gate layer is other than TiN. The same effect can be obtained by metal materials such as TaN, TaSiN, TaC, Ru, HfN, and MoN. In the above embodiment, the IEDF control unit 127 uses a mechanism that generates power supply units 118 and 120 and two matching units 11 having different frequencies. Compared with other IEDF controls such as the notch bias i bias, this method has a simple configuration of the oscillator and the matcher. When the bias applying means 1 17 uses the notch bias power supply, it is the same as the overlap of the continuous frequencies, and although it has a high price, it can be provided with a plasma state detector 1 26 having a frequency range. Further, in the present embodiment, the VPP for the voltage side amount of the sub-portion is used as an index. However, not only Vpp but also STI is reduced, and the dispersion is suppressed. In this case, the metal gate is processed. Materials such as Hf02, other cases are oscillating [9, 121 I (the advantage of Clip, the majority of continuous acceleration can be transmitted -18-200849325 output power ratio. At this time, the output power becomes the multiplication of current and voltage, Vpp will vary depending on the configuration or area of the grounding, so you need to consider this point. Alternatively, you can calculate the model as shown in Figure 2, and control the output of each power supply to make it the desired energy distribution. In this case, you can have the energy distribution. Calculate the detection mechanism of the plasma density, electron temperature, etc. to improve the control accuracy. Also, the IEDF controlled bias power supply, high frequency side system is used. 56MHz, the low-frequency side uses 400kHz, basically the difference between the two different frequencies is larger. The IEDF has a wider control range, and the separation between the wall of the chamber and the impedance above the wafer is also good. In addition, it is preferable that they do not become integer multiples of each other, and it is possible to use high harmonics of individual frequencies. At this time, in order to maintain the independence between the plasma generation and the good in-plane distribution, it is preferred that the frequency on the high frequency side is lower than the frequency of the plasma generating mechanism. For example, in the case of ECR, independent control of ion energy and plasma density at 100 MHz or more becomes difficult, so it is preferably 4 MHz or more and 100 MHz or less. Further, when the frequency on the low frequency side is lower than 100 kHz, the insulating layer on Si is liable to cause a charge up. Therefore, it is preferable that the frequency on the low frequency side is 100 kHz or more and less than 4 MHz, and the frequency on the high frequency side is 1 MHz or more and less than 100 MHz, and the frequency difference is larger as much as possible. In addition, the mixed frequency band is also affected by the plasma generating mechanism. For example, as described above, in the plasma generation mechanism in which the distributed control uses a magnetic field, the use of the cross-impedance effect of E X B is used. High frequency of 56MHz. The balance between ICP, CCP, etc. and the frequency of the plasma source can be used. 60MHz. -19- 200849325 (Second Embodiment) Yu Di 1 knows that the impedance of the wall state is constant, and the end point is obtained by the absolute resistance of the wafer processing, but in the mass production processing of the wafer There is a change in the state of the wall of the chamber caused by time. Next, an embodiment in which the state of the wall surface of the chamber is separated to obtain an end point will be described. In the first embodiment, when the end point determination is performed at a frequency mixing ratio of 50% in T i N, the detection process of the impedance corresponding to the majority of frequencies is detected as shown in the end point determination flow of FIG. 5 . After 1 'the separation process 5 0 2, that is, according to the above formula (1), formula (2), formula (3), the wall surface and the individual impedance directly above the wafer are separated, and the end point judgment project 5 0 3, The change engineering 504, that is, the output of the IEDF control unit 127, the UHF power source 101, the high-speed response pressure control unit 110, the high-speed response reactive gas introduction unit 1 1 1 , and the temperature control unit 1 1 5 are changed. The endpoint judgment mode used at this time is shown in Fig. 6. Fig. 6(a) is a diagram showing the impedance change directly above the wafer, except for the impedance change of the wall portion after the separation process, on the immitance of the majority impedance. For example, when the impedance 602 before the end point determination is moved to the impedance 6 0 1 when the etch film is completely removed, the matching path 603 is adopted by the tuning capacitor and the tuning coil depending on the matching unit, and the setting is The end point judgment is performed at the time of the majority of the impedance range of 6 0 4 and 6 0 5 . Further, Fig. 6(b) is a schematic diagram showing an impedance change detected at a single bias frequency and plotted on an immitance. When there is a change in time, as the etching processing time increases, the impedance of the wall portion of the chamber -20- 200849325 changes 606, and before the end point judgment, the set impedance range is exceeded 6〇4, and the end point becomes non-existent before the judgment. In view of this phenomenon, according to the impedance detection of most frequencies of the present invention, by performing the separation process between the wall state component and the component directly above the wafer, the end point of the wafer can be stably obtained without affecting the wall state, by The combination of IEDF control can stably obtain the uranium engraved shape of the metal gate/high-k structure without underlayer penetration and without the shape of the hem. The flow of Figure 5 is based on the control device 1 25 . The internal control program is implemented or described in the control software of the plasma state detector 126. In the present embodiment, TiN (metal gate layer) 306 having a large impact on device characteristics among the layers of the cross-sectional structure sample shown in Fig. 3(a) is described, but it can also be used for each BARC. The end points of each layer such as layer 3 02, intermediate layer mask 303, lower layer mask 3 04, and gate Cap layer 3 0 5 are judged. (Third Embodiment) The following is an embodiment in which the impedance of the separated chamber wall surface and the wafer directly above the impedance are changed. A flowchart for the ME end point judging step which is formed when the majority of the metal gate/high-k gate of Fig. 3(a) is performed is shown in Fig. 7. In the method of the second embodiment, after the detection of the impedance corresponding to the plurality of frequencies is detected, the separation process 5 0 1 is performed, that is, according to the above formulas (1), (2), and (3). The wall is separated from the individual impedance directly above the wafer, and the comparison is performed. 70 1. The impedance of the wall of the chamber to be separated and the impedance directly above the wafer, and the state of the same step in the past (the past impedance change, etc.) The data, the change model) is compared with --2149325. In Comparative Engineering 70 1, the current impedance or current, voltage, and phase are recorded in a database and compared with past data to be classified as time variation for each wafer. According to the classification, the state of the wall surface of the chamber is determined, and the adjustment process 702 is performed, that is, the wall state resetting process is performed, or the output of each device is appropriately adjusted in a positively changing manner, so that the separated impedance information can be used for time variation. Suppression. For example, in this classification, when only the voltage, current, phase, or impedance on the high frequency side changes extremely, it is determined that the uniformity of the bias in the wafer surface changes, and the surface of the bias is adjusted by the second wafer. The inner distribution makes the in-plane distribution of the bias voltage uniform, and thus, the uniformity of the control bias can be fed back, and the decrease in the yield can be suppressed. The uniformity correction method of the bias voltage can be realized by adjusting the mixing ratio of the two frequency biases. For example, when the mixing ratio of low frequency (400 kHz: VppL) to high frequency (13.56 ΜΗζ: VppH) (VppH / (VppH + VppL)) is 0%, 20%, 100%, the distribution of polycrystalline sand etch rate The changes are shown in Figures 8 (a), (b), and (c). The uranium engraving conditions are: HBr/02 for the treatment gas, 3 Pa for the pressure, and 500 W for the UHF. When the mixing ratio of the bias power is set to 1 3 · 5 6 M H z is 0%, the high distribution of the polycrystalline engraving rate is 11% (Fig. 8(a)). As a bias voltage setting 13. When the mixing ratio of 56 MHz is 20%, the medium-high distribution of the polysilicon etch rate is 〇% (Fig. 8(b)). As the bias power setting 1 3. When the mixing ratio of 5 6 Μ Η z is 1 〇 〇 %, the high distribution of the polycrystalline sand engraving rate is 12% (Fig. 8(c)). That is, with high frequency bias power -22- 200849325 13. As the mixing ratio of 56MHz increases, the distribution of the ends of the wafer rises, and the mixing ratio can be controlled by 12% of the height of the 97% control end and the distribution of the wafer with the bias mixing ratio. Fig. 8(d)) shows a mixture ratio of the high-frequency 13·56 ΜΗζ and the low-frequency 400 kHz monitor voltages VH and VL, and when the VH + VL is changed to a substantially constant manner, the polysilicon etch rate 801 on the 200 mm wafer is measured. The result of the etch rate of SiO 2 822. The SiO2 etch rate 802 is expressed in 10 times. With high frequency bias power 13. When the mixing ratio of 56 MHz is increased, the polycrystalline engraving rate is reduced by about 20%. In contrast, the SiO 2 etching rate is rapidly decreased, and the selectivity (selection ratio) 803 to the oxide film is increased. As described above, when the mixing ratio of the bias voltage is changed and the in-plane rate of the wafer is controlled, when the mixing ratio is controlled to 30% or more, the OE becomes a highly selective region with sufficient resistance (selection ratio 804 or more of 200). better. Other means of correcting the in-plane distribution of the uranium engraving rate or shape can be controlled by combining the output of the electromagnet 104 or the gas flow distribution, the in-plane distribution of the wafer platform, and the like. Moreover, as the number of wafer processing sheets increases, when only the low-frequency impedance and the high-frequency impedance of the chamber wall surface change in the same engraving step, if the state of the chamber wall surface changes, it is judged by the observer or judged by the control device 150 Automatically or manually performing clean processing of the plasma processing apparatus to promote the exchange of components, and changing the IEDF control mechanism 127, the UHF power source 101, the high-speed response pressure control mechanism 1 1 , and the high-speed response reactive gas introduction mechanism according to the modified correction model 1 1 1. The output of the temperature control mechanism 1 1 5 . The above example classifies the device state or wafer processing state by the impedance of the chamber wall or the impedance directly above the wafer, -23-200849325 or the impedance of the low frequency bias or the impedance of the high frequency bias. In addition, information on the direction of change (such as the inductive side or the conducting side) can be considered. For more detailed classification and database construction and change factors, appropriate feedback control can be implemented based on the change factor. As described above, in the engraving step (ME step or end point judging step) that affects the shape processing, the 2-frequency mixed IEDF control bias is used, the impedance is measured, recorded, and compared with the past database or variation model. In this way, the change in etching characteristics can be automatically corrected. The mechanism for realizing this method is as shown in Fig. 94. The control device 185 is connected to the database 901, and the input signal to the control device 125 is not limited to the bias applying mechanism 1 1 7 of the first embodiment or the second embodiment. The output of the plasma state detector 1 26 . That is, for the input signal of the control device 125, the output of the conventional plasma light-emitting beam splitter 123 (luminous spectrum) or the high-speed response of the additional impedance detector UHF matcher 102 (the power seen by the plasma frequency) can be used. Output of plasma impedance, voltage, current, phase) or film thickness interference monitor 124, and other mechanisms such as UHF power supply 101, electromagnet 104, heater 108, high-speed response pressure control mechanism 1 1 , high speed In response to each of the monitoring gases of the reactive gas introduction mechanism 1 1 1 , the temperature control mechanism 1 15 , and the DC power source 1 16 . The control device 185 memorizes each input database, and the control device 25 compares and refers to the past data and the newly input data recorded in the database 90 1 according to the variation model and the comparison in the reference database 901 or the control device 125. As a result, the signals of the IEDF control unit 127 or the respective control devices are output. As described above, not only the information of the lottery state detector 1 26 corresponding to the majority of the frequency of the present invention, but also the monitoring information of the control mechanisms of the -24-200849325 of the illuminating spectrum, etc., can implement more detailed device states and wafers. The classification of the treatment status can be appropriately disposed. (Fourth Embodiment) Hereinafter, with reference to Fig. 1A, a planar ArF resist 301/BARC layer 301/TEOS (hard mask) 1001/polycrystalline 002/HfSi023 07 having the shape shown in Fig. 1(a) is used. The CMOS gate electrode having a structure laminated on the Si substrate 3 09 is an embodiment in which the present invention is used for processing. Fig. 10 (a) shows the cross-sectional shape before etching having a multilayer film mask structure including a hard mask. Fig. 1 (b) is a cross-sectional shape of a conventional method of high-frequency bias after hard mask etching, and Fig. 1 (c) is a cross-sectional shape of a conventional method of high-frequency bias for gate etching Fig. 1 〇(d) is the cross-sectional shape of the present invention after the etch processing. For the Si wafer having the hard mask 1001 disposed under the BARC layer 302 and the cross-layer structure of the polysilicon gate layer 002 disposed as shown in Fig. 10(a), 26 MHz or 13. The upper frequency of 56 MHz (single bias frequency power supply) and the case of etching the hard mask 1 001 are shown in Fig. 10(b). As shown in the figure, the side wall protective film 1 004 is adhered to the portion of the hard mask 1〇〇1, and the push-out shape 1 003 is obtained. In addition, as shown in FIG. 1A(c), a gap between the lower portion of the polysilicon gate layer 1002 and the HfSiON insulating film 307 is formed on the dense pattern side, and the underlying Hf SiON insulating film is formed. One of the 3 07 insulation was destroyed. Hereinafter, an example in which a 12-25-200849325 inch wafer having the sectional structure shown in Fig. 1(a) is etched using the plasma state detector 126 of the present invention and the IEDF control bias is used. The Si wafer trimming and etching process having the cross-sectional structure shown in Fig. 10(a) is provided in the etching apparatus of Fig. 1. The action of applying a bias voltage during the trimming or etching process will be described using FIG. Fig. 11 is a timing chart accompanying the processing operation of the plasma in the embodiment of Fig. 1. The distribution map is a time chart with the axis and time as the horizontal axis. Further, in the figure, the operation of the apparatus of Fig. 1 is based on the end point determination method of the present invention using the first embodiment and the first aspect, or the output waveform from the plasma device 123, and the luminous intensity of Fig. 11 is used. The vertical axis is shown in Fig. 11(b), which shows the mixing ratio of the bias power on the ON/OFF frequency side of the 2 frequency bias. The ME step of the BARC layer 312 is based on the 02/Ar gas system (CF4, CHF3, CH2F2, CH2C12, Cl2, HBr, and the whole gas flow rate is adjusted to 100 to 400 cc, the pressure is l〇Pa, and the pressure is 5 The in-plane distribution of the 12-inch wafer generated by the UHF power output of 00W to 800W is controlled by a plurality of electromagnets 104. After the plasma is ignited, as shown in Fig. 11 (b), the 400 kHz voltage supply unit 120 applies about 30 W~ 50W, fine-tuning resist 301 etched BARC layer 3 02 (ME treatment of BARC). At this time, the high frequency is not applied, and the mixing ratio of high-frequency bias is 〇%. By using the low frequency IEDF of 400 kHz, the low ion is also acceptable. In the wall portion, the equal-side fine adjustment can be effectively performed, and the high-frequency electrode 1 2 is used to perform the frequency mixing device to perform the longitudinal plasma processing. 2 The shape-emitting luminescence is performed in a relative state and the halogen is added to the cylinder. · 8 P a ~ pulp. At the same time as the low frequency of the current 値, 13. 56MHz easy to enter side Energy ion -26- 200849325 The edge of the line can be cut off (L E R : L i n e E d g e R 〇 u g h n e s s )' can reduce the effect. The amount of fine adjustment at this time can be appropriately controlled by the mixing ratio of the gas, or the pressure, the plasma power source (the output of the UHF power source 101), the temperature of the lower electrode, and the DE time. The end point of the ME treatment of BARC 1 101 is the use of the pole of the luminescence intensity of CN3 87 nm in the plasma. After the end of the ME treatment of the BARC was detected, the uranium engraving (OE) of the BARC was performed. In OE, in order to improve selectivity, the bias power is reduced by about 10W, and in addition, it is switched to 13. The high frequency bias of 56MHz, the low frequency bias 〇, sets the mixing ratio of the high frequency bias to 100% (BAC OE processing). Then, in the ME step of the hard mask 1〇〇1, a suitable gas is mixed among the gases of SF6, CF4, CHF3, CH2F2, 02, Ar, He, and the total gas flow rate is set to 100 to 400 cc, and the pressure is 〇. 4Pa~1. 5Pa, UHF output of 500 rpm to 800 W is used to generate plasma, and the lower electrode bias power is set to 80 W to 150 W for etching (hard mask 1 〇〇 ME treatment). The frequency of the bias power is used as the output of the frequency bias power supply unit having a wide energy range of IEDF having a high energy peak, and is used at a mixing ratio of 1%. The reason for this is that the re-dissociation of the reaction product is suppressed in the vicinity of the wafer even in the case of high power required for TEOS etching. By suppressing the re-dissociation, it is possible to process vertically (Fig. 10(d)) instead of having a push-out shape 1 003 as shown in Fig. 10(b) and a hard mask having a poorly-formed shape. When the low frequency bias voltage and high power are used, an ion impact is generated on the wafer at the same ground portion, and the removed reaction product containing the ground material adheres to the quartz surface, causing temporal changes in etching characteristics or generation of foreign matter. In the case of -27-200849325, it is possible to reduce the grounding sputtering by increasing the high frequency mixing ratio without excessive dissociation and maintaining the in-plane processing size. At the end point 1102 of the hard mask etch, switching to OE, in the OE step, switching to a high frequency of 100% for the purpose of improving the selectivity between the underlying polysilicon 矽1 002, and the processing time is set to be equivalent to the STI step (hard) Mask OE processing). Thereafter, the penetration (BT) step of the polycrystalline germanium 1 002 is started, and the plasma condition of the BT treatment of the polycrystalline germanium 1 002 is set as follows: the gas system uses a gas monomer such as Cl2, HBr, 02, Ar or He or a mixed gas thereof, The total flow rate is set to 200~300cc, and the pressure is 0. 4~0. 8Pa, UHF output is 500W~ 700W. The conditions of the IEDF control mechanism 127 are set to: 400 kHz low frequency bias mixed with 100% application (polysilicon 002 BT treatment). This is because the carbonaceous material and the oxidizing substance on the bottom surface of the pattern are removed by high-energy ions, and the sidewall protective film is easily removed by low-energy ions. In the etching treatment of the polycrystalline silicon 002, the processed shape greatly affects the device characteristics. Therefore, the end point determination is performed by the method of the present invention described in the first embodiment and the second embodiment. The ME system of polycrystalline 矽1 002 is used. IEDF (polycrystalline 矽1 002 ME treatment) with a high frequency ratio of 56 MHz. The end point 11 04 of the ME of the polysilicon 矽1〇〇2 is obtained by the method of the second embodiment to obtain the signal of the plasma state detector 126. After the detection of polycrystalline 矽1 〇 〇 2, the end of the E treatment, 〇 E treatment. The 〇 Ε processing is performed in the steps of Ο Ε 1 and Ο Ε 2 . In the step ε 1 , in order to achieve both the underlying selectivity and the etched shape (vertical workability, no skirt shape), it is preferably a low pressure condition. Under low-pressure conditions, the underlying selection is required. -28 - 200849325 The property usually needs to reduce the ion energy, but at a low frequency of 400 kHz, low-energy ions are present due to the low bias voltage, the ion directivity is further reduced, and the shape of the skirt is liable to remain. Therefore, in the OE1 step, the same process gas as the ME is used, 13. The high frequency bias of 56 MHz is 100% mixed IEDF (Olympus 1002 OE1 processing). The bias power is 10W to 50W (Vpp250V or less). Thereafter, the process proceeds to the OE2 step to remove the polysilicon caused by the difference in the STI step portion or the in-plane, the p/n gate difference, and the sparse shape difference. The plasma condition of the OE2 step is that the treatment gas is diluted with HBr/02 in Ar, the total flow rate is set to 200 to 400 cc, the pressure is 3 to 10 Pa, and the UHF output is 500 W to 700 W. Use a 20% low frequency bias to mix 80% of the high frequency biased 2 frequency mixing bias (poly 矽1 002 OE2 treatment). This is a reduction in the underlying selectivity and electron shading damage. That is, by reducing the ratio of the high ion energy which is nearly double the average ion energy, the bottom layer selectivity can be maintained, and the physical damage caused by the ion impact can be suppressed. In addition, the low-energy ions neutralize the electrons charged in the upper portion of the mask to avoid gaps caused by the shadow of the electrons. The above description of the sample of the multilayer film structure, when the material to be etched is changed, the signal of the plasma state detector 126, the illuminating beam splitter 123 or the film thickness interference monitor 124 is used as the IEDF control mechanism 127 when the stimuli are moved to the next step. Setting example. The figure shows that when the step is switched, the output voltage (Vpp) of the IEDF control power supply generates an overshoot that causes excess voltage to be applied to the material to be etched, without degrading the selectivity of the control device. Fig. 15 is a schematic view showing the configuration of the control device -29-200849325 of the plasma processing apparatus of the embodiment shown in Fig. 1. According to a predetermined etching processing condition, a plasma power source (UHF power source 101), a high-speed response pressure control mechanism 110, a high-speed response reactive gas introduction mechanism 1 1 1 output 时序 or a timing control device 125. Perform output voltage and timing control of the IEDF control unit 127. The IEDF control unit 127 sets the output of the X-th local frequency bias power supply unit 1 1 8 and the output of the low-frequency bias power supply unit 120 to the next step X '1. The stable point setting 値SPHx of the SVLx, or the high frequency matcher 119 of the Xth step, and the stable point setting 値SPLx of the low frequency matcher 121 are set in advance according to the signal of the control device 152. At this time, the transition setting 値SPLy of the transition point 値SPHy of the stable point of the high frequency matching unit 1 19 from the end of the X-1 number to the X number and the stable point of the low frequency matching unit 1 2 1 is also appropriately set, In this way, when moving to the Xth step, no excessive voltage is generated and the response is smooth. At this time, feedback control can be performed according to the MPHx, MPLx (injected power or reflected power from the load, matching state, etc.) in the transition, output transition setting 値SPHy and SPLy or power output 値SVHx and SVLx. . In addition, not only the signals of the high frequency matcher 119 and the low frequency matcher 121 but also the current, voltage, phase, and impedance signals of the plasma state detector 126 can be monitored for feedback control, and reference can also be made to the database 90 1 In the past. As described above, it is a mechanism and method for smoothing and monotonously changing the time in the shortest time for the next target point, but similar to the transient phenomenon control of the IEDF control unit 127, it is also possible to control the UHF power supply 110, high-speed response pressure. Mechanism 110, high-speed response reactive gas introduction mechanism 11 1 and temperature control -30-200849325 The mechanism 1 1 5 is similarly implemented. (Fifth Embodiment) Hereinafter, an embodiment of a processing method for forming a high-step differential three-dimensional FIN-FET of Fig. 12 using the plasma processing apparatus of Fig. 1 will be described. In the figure, (a) is a perspective view of the film structure before etching, (b) is a perspective view of the film structure after etching using this embodiment, and (c) is a longitudinal section cut by the line A-A' of the figure (a). Figure. 12(a) and (c), the film structure before etching having a high-step three-dimensional structure FIN-FET is formed by a SiO 2 layer 1203, a Si layer 1202, a TiN layer 1204, and a BARC layer formed on the Si substrate 3 09. 302 and resist 30 1 constitute. A FIN portion 1201 is formed over the SiO 2 layer 1 203, and a high-k insulating film 1 205 is formed over the SiO 2 layer 1 203 and the FIN portion 1201. 1 20 8 represents a portion of the boundary between the FIN portion 1201 and the gate. In the present embodiment, the uranium engraving is started by the film structure of Fig. 12 (a) with the resist 310 as a mask, and dry etching of the film structure of Fig. 12 (b) is obtained. In Fig. 12(b), 1205 is a high-k insulating film, and 1206 is a TiN gate formed by etching the TiN layer 1204. The Si layer 1 202 has a plurality of FIN portions 1201 extending on both sides of the TiN gate 1206 and extending therethrough. Fig. 12 (c) is a longitudinal sectional view showing the film structure of Fig. 12 (a) having the F IN portion 1 2 0 1 . In the wafer having the film structure of Fig. 12(a), the difference between the upper portion and the lower portion of the FIN portion 1201 is large, and the gate length portion having a large influence on the device characteristics is perpendicular, so that The IEDF control according to the first embodiment and the fourth embodiment, and the control of the transition phenomenon between the steps of the gas, the pressure, and the matching device - 31 - 200849325 and the electrode temperature and the magnetic flux of the reaction product or the etchant or the ion are also controlled. important. And the mechanism of the transition phenomenon of the etching process is preferably used in the UUP matcher 102, and the plasma injection power has no overshoot or undershoot, and has a monotonous increase of about 1 second or Monotonically decreasing performance stability. To achieve this performance, for example, by setting the most matching parameters of the ignition and stabilization points and the best function of the matching path. The time differential of the monotonically increasing response curve is always positive, and the time differential of the monotonically decreasing response curve is always negative. Further, when the transition phenomenon of the reaction product or the etchant is to be driven, it is preferably used in the high-speed response reactive gas introduction mechanism 1 1 1 , and when the new gas is added/reduced in the plasma discharge, the flow rate does not overflow. A mechanism for overshooting or undershooting, for example, a mechanism in which gas does not remain and continues to flow into the gas during waiting time. Further, in order to follow the fluctuation of the plasma pressure accompanying the change in the gas flow rate, it is preferable to have a high-speed response pressure control mechanism 1 1 可 which can stabilize the pressure for about 2 seconds. This function can be realized by setting the gas piping structure that does not cause a pressure difference as much as possible, or by optimizing the pressure control algorithm. Further, when the change in the in-plane distribution of the Si wafer to be reacted with the reaction product is driven, the lower electrode 1 1 3 preferably has a high-speed (1 ° C /sec or more) step-and-step temperature rise and fall. The inner, outer, or more portions have independently controllable functions. This function can be realized, for example, by providing a temperature control mechanism 115 for providing a heater, a temperature sensor, a He gas pressure control, and the like inside the lower electrode 1 1 3 . -32- 200849325

The timing chart of the etching process when the FIN-FET formed on the SOI (Silicon on Insulator) substrate is used in the plasma processing apparatus of Fig. 1 having the functional mechanism is shown in Fig. 13 and Fig. 13 (a) is taken as an example. The EPD of the luminous intensity is time-varying with a signal, and Fig. 13 (b) shows the temperature of the middle and lower electrodes, and Fig. 13 (c) shows the flow rate of the additive gas supplied to the etching chamber, and Fig. 13 (d) is etching. The pressure in the chamber 1 0 7 , Fig. 13 ( e ) is the UHF power introduced into the uranium engraving chamber 107 by the antenna 103, and Fig. 13 (f) is the bias distribution ratio of the frequency performed by the IEDF control unit 127. The temperature control means 1 for controlling the electrode temperature of the lower electrode 1 1 3 is initially set to start at 40 ° C as shown in Fig. 13 (b), and the inner peripheral portion 1 3 1 1 and the portion 1 3 1 2 are respectively started. According to the process of the fourth embodiment, the ME step of the BARC layer 302 is performed using 〇2/Cl2/Ar/CF4, and the time at which the pulverization intensity starts to decrease is moved to the BARC layer 301; In OE, it is necessary to upgrade and select between TiN layers 1 204 to perform ramp control to make C1 which is an etchant for TiN; and the time when the luminescence intensity is weakened is 1⁄0 1 or less, and monotonically decreasing ( ) is successively presented. In the conventional gas flow control waveform 1 304, only the switching control of the Cl2 gas-operated valve is performed, which is instantaneously reduced. Further, when the pressure in the plasma fluctuates by 1307, the brake valve of the Cl2 gas is instantaneously turned off, and after the rapid decrease, it takes about 5 seconds to return to the set pressure. On the other hand, in the present embodiment, by using the high-speed response back gas introduction mechanism 1 1 1 and the high-speed response pressure control mechanism 1 1 〇, the reduction of the matching product gradually reduces the amount of etching, and accordingly, the pressure is corrected. If the engraving of the majority of the gas in the processing of the gas is in the order of the electricity 匕 OE, 丨, in the 1303, the customary reaction and the reaction are made -33- 200849325 becomes a certain, and the pressure becomes a certain reason, It is known that the variation of the plasma injection power generated by the UHF matcher 1 3 09 or the variation of Vpp can suppress the shape abnormality. Further, the frequency of the IEDF control unit 127 in the OE of the BARC layer 302 is switched from a low frequency of 400 kHz to a high frequency of 13.56 MHz as in the first embodiment, and a bias output of 30 W to 50 W is used. After the OE process is performed only at the time when the FIN step difference of 1 207 is etched, the BT step of the TiN layer 1 204 is moved. At this time, the UHF wave output and the bias power setting switch 130 are turned OFF when the gas is switched. The electrode temperature 131 1 of the inner peripheral portion of the TiN etching was raised by 20 ° C for 1 sec. of the switching of the gas during the interruption of the discharge. This is a re-attachment of the reaction product which suppresses re-injection in the TiN etching. Further, the temperature 1312 of the outer peripheral portion of the lower electrode 1 1 3 can be adjusted to be 10 to 20 ° C lower in consideration of the difference in distribution of the reaction product due to the exhaust efficiency.

The TiN layer is composed of BT, ME, 0E1, and 0E2, and the BT and ME systems and the first embodiment are similarly applied to the end point determination method and the etching condition of the present invention. When the UHF matching device is used, when moving to the BT step S, Variations in plasma injection power during ignition will occur 1 3 08, but can be smoothly moved by UHF matcher 102 without overshoot or undershoot. This is because the UHF matcher 102 can appropriately select its matching path when it is ignited and stabilized to different matching parameters. In the BT step, when the BT process gas is introduced, the UHF power is applied as the low-frequency side bias, and when the end point of the BT step is detected, 343 〇i -34-200849325 'stops the supply of the BT process gas, and stops the UHF power and The supply of low frequency side power. In the ME step, the UHF power supply to the antenna is started while the ME process gas is supplied, and the bias power is set to the low frequency side and the high frequency side as i; In the ME step, the step 1414 is switched to the TiN OE1 step at the time when the impedance of the plasma state detector 126 begins to decrease. The purpose of the OE1 step is to integrate the etched amount caused by the step or the density, the in-plane difference, that is, the pattern that quickly reaches the underlying film and the pattern that does not reach the underlying film. Therefore, the pattern reaching the underlying film maintains selectivity with hi gh-k, and it is necessary to reduce the shape of the push-pull and the shape of the skirt without reaching the pattern portion of the underlying film, particularly the gate length portion in the vertical direction. . When the selectivity is to be increased, as shown in Fig. 13 (c), the F-type gas is added by controlling the amount of the reaction product which is successively decreased in a monotonous manner. When adding a gas, NF3, SF6, CF4, 02, N2, CH2C12 gas, etc. may be used in consideration of the underlying material and the gate material. When the gate/gate insulating film structure is surrounded by polysilicon/SiO 2 , oxygen or nitrogen has the same function. At this time, by the high-speed response reactive gas introduction mechanism 1 1 1 , the high-speed response pressure control mechanism 1 10 , and the UHF matcher 102, gas flow overflow 1 3 05, pressure fluctuation 1 3 06, and injection are not generated. The UHF wave changes by adding a gas to the change of 1 3 08 or Vpp. In OE1, the IEDF control unit 127 has a narrow energy distribution and a high frequency of 100% in order to improve the selectivity. Thus, there is no abnormality in the shape of the opening (sidewall etching, underlayer penetration). It is possible to reduce the difference in the shape of the denseness or the difference in the P/N gate. Further, in the present embodiment, by lowering the electrode temperature by 20 ° C at the same time as the end point of the ME of TiN 13 14 -35 - 200849325, the adsorption probability of the reaction product which is reduced is increased, and the deposit having selectivity is increased. The amount of adhesion. This is because the reaction product is less, the etchant ratio is increased, and the entry into the sidewall uranium can be suppressed. In addition, in the OE2, it is necessary to remove the TiN remaining in the FIN portion and the gate boundary portion 1208 because it is the gate length. High precision control is required. Therefore, the high frequency 13.56 MHz of the two-frequency bias 1313 is set to 80% Vpp, so that the IEDF of the full power supply output becomes an average of 50 V or less (100 Vpp or less). The reason is that high selectivity of the high-k material insulating film on the upper portion of the FIN is required. When the uranium gate 1 206 and the FIN portion 1201 are at the boundary 1 208, the low energy ions are cut off from the upper part of the boundary. The full output of the bias voltage is suppressed below 100Vpp, which can balance selectivity with uranium engraving. The bias current at this time is approximately 1 W/1 2 inches. Further, in order to secure the OE time, it is effective to increase the zigzag control waveform 13 16 in which the mixing ratio is increased toward the high selection side in conjunction with the height of the boundary portion where the OE 2 is gradually lowered. Further, the frequency mixing ratio of the above BARC etching and TiN uranium engraving needs to be appropriately adjusted depending on the pattern density or the FIN height (step height). In addition, the high frequency matching unit 19 and the low frequency matching unit 121 in the IEDF control unit 127 are also similar to the UHF matching unit 102, and it is preferable to have an engineer who appropriately sets a matching point with a plurality of matching points, thereby preventing Ion energy, or Vpp, or vibration of output power, or overshoot, undershoot. In addition, the ions can be smoothly moved to the etched ions to promote the reaction, so that the internal parameters of the plasma (radical species, density, ion density, and ion energy of the injection -36-200849325) can be rounded and slipped. The mode of monotonically decreasing or monotonically increasing the transfer is implemented by controlling the algorithms of each institution. The internal parameters of the plasma refer to the amount of the characteristics of the plasma. Among the quantities, the radical species, density, and ion density are determined by using the illuminating beam splitter 1 23 or a new density detecting probe. The feedback control is performed by the signal detection of the plasma state detector 126, or it is controlled in advance with the database to prepare a plurality of transition points (transition points). At this time, the setting of each step in the step transfer needs to be changed at the same time, so the control needs to be performed in a convergent manner. (Sixth Embodiment) An example in which a membrane structure other than a gate is formed in a μ wave-ECR plasma processing apparatus will be described below with reference to Fig. 14 . In this example, the case where the substrate 309 of Fig. 14 (a) forms a deep hole is described. In this case, the engraving step is performed by the etching steps of BARC 301, hard mask 1001, and 矽309, and the uranium engraving step of BARC layer 312 and hard mask 1001 is performed according to the method of the fourth embodiment. ME, OE process. Thereafter, a fluorine-containing gas or oxygen such as SF6, CF4, CHF3, CH2F2, SiCl4, or SiF4 is mixed, and a gas flow rate of 100 to 300 cc, a pressure of 44 Pa-1.5 Pa, and a state of a pulse output of 500 W to 800 W of the plasma generating mechanism. The plasma is generated, and the inner/outer difference of the electrode temperature is about 5 ° C to 2 (TC, the inner side is set to be higher and the Si layer is etched. Figure 1 4 (d) shows that 1 40 1 is a hard mask uranium engraving. In the present embodiment, the IEDF control unit 127 uses a 100% component of a high frequency 13·56 变 whose ion energy distribution is narrowed. This is a suppression of low-energy ion energy in the low-frequency IEDF. (〇) as shown -37- 200849325

A cavity 1402 of the Si layer. In addition, by integrating the energy distribution, it is also possible to suppress the increase of the facet angle of the resist, and the size of the deep hole is not enlarged, so that a hole which does not have a void as shown in Fig. 14(d) can be realized ( High precision machining of holes). In this way, timing control with deposition gases such as oxygen, SiCl4, and SiF4 can be performed to perform finer and higher aspect ratio processing. According to the above-described method and mechanism, stable etching can be realized in a gate-type CMOSFET having a multilayer structure including a step, a metal material, and a high-k material, and a gate structure such as a three-dimensional structure (FIN-FET). There are no abnormalities in shape (poor shape, notch, sidewall etching, underlying film damage, skirt shape, underlayer penetration, push-out shape, etc.). These mechanisms and embodiments are implemented in accordance with the semiconductor processing of the S i wafer, but may be applied to the plasma etching of plasma display, liquid crystal, MEMS manufacturing, etc., depending on the shape of the lower electrode 1 1 3 . BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view showing a plasma processing apparatus according to an embodiment of the present invention.

Figure 2 shows the IEDF 400 of 400kHz, 13.56ΜΗζ and 2 frequency mixing bias.

3 is a plan view type CMOS transistor having a multilayer structure, a cross-sectional view '(a) is before etching, and (b) is a conventional method of uranium engraving treatment' (c) for etching treatment using the present invention, The multilayer construction contains & poor, metallic materials and high-k materials. Fig. 4 is a timing chart of the electrical t-point judgment and the 2-frequency bias used in the processing of the wafer of the cross-sectional structure of Fig. 3 and the conventional end point judging method -38-200849325. 61 5 is a flowchart for determining the end point of the present invention. Fig. 6 is a diagram showing impedance and immitance directly above the wafer for endpoint determination, (a) is the present invention, and (b) is 1 frequency. Fig. 7 is a flow chart showing the stabilization and variation correction of the present invention. Fig. 8 is a graph showing the distribution of polysilicon rate and the ratio of polysilicon rate to the ratio of SiO2 rate and selectivity. (a) when the mixing ratio of low frequency to high frequency is 0%, and (b) is the mixture ratio of low frequency and high frequency. At 20%, (c) is a mixing ratio of low frequency to high frequency of 100%, and (d) is a mixture ratio of polysilicon rate to Si〇2 rate and selectivity. FIG. 9 is a mechanism diagram ‘implementing the flow of FIG. 7. Figure 10 is a schematic cross-sectional view of a hard mask sample, (a) before the etching process, (b) after the hard mask of the high frequency bias of the conventional method is etched, '(c) is the height of the conventional method After the frequency-biased gate uranium is engraved, (d) is the gate of most of the high-frequency bias of the present invention after etching. Fig. 11 is a timing chart showing the EPD and the 2 frequency bias used in the Si wafer processing of the cross-sectional structure of Fig. 10(a). Figure 12 is a bird's eye view and a cross-sectional view of a sample of a FIN-FET structure, (a) before gate etching, (b) after etching using the gate uranium of the present invention, and (c) after treatment using the present invention. A cross-sectional view of the sample of the FIN-FET structure taken along line A-A' of Fig. 12(a).

Figure 13 is a timing diagram used when processing a FIN-FET, (a) is the EPD waveform, (b) is the temperature of the lower electrode, (c) is the flow rate of the added gas ' (d) is the gas pressure, and (e) is the shot Into UHF power, (f) is the allocation ratio of -39- 200849325 IEDF control agency. Figure 14 is a cross-sectional shape pattern of the sample, (a) before the uranium engraving treatment, and (b) after the hard mask is used to inspect the sample using the present invention' (c) after processing the sample using the conventional technique uranium engraving The cross-sectional shape of the deep hole '(d) is the cross-sectional shape of the deep hole after the sample is etched using the present invention. Fig. 15 is a schematic view showing the configuration of a control device of the plasma processing apparatus of the embodiment shown in Fig. 1. [Main component symbol description] 101 : UHF power supply 102 : High-speed response UHF matcher with additional impedance detector 1 0 3 : Antenna 1 0 4 : Electromagnet 1 0 5 : Quartz plate 1 0 6 : Jet plate 1 0 7 :饨Engraving chamber 1 0 8 : Heater 1 0 9 : High vacuum assist 1 1 0 : High-speed response pressure control mechanism 1 1 1 : High-speed response reactive gas introduction mechanism 1 1 2 : Silicon wafer 1 1 3 : Lower electrode 1 1 4 : susceptor 1 1 5 : temperature control mechanism -40 - 200849325 1 1 6 : DC power supply 1 1 7 : bias application mechanism 1 1 8 : high-frequency bias power supply unit 1 1 9 : high-frequency matcher 120: Low-frequency bias power supply unit 1 2 1 : Low-frequency matcher 122 : Light-emitting light-receiving unit 123 : Light-emitting beam splitter 124 : Film thickness interference monitor 1 2 5 : Control device 126 : Plasma state detector 127 : IEDF control mechanism

201 : High frequency (13·56 ΜΗζ) IEDF 202 : Distribution width at high frequency 203 : Low frequency (400 kHz) V p p 2 0 0 V IE D F 204: Distribution width at low frequencies

205: Low frequency (400 kHz) VpplOOV mixed with high frequency (13·56 ΜΗζ) VpplOOV IEDF 3 0 1 : Resistor 3 02 : B ARC 3 0 3 : Intermediate layer mask 3 04 : Lower layer mask 3 0 5 : Gate Cap Layer 3 0 6 : Metal Gate Layer -41 - 200849325 3 07 : HfSiON Insulation Film 308 : STI 3 09 : 矽 Substrate 310 : STI Step Difference 3 1 1 : Active Part Gate Lower Part 312 : HfSiON Film The bottom layer runs through 3 1 3 : S TI step difference gate material residue 3 1 4 : hem pull down shape 3 15 : STI gate material residue 3 1 6 : The gate of the invention treatment 40 1 : BT end point (impedance change 402 moment: ME end point of TiN (time when impedance starts to change 40 3 : frequency of 2 times of TiN ME 4 4: Mix ratio of OE1 of TiN 2 frequency mixing ratio 40 5 : 2 frequency of OE2 of TiN Mixing ratio 406: conventionally based on the end point of the ME end point ME of the illuminating peak Ti TiN: BT of the TiN detected by the film thickness interference monitor: Output waveform 408: MEN 60 of the TiN detected by the film thickness interference monitor 1 : Impedance when the etched film is completely removed 6 0 3 : Matching path 604: Setting a majority of the impedance range 60 5 : Matching path through 604 606: Impedance before the end point of the change over time -42- 200849325 607: The impedance after the end of the time change is judged 8 0 1 : Polysilicon etch rate 802 : Si02 etching rate 8 03 : Selection of oxide film Sex (selection ratio) 804: Select line than 200 901: Database 1001: Hard mask 1 0 0 2: Polycrystalline 矽 gate layer 1 0 03 : There is a push-up shape: a hard mask with a poorly dense shape 1 004: Reaction product attached to the sidewall 1 0 5 ·· Notch 110 1: End point of B ARC 1 102 : End point of hard mask uranium engraving 1 103 : End point of BT step of polycrystalline germanium 1 1 04 : End point of ME step of polycrystalline germanium 1 1 05 : B ARC etching frequency mixing ratio 1 1 06 : 2 times mixing ratio of hard mask etching 1 1 〇7 : 2 frequency mixing ratio of polycrystalline uranium engraving 1 1 0 8 : polycrystalline germanium E etching Time 2 frequency mixing ratio 1201 : FIN part 1202 : 矽 layer 1 203 : SiO 2 layer 1204 : TiN layer 1 205 : High-k insulating film -43- 200849325 1 206 : TiN gate uranium engraved 1 207 : FIN step difference 1 208 : FIN part and gate 1 3 0 1 : luminous intensity reduction 1 3 02 : CN luminous intensity P 1 3 0 3: ramp control 1 3 04 : gas of conventional technology 1 3 0 5 : overflow of gas flow 1 3 0 6 : pressure change 1 3 07 : plasma of conventional technology 1 3 0 8 : plasma during ignition Injection 1309: Plasma injection power 1310: Luminous intensity is sufficient 13 11: Within TiN etching 13 12 : TiN etching outside 13 13: TiN ME Step: 13 14 : Ti luminous intensity starts 1 3 1 5: Fluorine-added gas flow in response to high-speed response response 1 3 1 6 : Ripple control waveform 1401: Hard mask uranium engraving 1402: Part of the boundary of the void pole S time reduction time flow control waveform (overshoot) The fluctuation of the pressure fluctuation in the power is increased. The temperature of the peripheral portion of the electrode is the temperature of the peripheral portion. The frequency of the frequency is reduced. The gas introduction mechanism is controlled to become a single groove-44-

Claims (1)

200849325 X. Patent application scope 1. A plasma processing method comprising: a mounting project, wherein a wafer having a film structure is placed on a lower electrode of a processing chamber inside a vacuum vessel, the membrane being constructed such that the surface is at a high- k material comprising a plurality of layers of a metal material and having a step structure; introducing a project to introduce an etching gas into the processing chamber; adjusting the process to adjust the processing pressure; generating a process to generate a plasma in the processing chamber; a supply process of supplying a bias power of a plurality of frequencies to form a bias potential on the wafer; and a plasma processor that performs a film structure of the wafer by varying a bias power output of the plurality of frequencies; The utility model has the following features: the plasma processing method further comprises: detecting a project, detecting a time change of the plasma state; determining a project, determining an end point of the plasma processing according to the detection result; and controlling the project, after determining the end point, by Changing the bias output of most buccal rates and their mixing ratio, and independently controlling the injection into the above crystal The ion energy and its distribution. 2. A plasma processing method comprising: -45 - 200849325 a mounting project, wherein a wafer having a film structure is placed on a lower electrode of a processing chamber inside a vacuum vessel, the membrane being constructed such that the surface is made of a high-k material a film comprising a plurality of layers of a metal material, having a step structure, introducing a project, introducing an etching gas into the processing chamber; adjusting a project to adjust a processing pressure; generating a project to generate a plasma in the processing chamber; and supplying the project And supplying a bias potential to a plurality of frequencies to form a bias potential on the wafer; and a plasma processor that performs the film structure by varying a bias power output of the plurality of frequencies; wherein: The slurry processing method further has: detecting the project, detecting the time change of the impedance of the plasma; separating the project, separating the time change of the detected impedance of the plasma into the impedance of the wall state component and the component directly above the wafer; Judging plasma treatment based on the separated wall state component or the impedance detection result of the component directly above the wafer The end point; and control engineering, after the endpoint is judged, the ion energy and its distribution injected into the wafer are independently controlled by varying the bias output of the majority of frequencies and their mixing ratios. 3. A plasma treatment method, equipped with a mounting project, in which a wafer having a film structure is placed on a lower electrode of a processing chamber inside a vacuum vessel -46-200849325, the membrane is constructed such that the surface is at high-k The material comprises a film of a plurality of layers of a metal material and has a step structure; an introduction process, an etching gas is introduced into the processing chamber; an adjustment process is performed to adjust a processing pressure; and a process is generated to generate a plasma in the processing chamber; and supply Engineering for supplying a bias potential to a plurality of frequencies to form a bias potential on the wafer; and a plasma processor for performing a film structure of the wafer by varying a bias power output of the plurality of frequencies; For the above plasma treatment method, there are: a detection project to detect the time change of the plasma state; and a control project, according to the time variation of the detected plasma state, by changing the bias output of most frequencies and their mixing The ion energy and its distribution incident on the wafer are independently controlled. 4. The plasma processing method according to claim 2, wherein the plasma processing method further comprises: a comparison engineering, after separating the separation of the wall state component from the impedance of the component directly above the wafer, separating the The data is compared with a database or a variation model; and the wall cleaning process is performed based on the comparison result, or the process of changing the wafer processing conditions of the second time. 5 · The plasma processing method of claim 2, wherein one of the above-mentioned plasma processing methods is to judge the end point of the plasma treatment, and all the bias voltages with respect to the high-frequency side bias power. The output ratio of power is set to 30% or more. 6. The plasma processing method according to item 2 of the patent application, wherein the method further comprises: in the excessive time of moving to the next uranium engraving step after the end point judgment, the electron temperature, the plasma density, the gas species, the ion energy and The ion energy distribution, their in-plane distribution on the wafer, exhibits a monotonically decreasing or monotonically increasing change. 7) A plasma processing apparatus comprising: a vacuum container; a lower electrode 'disposed in a processing chamber of the vacuum container, on which a wafer for plasma processing is placed; and a bias applying mechanism for supplying a bias of a plurality of frequencies Electric power generates a bias potential at the lower electrode; a gas supply mechanism introduces a reactive gas into the processing chamber; an adjustment mechanism adjusts a gas pressure in the processing chamber; and an electromagnetic wave supply mechanism generates a plasma in the processing chamber; The bias applying mechanism includes: a changing mechanism that independently changes an ion energy of the incident wafer and a distribution thereof by changing an output ratio of the bias power of the plurality of frequencies; and a detecting mechanism Detecting the current, voltage, phase, or impedance of the plasma to detect a plasma state relative to a bias frequency of a plurality of frequencies; and an endpoint determining mechanism for detecting a plasma state with respect to a bias frequency of a plurality of frequencies To determine the end of the plasma treatment. 8. The plasma processing apparatus according to claim 7, wherein the bias applying means -48 - 200849325 is a power supply unit that generates a plurality of frequencies by oscillation and the above-mentioned supply of the plurality of matching power supply units to the lower electrode It is composed of a matching unit corresponding to a plurality of frequencies, and has an impedance detector for a plurality of frequencies or a mechanism for detecting a current, a voltage, and a phase with respect to a plurality of frequencies. 9. The plasma processing apparatus according to claim 7, wherein the bias power of the plurality of frequencies applied by the bias applying means is set to 1 MHz, and the bias power of the high frequency side is set to 1 MHz, 1 〇〇 MH z In the following or below the frequency of the electromagnetic wave of the electromagnetic wave supply mechanism, the bias power on the low frequency side is set to 1 0 0 k Η z or more, and less than 4 M HE ζ ο 1 0 · The plasma processing apparatus according to item 7 of the patent application scope Further, there is provided a matching device that performs matching by selecting a matching path of a plurality of matching points for supplying power to the power supply unit of the electromagnetic wave supply unit. -49-