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SG11202006391WA - Verification-processing device, logic-generating device, and verification-processing method - Google Patents

Verification-processing device, logic-generating device, and verification-processing method

Info

Publication number
SG11202006391WA
SG11202006391WA SG11202006391WA SG11202006391WA SG11202006391WA SG 11202006391W A SG11202006391W A SG 11202006391WA SG 11202006391W A SG11202006391W A SG 11202006391WA SG 11202006391W A SG11202006391W A SG 11202006391WA SG 11202006391W A SG11202006391W A SG 11202006391WA
Authority
SG
Singapore
Prior art keywords
verification
processing
logic
processing method
generating device
Prior art date
Application number
SG11202006391WA
Inventor
Kenji Takao
Keita Hirayama
Noritaka Yanai
Original Assignee
Mitsubishi Heavy Ind Eng Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Heavy Ind Eng Ltd filed Critical Mitsubishi Heavy Ind Eng Ltd
Publication of SG11202006391WA publication Critical patent/SG11202006391WA/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
    • G01R31/52—Testing for short-circuits, leakage current or ground faults
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00—Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/02—Reliability analysis or reliability optimisation; Failure analysis, e.g. worst case scenario performance, failure mode and effects analysis [FMEA]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)
SG11202006391WA 2018-01-17 2019-01-17 Verification-processing device, logic-generating device, and verification-processing method SG11202006391WA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018005995A JP7038554B2 (en) 2018-01-17 2018-01-17 Verification processing device, logic generation device and verification processing method
PCT/JP2019/001247 WO2019142858A1 (en) 2018-01-17 2019-01-17 Verification-processing device, logic-generating device, and verification-processing method

Publications (1)

Publication Number Publication Date
SG11202006391WA true SG11202006391WA (en) 2020-08-28

Family

ID=67302297

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202006391WA SG11202006391WA (en) 2018-01-17 2019-01-17 Verification-processing device, logic-generating device, and verification-processing method

Country Status (4)

Country Link
US (1) US10990729B2 (en)
JP (1) JP7038554B2 (en)
SG (1) SG11202006391WA (en)
WO (1) WO2019142858A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7214440B2 (en) 2018-11-01 2023-01-30 三菱重工エンジニアリング株式会社 Verification processing device, verification processing method and program
JP7204609B2 (en) * 2019-07-30 2023-01-16 三菱重工エンジニアリング株式会社 VERIFICATION PROCESSING DEVICE, VERIFICATION METHOD AND PROGRAM

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2014640C3 (en) 1970-03-26 1981-04-02 Siemens AG, 1000 Berlin und 8000 München Device for the optimal adaptation of a numerically controlled machine tool to the machining process of a workpiece
JPS54649A (en) 1977-06-03 1979-01-06 Nippon Telegr & Teleph Corp <Ntt> Pattern recognizing system by holography
US5126956A (en) * 1982-03-11 1992-06-30 Fanuc Ltd Method and apparatus for displaying segments of a ladder diagram which turn on an operator specified relay
JPH0455776A (en) * 1990-06-25 1992-02-24 Nippon Telegr & Teleph Corp <Ntt> Trouble shooting device for logic integrated circuit
JP3306176B2 (en) * 1993-08-09 2002-07-24 富士通株式会社 Fault diagnosis device
US5777869A (en) * 1994-12-09 1998-07-07 The University Of Akron Relay ladder control system for simulation and monitoring
US5623401A (en) * 1995-08-16 1997-04-22 Allen-Bradley Company, Inc. Industrial controller with optimized execution of relay ladder logic programs
JP2002163020A (en) * 2000-11-27 2002-06-07 Matsushita Electric Works Ltd Method and device for detecting abnormality in programmable controller
US6904578B2 (en) 2002-11-13 2005-06-07 Fujitsu Limited System and method for verifying a plurality of states associated with a target circuit
US20060155393A1 (en) * 2005-01-10 2006-07-13 Emerson Process Management Power & Water Solutions, Inc. Method and system for converting ladder logic to boolean logic in a process control system
JP4055776B2 (en) 2005-01-26 2008-03-05 オンキヨー株式会社 Content distribution system, and peer and peer program used therefor
JP2008071135A (en) 2006-09-14 2008-03-27 Nec Corp Verification processor
US7907520B2 (en) * 2007-09-27 2011-03-15 Verizon Patent And Licensing Inc. Path testing and switching
JP5233355B2 (en) 2008-03-25 2013-07-10 日本電気株式会社 Property generation system and property verification system
JP5931760B2 (en) 2013-01-21 2016-06-08 三菱重工業株式会社 Train operation control inspection device, train operation control inspection method, and program
JP6139670B2 (en) 2013-04-26 2017-05-31 株式会社日立製作所 Control system inspection device
JP6292801B2 (en) * 2013-09-04 2018-03-14 株式会社豊田中央研究所 Power system

Also Published As

Publication number Publication date
WO2019142858A1 (en) 2019-07-25
JP7038554B2 (en) 2022-03-18
US10990729B2 (en) 2021-04-27
JP2019125208A (en) 2019-07-25
US20200387656A1 (en) 2020-12-10

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