KR20120042339A - A light emitting device - Google Patents

Abstract

PURPOSE: A light emitting device is provided to prevent a stripping phenomenon of an interface between a light emitting structure and a junction layer by forming a protective layer which is partially overlapped with a reflective layer. CONSTITUTION: A second electrode layer(105) comprises a support substrate(110), a junction layer(115), a reflective layer(120), and an ohmic layer(125). A current blocking layer(130) is formed between the ohmic layer and a second conductivity type semiconductor layer. A protective layer(135) is formed on the ohmic layer. A light emitting structure(140) is formed on the second electrode layer. The light emitting structure comprises a second conductivity type semiconductor layer(146), an active layer(144), and a first conductivity type semiconductor layer(142).

Description

Light emitting device

The present invention relates to a light emitting device, a method of manufacturing the same, and a light emitting device package.

Based on the development of gallium nitride (GaN) metal organic chemical vapor deposition method and molecular beam growth method, red, green, and blue light emitting diodes (LEDs) capable of high luminance and white light have been developed.

These LEDs do not contain environmentally harmful substances such as mercury (Hg) used in existing lighting equipment such as incandescent lamps and fluorescent lamps, so they have excellent eco-friendliness and have advantages such as long life and low power consumption. It is replacing. A key competitive factor of such LED devices is high brightness and high brightness by high efficiency and high power chip and packaging technology.

In order to realize high brightness, it is important to increase light extraction efficiency. Flip-chip structure, surface texturing, patterned sapphire substrate (PSS), photonic crystal technology, and anti-reflection to improve light extraction efficiency Various methods have been studied using the layer structure.

The embodiment provides a light emitting device capable of improving reliability and process yield.

The light emitting device according to the embodiment includes a first electrode layer, a protective layer on the first electrode layer, a second conductive semiconductor layer and an active layer on the first electrode layer, a first conductive semiconductor layer on the protective layer and the active layer, and the first layer. And a second electrode layer on the first conductive semiconductor layer, wherein an upper surface of the active layer is lower than an upper surface of the protective layer. The first electrode layer may include a support substrate, a reflective layer on the support substrate, a bonding layer between the support substrate and the reflective layer, and an ohmic layer on the reflective layer, wherein the protective layer may be formed on the ohmic layer.

The embodiment can improve the reliability and process yield of the light emitting device.

1 shows a light emitting device according to an embodiment.
2 shows a light emitting device according to another embodiment.
3 to 11 show a method of manufacturing a light emitting device according to the embodiment.
12 to 18 illustrate a method of manufacturing a light emitting device according to another embodiment.
19 illustrates a light emitting device package including a light emitting device according to an embodiment.
20A illustrates a display device including a light emitting device package according to an embodiment, and FIG. 20B is a cross-sectional view of a light source portion of the display device illustrated in FIG. 20A.
21 shows a lighting device including a light emitting device according to the embodiment.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other features and advantages of the present invention will become more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which: FIG. In the description of an embodiment, each layer, region, pattern or structure may be "under" or "under" the substrate, each layer, region, pad or pattern. In the case where it is described as being formed at, "up" and "under" include both "directly" or "indirectly" formed through another layer. do. In addition, the criteria for up / down or down / down each layer will be described with reference to the drawings.

In the drawings, dimensions are exaggerated, omitted, or schematically illustrated for convenience and clarity of illustration. In addition, the size of each component does not necessarily reflect the actual size. The same reference numerals denote the same elements throughout the description of the drawings. Hereinafter, a light emitting device, a method of manufacturing the same, and a light emitting device package according to embodiments will be described with reference to the accompanying drawings.

1 shows a light emitting device 100 according to an embodiment. The light emitting device 100 includes a second electrode layer 105, a current blocking layer 130, a protective layer 135, a light emitting structure 140, a passivation layer 150, and a first electrode 160.

The second electrode layer 105 includes a support substrate 110, a bonding layer 115, a reflective layer 120, and an ohmic layer 125, and includes an electrode pad (eg, a light emitting device package 700) shown in FIG. 19. And the second metal layer 714.

The support substrate 110 supports the light emitting structure 140 and supplies power to the light emitting structure 140 together with the first electrode 160.

The support substrate 110 is conductive, for example, copper (Cu), gold (Au), nickel (Ni), molybdenum (Mo), copper-tungsten (Cu-W), carrier wafers (eg, Si , Ge, GaAs, ZnO, SiC, SiGe).

The bonding layer 115 is formed on the support substrate 110. The bonding layer 115 is a bonding layer and is formed under the reflective layer 120. The bonding layer 115 is in contact with the reflective layer 120 and the ohmic layer 125 to allow the reflective layer 120 and the ohmic layer 125 to be bonded to the supporting substrate 110.

The bonding layer 115 is formed to bond the supporting substrate 110 in a bonding manner. Therefore, when the support substrate 110 is formed by plating or deposition, the bonding layer 115 is not necessarily formed, and thus the bonding layer 115 may be selectively formed. The bonding layer 115 may include a barrier metal or a bonding metal, and may include, for example, at least one of Ti, Au, Sn, Ni, Cr, Ga, In, Bi, Cu, Ag, or Ta.

The reflective layer 120 is formed on the bonding layer 115. The reflective layer 120 may reflect light incident from the light emitting structure 140, thereby improving light extraction efficiency. The reflective layer 120 may be formed of, for example, a metal or an alloy including at least one of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, and Hf. In addition, the reflective layer 120 may be formed in a multilayer using a metal or an alloy and a light-transmitting conductive material such as IZO, IZTO, IAZO, IGZO, IGTO, AZO, or ATO. For example, IZO / Ni, AZO / Ag, It can be laminated with IZO / Ag / Ni, AZO / Ag / Ni and the like.

The ohmic layer 125 is formed on the reflective layer 120. The ohmic layer 125 is in ohmic contact with the second conductive semiconductor layer 146 of the light emitting structure 140 so that power is smoothly supplied to the light emitting structure 140, and ITO, IZO, IZTO, IAZO, IGZO, IGTO, It may include at least one of AZO, ATO.

The ohmic layer 125 may selectively use a light transmissive conductive layer and a metal, and may include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAO), and IGZO (IG). indium gallium zinc oxide (IGTO), indium gallium tin oxide (IGTO), aluminum zinc oxide (AZO), antimony tin oxide (ATO), gallium zinc oxide (GZO), IrO _x , RuO _x , RuO _x / ITO, Ni, Ag, One or more of Ni / IrO _x / Au and Ni / IrO _x / Au / ITO can be used to implement a single layer or multiple layers.

The ohmic layer 125 is for smoothly injecting a carrier into the second conductivity type semiconductor layer 146 and is not necessarily formed. For example, instead of separately forming the ohmic layer 125, the material used as the reflective layer 120 may be selected as a material in ohmic contact with the second conductivity-type semiconductor layer 146 to make ohmic contact.

The current blocking layer 130 is formed between the ohmic layer 125 and the second conductive semiconductor layer 146. An upper surface of the current blocking layer 130 may contact the second conductive semiconductor layer 146, and a lower surface and a side surface of the current blocking layer 130 may contact the ohmic layer 125.

The current blocking layer 130 may be formed to overlap at least a portion of the first electrode 160, thereby alleviating a phenomenon in which current is concentrated at the shortest distance between the first electrode 160 and the support substrate 110. The luminous efficiency of the light emitting device 100 can be improved. For example, the width of the current blocking layer 130 may have a size of 0.9 to 1.3 times the width of the first electrode 160.

The current blocking layer 130 is formed using a material having a lower electrical conductivity than the reflective layer 120 or the ohmic layer 125, a material forming Schottky contact with the second conductive semiconductor layer 146, or an electrically insulating material. Can be. For example, the current blocking layer 145 may be formed of ZnO, SiO ₂ , SiON, It may include at least one of Si ₃ N ₄ , Al ₂ O _{3 ,} TiO ₂ , Ti, Al, Cr.

The current blocking layer 130 may be formed between the ohmic layer 125 and the second conductive semiconductor layer 146, or may be formed between the reflective layer 120 and the ohmic layer 125, but is not limited thereto. . In addition, the current blocking layer 130 is to allow the current to spread widely in the light emitting structure 140, the current blocking layer 130 is not necessarily formed.

The protective layer 135 is formed on the second electrode layer 105 at a predetermined distance k from the boundary line 118 between the unit chip regions A. The protective layer 135 may be spaced apart from the periphery of the light emitting structure 140 by a predetermined distance.

In FIG. 1, the protective layer 135 is formed on the ohmic layer 125. In this case, the protective layer 135 may partially overlap with the reflective layer 120. The protective layer 135 may reduce a phenomenon in which the interface between the light emitting structure 140 and the bonding layer 115 is peeled off, thereby reducing the reliability of the light emitting device 100.

The protective layer 135 may be a non-conductive protective layer formed of a non-conductive material. The non-conductive protective layer may be formed of a material having substantially non-conductivity with very low electrical conductivity. The non-conductive protective layer may be formed of a material having a lower electrical conductivity than the reflective layer 120 or the ohmic layer 125, a material forming Schottky contact with the second conductive semiconductor layer 146, or an electrically insulating material. . For example, the nonconductive protective layer may be formed of ZnO or SiO ₂ . The nonconductive protective layer increases the distance between the bonding layer 115 and the active layer 144.

In addition, the protective layer 135 may be made of a material having conductivity that makes Schottky contact with the side surface of the light emitting structure. The conductive protective layer may be formed of a transparent conductive oxide film or include at least one of Ti, Ni, Pt, Pd, Rh, Ir, and W. In this case, the transparent conductive oxide film may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), indium gallium zinc oxide (IGZO), or indium gallium tin oxide (IGTO). , Aluminum zinc oxide (AZO), antimony tin oxide (ATO), or gallium zinc oxide (GZO). Therefore, the protective layer 135 can suppress the occurrence of an electrical short between the bonding layer 115 and the active layer 144.

When the conductive protective layer and the non-conductive protective layer are subjected to isolation etching in order to separate the light emitting structure 140 into unit chips in the chip separation process, the fragments generated from the bonding layer 115 may be separated from the second conductive semiconductor layer 146. ) And the active layer 120 or between the active layer 120 and the first conductive semiconductor layer 142 to prevent electrical short circuits. Thus, the conductive protective layer is formed of a material that does not break or cause fragmentation during isolation etching.

The light emitting structure 140 is formed on the second electrode layer 105. The light emitting structure 140 may include a compound semiconductor layer of a plurality of Group 3 to 5 elements. The light emitting structure 140 may have a structure in which the second conductive semiconductor layer 146, the active layer 144, and the first conductive semiconductor layer 142 are sequentially stacked on the second electrode layer 105.

Side surfaces of the second conductive semiconductor layer 146 and side surfaces of the active layer 144 are sequentially stacked on the ohmic layer 125 to contact the inner surface 138 of the protective layer 135. At this time, the upper surface of the active layer 144 is lower than the upper surface of the protective layer 135. The first conductivity type semiconductor layer 142 is formed on the active layer 144 and the protective layer 135. The first conductivity-type semiconductor layer 142 is in contact with an upper surface of the protective layer 135 and near an upper edge of the inner surface 138. In this case, the portion of the first conductive semiconductor layer 142 contacting the upper surface of the protective layer 135 does not overlap the active layer 144 and the second conductive semiconductor layer 146 in the vertical direction. The vertical direction may be a direction from the second conductive semiconductor layer to the first conductive semiconductor layer.

The side surface of the first conductive semiconductor layer 142 of the light emitting structure 140 and the outer surface 139 of the protective layer 135 may be inclined surfaces in an isolation etching process divided into unit chips.

The second conductive semiconductor layer 146 is a compound semiconductor of Group III-V elements doped with a second conductive dopant, such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP and the like can be selected. When the second conductive semiconductor layer 146 is a P-type semiconductor layer, the second conductive dopant includes a P-type dopant such as Mg and Zn. The second conductive semiconductor layer 146 may be formed as a single layer or a multilayer, but is not limited thereto.

The active layer 144 may include any one of a single quantum well structure, a multiple quantum well structure (MQW), a quantum dot structure, or a quantum line structure. The active layer 144 may be formed of a well layer and a barrier layer, for example, an InGaN well layer / GaN barrier layer or an InGaN well layer / AlGaN barrier layer, using a compound semiconductor material of Group III-V elements.

A conductive clad layer may be formed between the active layer 144 and the first conductive semiconductor layer 142 or between the active layer 144 and the second conductive semiconductor layer 1146. The conductive clad layer may be formed of AlGaN. It may be formed of a system semiconductor. The active layer 144 is in this case formed of a quantum well structure, for example, having a compositional formula of _{In x Al y Ga 1 -x- y} N (0≤x≤1, 0≤y≤1, 0≤x + y≤1) _Have a single or quantum well structure having a well layer and a barrier layer having a compositional formula of In _a Al _b Ga _{1 -a- b} N ( _{0≤a≤1, 0≤b≤1, 0≤a} + b≤1) Can be. The well layer may be formed of a material having a lower band gap than the band gap of the barrier layer.

The first conductive semiconductor layer 142 is a compound semiconductor of Group III-V elements doped with a first conductive dopant, for example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP , GaAs, GaAsP, AlGaInP and the like. When the first conductive semiconductor layer 142 is an N-type semiconductor layer, the first conductive dopant includes an N-type dopant such as Si, Ge, Sn, Se, Te, or the like. The first conductive semiconductor layer 142 may be formed as a single layer or a multilayer, but is not limited thereto.

The light emitting structure layer 140 may form a third conductive semiconductor layer having a polarity opposite to that of the first conductive semiconductor layer under the second conductive semiconductor layer 142. For example, when the second conductive semiconductor layer is P type, the third conductive semiconductor layer may include an N type semiconductor layer. The first conductive semiconductor layer may be a P-type semiconductor layer and the second conductive semiconductor layer may be an N-type semiconductor layer.

The passivation layer 150 is formed on at least the side of the light emitting structure 140. For example, the passivation layer 150 may be formed on the side surface of the first conductive semiconductor layer 110 and the outer surface of the protective layer 140, but is not limited thereto.

The passivation layer 150 may be formed to electrically protect the light emitting structure 140, and for example, SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , to be formed of Al ₂ O ₃ But it is not limited thereto.

The roughness pattern 170 may be formed on the top surface of the first conductive semiconductor layer 142 to increase light extraction efficiency. The first electrode 160 is formed to contact the top surface of the light emitting structure layer 140. In FIG. 1, the roughness pattern 170 is formed on the first conductive semiconductor layer 142 under the first electrode 160. However, the present invention is not limited thereto and the first pattern 160 may be formed under the first electrode 160. The roughness pattern may not be formed in the conductive semiconductor layer 142.

In the light emitting device 100 according to the embodiment, the protective layer 135 formed on the second electrode layer 105 is spaced a predetermined distance from the boundary line between the unit chips so that the active layer 144 has a chip scribing line. By keeping it away from the chip, it is possible to prevent damage to the active layer 144 due to chip isolation for chip isolation or chip separation, thereby improving reliability and process yield of the light emitting device. Here, the boundary line between the unit chips may be a chip scribing line which is a boundary line dividing the unit chips in the chip division process.

2 shows a light emitting device 200 according to another embodiment. Referring to FIG. 2, the light emitting device 200 includes a second electrode layer 205, a protection layer 230, a light emitting structure 240, a passivation layer 250, and a first electrode 260. The light emitting device 200 illustrated in FIG. 2 is in the form of a bonding layer 215, a reflective layer 220, an ohmic layer 225, and a protective layer 235 as compared with the light emitting device 100 illustrated in FIG. 1. Is different. The rest is the same as described above. This may be a structure of a light emitting device when simultaneously forming the protective layer 235 and the current blocking layer 230 as shown in FIGS. 12 to 19 to be described later.

The bonding layer 215 and the ohmic layer 225 are inclined from the center region overlapping with the second conductivity-type semiconductor layer 246 and the active layer 244, the edge region having a step with the center region, and the inclined region from the center region to the edge region. Side surface area. The protective layer 235 is formed on the edge region and the side region. That is, the protective layer 235 may be interposed between the edge region and the light emitting structure 240 and between the side region and the light emitting structure 240.

The manufacturing method of the light emitting element which concerns on an Example is demonstrated. However, the content overlapping with the above description will be omitted or briefly described.

3 to 11 show a method of manufacturing a light emitting device according to the embodiment.

As shown in FIG. 3, the light emitting structure 140 is formed on the growth substrate 310. The growth substrate 310 may be formed of at least one of sapphire (Al ₂ O ₃ ), SiC, GaAs, GaN, ZnO, Si, GaP, InP, Ge, but is not limited thereto.

The light emitting structure 140 may be formed by sequentially growing the first conductive semiconductor layer 142, the active layer 144, and the second conductive semiconductor layer 146 on the growth substrate 310.

For example, the light emitting structure 140 may include metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma chemical vapor deposition (PECVD), and molecular beam growth. It may be formed using a method such as Molecular Beam Epitaxy (MBE), Hydride Vapor Phase Epitaxy (HVPE), but is not limited thereto.

Meanwhile, a buffer layer and / or an undoped nitride layer (not shown) may be formed between the light emitting structure 140 and the growth substrate 310 to alleviate the lattice constant difference.

Next, as shown in FIG. 4, both edge regions of the light emitting structure 140 of the unit chip region are mesa-etched to expose the first conductivity-type semiconductor layer 142 of both edge regions of the unit chip region. At this time, the light emitting structure 140 may be mesa etched so that both sides are inclined. Hereinafter, the mesa etched region is called a first region D, and the unetched portion is called a second region B. FIG.

Next, as shown in FIG. 5, a protective material layer 512 is formed on the first region D. Referring to FIG. For example, the protective material layer 512 is formed in the first region D, and the upper surface of the protective material layer 512 may be coplanar with the upper surface of the second conductive semiconductor layer 146. In this case, the protective material layer 512 may be a SiO ₂ layer.

Next, as shown in FIG. 6, the current blocking layer 130 is formed on one region of the second conductivity-type semiconductor layer 146 in the second region B. Referring to FIG. The current blocking layer 130 may be formed using a mask pattern. For example, after forming the SiO ₂ layer on the second conductive semiconductor layer 146, the current blocking layer 130 may be formed by performing an etching process using a mask pattern.

Next, as shown in FIG. 7, the ohmic layer 125 is formed on the second conductive semiconductor layer 146 and the current blocking layer 130, and the reflective layer 120 is formed on the ohmic layer 125. Form. In this case, an area in which the ohmic layer 125 and the reflective layer 120 are formed may be variously selected.

For example, the ohmic layer 125 and the reflective layer 120 may be formed by any one of electron beam (E-beam) deposition, sputtering, and plasma enhanced chemical vapor deposition (PECVD).

The support substrate 110 is formed on the reflective layer 120 and the ohmic layer 125 via the bonding layer 115. The bonding layer 115 may be in contact with the reflective layer 120 and the ohmic layer 125 so that the support substrate 110 may enhance the adhesion between the reflective layer 120 and the ohmic layer 150.

The support substrate 110 is attached on the bonding layer 115. Although the embodiment illustrates that the support substrate 110 is bonded by the bonding layer 115, the support substrate 110 may be formed by a plating method or a deposition method.

Next, as shown in FIG. 8, the growth substrate 310 is removed from the light emitting structure 140. In FIG. 8, the structure illustrated in FIG. 7 is shown upside down.

The growth substrate 310 may be removed by a laser lift off method or a chemical lift off method. As the growth substrate 310 is removed, the first conductive semiconductor layer 142 may be removed. Is exposed.

Next, as shown in FIG. 9, the first conductive semiconductor layer 142 and the protective material layers 512 and 514 disposed in the edge region of the unit chip region are etched to divide the light emitting structure 140 into the unit chip region. Isolation etching is performed. For example, the isolation etching may be performed by a dry etching method such as inductively coupled plasma (ICP).

The ohmic layer 125 positioned in the edge region of the unit chip region is exposed by the isolation etching, and the light emitting structure 140 may be separated into a plurality of light emitting structures (eg, 140-1 and 140-2). In this case, each of the separated light emitting structures (eg, 140-1 and 140-2) corresponds to a unit chip. In addition to the ohmic layer 125 positioned in the edge region of the unit chip region, the reflective layer 120 may be exposed by isolation etching.

Next, as shown in FIG. 10, the top surface of the first conductivity-type semiconductor layer 412 is exposed through passivation layer deposition and selective etching, and the side surfaces of the first conductivity-type semiconductor layer 412 and the protective material layer ( The outer surfaces of 512 and 514 form a covering passivation layer 150. In the exemplary embodiment, since the protective material layers 512 and 514 cover the active layer 144, electrical insulation of the light emitting structure 140 may be performed, and thus the formation of the passivation layer may be omitted.

Next, as shown in FIG. 11, a roughness pattern 170 is formed on the exposed upper surface of the first conductive semiconductor layer 412 to improve light extraction efficiency, and the first pattern is formed on the roughness pattern 170. An electrode 160 is formed. The roughness pattern 170 may be formed by a wet etching process or a dry etching process.

In addition, a plurality of light emitting devices may be obtained by dividing the structure illustrated in FIG. 11 into a unit chip region along a laser scribing line which is a chip boundary line through a chip separation process.

For example, the chip separation process may include a breaking process of separating a chip by applying a physical force using a blade, a laser scribing process of separating a chip by irradiating a laser to a laser scribing line, and an etching process. It may include, but is not limited to this.

12 to 19 show a method of manufacturing a light emitting device according to another embodiment. However, contents overlapping with the contents described above with reference to FIGS. 3 to 3 will be omitted or briefly described.

As shown in FIG. 12, the process described with reference to FIGS. 3 and 4 is performed to form a mesa-etched light emitting structure 240 on the growth substrate 310. In addition, a protective material layer 612 is formed on the first region D, and a current blocking layer 230 is formed on one region of the second conductive semiconductor layer 246 of the second region B. .

For example, a protective material layer may be formed on the growth substrate 310 on which the mesa-etched light emitting structure 240 is formed, and the current blocking layer may be formed by photolithography and etching processes. A portion of the protective material layer 612 is etched away, and the remaining protective material layer on the first conductive semiconductor layer 242 is removed.

Unlike FIG. 5, the protective material layer 612 shown in FIG. 6 does not completely fill the first region D, and the upper surface of the protective material layer 612 is the top of the second conductive semiconductor layer 246. Faces and planes are different. In addition, the thickness of the protective material layer 612 and the thickness of the current blocking layer 230 may be the same.

Next, as shown in FIG. 13, an ohmic layer 225 is formed on the protective material layer 612, the current blocking layer 230, and the exposed first conductive semiconductor layer 242. In this case, the ohmic layer 225 formed on the first conductive semiconductor layer 242 has a step with the ohmic layer formed on the first region D. FIG.

Next, as shown in FIG. 14, the reflective layer 220 is formed on the ohmic layer 225 to overlap with the first conductivity-type semiconductor layer 242. In this case, an area in which the ohmic layer 225 and the reflective layer 220 are formed may be variously selected.

The bonding layer 225 is formed on the reflective layer 220 and the ohmic layer 225, and the supporting substrate 210 is formed on the bonding layer 225. Unlike FIG. 7, a portion of the bonding layer 225 formed on the first region D overlaps at least the second conductivity type semiconductor layer 246 in the horizontal direction. In an exemplary embodiment, the bonding layer 225 formed on the first region D may overlap the second conductivity-type semiconductor layer 246 and the active layer 244 in the horizontal direction. .

Next, as shown in FIG. 15, the growth substrate 310 is removed from the light emitting structure 240. In FIG. 15, the structure illustrated in FIG. 14 is shown upside down.

Next, as shown in FIG. 16, the first conductive semiconductor layer 242, the protective material layer 612, and the bonding layer 225 positioned at the boundary of the unit chip region A are etched to form a light emitting structure ( Isolation etching is performed to divide 240 into unit chip regions.

A portion of the bonding layer 225 on the first region D remaining after the isolation etching overlaps at least the second conductive semiconductor layer 246 in a horizontal direction, or the second conductive semiconductor layer 246 and the active layer 244. ) May overlap in the horizontal direction. The remaining protective material layer after isolation etching forms a protective layer 235.

Next, as shown in FIG. 17, the top surface of the first conductive semiconductor layer 242 is exposed, the side surface of the first conductive semiconductor layer 242, the outer surface of the protective layer 235, and the first surface of the first conductive semiconductor layer 242. The passivation layer 250 is formed to cover the bonding layer 225 of the region D.

Next, as shown in FIG. 18, the roughness pattern 270 is formed on the top surface of the first conductivity-type semiconductor layer 242, and the first electrode 260 is formed on the roughness pattern 270.

19 illustrates a light emitting device package including a light emitting device according to an embodiment. 19, the light emitting device package 700 according to the embodiment may include a package body 710, a first metal layer 712, a second metal layer 714, a light emitting device 720, a reflector 725, and a wire ( 730, and an encapsulation layer 740.

The package body 710 has a structure in which a cavity is formed in one region. At this time, the side wall of the cavity may be formed to be inclined. The package body 710 may be formed of a substrate having good insulation or thermal conductivity, such as a silicon-based wafer level package, a silicon substrate, silicon carbide (SiC), aluminum nitride (AlN), or the like. It may have a structure in which a plurality of substrates are stacked. Embodiment is not limited to the material, structure, and shape of the body described above.

The first metal layer 712 and the second metal layer 714 are disposed on the surface 710 of the package body 710 to be electrically separated from each other in consideration of heat dissipation or mounting of a light emitting device. The light emitting device 720 is electrically connected to the first metal layer 712 and the second metal layer 714. In this case, the light emitting device 720 may be the light emitting device 100 or 200 illustrated in FIG. 1 or 2.

For example, the second electrode layer 105 of the light emitting device illustrated in FIG. 1 is electrically connected to the second metal layer 714, the first electrode 160 is bonded to one side of the wire 730, and the wire 730 The other side of may be bonded to the first metal layer 712.

The reflector plate 725 is formed on the sidewall of the cavity of the package body 710 to direct light emitted from the light emitting device 100 or 200 in a predetermined direction. The reflector plate 725 is made of a light reflective material, and may be, for example, a metal coating or a metal flake.

The encapsulation layer 740 surrounds the light emitting device 720 positioned in the cavity of the package body 710 to protect the light emitting device 720 from the external environment. The encapsulation layer 740 is made of a colorless transparent polymer resin material such as epoxy or silicon. The encapsulation layer 740 may include a phosphor to change the wavelength of light emitted from the light emitting device 720. The light emitting device package may include at least one of the light emitting devices of the embodiments disclosed above, but is not limited thereto.

A plurality of light emitting device packages according to the embodiment may be arranged on a substrate, and a light guide plate, a prism sheet, a diffusion sheet, or the like, which is an optical member, may be disposed on an optical path of the light emitting device package. The light emitting device package, the substrate, and the optical member may function as a backlight unit.

Another embodiment may be implemented as a display device, an indicator device, or a lighting system including the light emitting device or the light emitting device package described in the above embodiments, and for example, the lighting system may include a lamp or a street lamp.

20A illustrates a display device including a light emitting device package according to an embodiment, and FIG. 20B is a cross-sectional view of a light source portion of the display device illustrated in FIG. 20A.

20A and 20B, the display device includes a backlight unit, a liquid crystal display panel 860, a top cover 870, and a fixing member 850.

The backlight unit includes a bottom cover 810, a light emitting module 880 provided at one side of the bottom cover 810, a reflecting plate 820 disposed at the front of the bottom cover 810, and a reflecting plate ( The light guide plate 830 is disposed in front of the light guide module 880 to guide the light emitted from the light emitting module 880 to the front of the display device, and the optical member 840 is disposed in front of the light guide plate 30. The liquid crystal display 860 is disposed in front of the optical member 840, the top cover 870 is provided in front of the liquid crystal display panel 860, and the fixing member 850 is provided with the bottom cover 810 and the top cover. Disposed between 870 to fix bottom cover 810 and top cover 870 together.

The light guide plate 830 serves to guide the light emitted from the light emitting module 880 to be emitted in the form of a surface light source, and the reflective plate 820 disposed behind the light guide plate 830 may emit light emitted from the light emitting module 880. The light guide plate 830 is reflected in the direction to increase the light efficiency. However, the reflective plate 820 may be provided as a separate component as shown in the figure, or may be provided in the form of a high reflectivity coating on the back of the light guide plate 830, or the front of the bottom cover 810. . Here, the reflection plate 820 can be made of a material having a high reflectance and can be used in an ultra-thin shape, and polyethylene terephthalate (PET) can be used.

The light guide plate 830 scatters the light emitted from the light emitting module 880 so that the light is uniformly distributed over the entire screen of the liquid crystal display. Accordingly, the light guide plate 830 is made of a material having good refractive index and high transmittance, and may be formed of polymethyl methacrylate (PMMA), polycarbonate (PC), polyethylene (PE), or the like.

In addition, an optical member 840 is provided on the light guide plate 830 to diffuse light emitted from the light guide plate 830 at a predetermined angle. The optical member 840 uniformly radiates the light guided by the light guide plate 830 toward the liquid crystal display panel 860.

As the optical member 840, an optical sheet such as a diffusion sheet, a prism sheet, or a protective sheet may be selectively laminated, or a micro lens array may be used. In this case, a plurality of optical sheets may be used, and the optical sheets may be made of a transparent resin such as acrylic resin, polyurethane resin, or silicone resin. The fluorescent sheet may be included in the above-described prism sheet as described above.

The liquid crystal display panel 860 may be provided on the front surface of the optical member 840. Here, it is obvious that other types of display devices requiring a light source besides the liquid crystal display panel 860 may be provided.

The reflective plate 820 is placed on the bottom cover 810, and the light guide plate 830 is placed on the reflective plate 820. Thus, the reflector plate 820 may be in direct contact with the heat radiation member (not shown). The light emitting module 880 includes a light emitting device package 882 and a printed circuit board 881. The light emitting device package 882 is mounted on the printed circuit board 881. The light emitting device package 881 may be the embodiment shown in FIG. 19.

The printed circuit board 881 may be bonded on the bracket 812. Here, the bracket 812 is made of a material having high thermal conductivity for heat dissipation in addition to the fixing of the light emitting device package 882, and although not shown, a thermal pad is provided between the bracket 812 and the light emitting device package 882. To facilitate heat transfer. In addition, the bracket 812 is provided as a 'b' type as shown, the horizontal portion 812a is supported by the bottom cover 810, the vertical portion 812b is fixed to the printed circuit board 881 can do.

21 shows a lighting device including a light emitting device according to the embodiment. Referring to FIG. 21, the lighting device 900 includes a power coupling unit 910, a heat sink 920, a light emitting module 930, a reflector 940, and a cover cap 950. ), And the lens unit 960.

The power coupling unit 910 has a screw shape in which an upper end is inserted into an external power socket (not shown), and is inserted into an external power socket to supply power to the light emitting module 930. The heat dissipation plate 920 emits heat generated from the light emitting module 930 to the outside through the heat dissipation pins formed at the side surfaces. The upper end of the heat dissipation plate 920 is screwed with the lower end of the power coupling unit 910.

A light emitting module 940 including light emitting device packages mounted on a circuit board is fixed to a bottom surface of the heat dissipation plate 920. In this case, the light emitting device packages may be light emitting device packages according to any one of the embodiments shown in FIGS. 1 and 2.

The lighting device 900 may further include an insulating sheet 932 and a reflective sheet 934 for electrically protecting the light emitting module under the light emitting module 930. In addition, an optical member that performs various optical functions may be disposed on the path of the light radiated by the light emitting module 940.

The reflector 940 is combined with the lower end of the heat dissipation plate 920 in the shape of a truncated cone and reflects light emitted from the light emitting module 930. The cover cap 950 has a circular ring shape and is coupled to the bottom of the reflector 940. The lens unit 960 is fitted to the cover cap 950. The lighting device 900 illustrated in FIG. 21 may be embedded in a ceiling or a wall of a building and used as a downlight.

Features, structures, effects, and the like described in the above embodiments are included in at least one embodiment of the present invention, and are not necessarily limited to only one embodiment. Furthermore, the features, structures, effects, and the like illustrated in each embodiment may be combined or modified with respect to other embodiments by those skilled in the art to which the embodiments belong. Therefore, it should be understood that the present invention is not limited to these combinations and modifications.

110: substrate, 115: bonding layer
120: reflective layer 125: ohmic layer
130: current blocking layer 135: protective layer
140: light emitting structure 150: passivation layer
160: first electrode 170: roughness pattern

Claims (10)

A second electrode layer;
A protective layer on the second electrode layer;
A light emitting structure including a second conductive semiconductor layer and an active layer on the second electrode layer, and a first conductive semiconductor layer on the protective layer and the active layer; And
A first electrode layer on the first conductivity type semiconductor layer,
The upper surface of the active layer is lower than the upper surface of the protective layer. The method of claim 1, wherein the second electrode layer,
Support substrates;
A reflective layer on the support substrate;
A bonding layer between the support substrate and the reflective layer;
An ohmic layer on the reflective layer,
The protective layer may be formed,
The light emitting device is formed on the ohmic layer. The method of claim 1,
A side surface of the second conductive semiconductor layer and the active layer is in contact with the inner surface of the protective layer. The method of claim 1, wherein the light emitting device,
And a passivation layer covering an outer surface of the protective layer and a side surface of the first conductive semiconductor layer. The method of claim 1, wherein the protective layer,
Light emitting device that is a non-conductive material. The method of claim 2, wherein the ohmic layer,
A center region overlapping the second conductive semiconductor layer and the active layer, an edge region having a step with the center region, and a side region inclined upwardly from the center region to the edge region,
The protective layer may be formed,
The light emitting device is formed on the edge region and the side region. The method of claim 1, wherein the first conductivity type semiconductor layer,
A light emitting device in contact with an upper surface of the protective layer, a portion of an inner surface of the protective layer, and the active layer. The method of claim 7, wherein
The portion of the first conductivity type semiconductor layer in contact with the upper surface of the protective layer does not overlap the active layer and the second conductivity type semiconductor layer. The method of claim 1,
The upper surface of the first conductive semiconductor layer is a light emitting element is formed a roughness pattern. The method of claim 1, wherein the protective layer,
A light emitting device partially overlapping the reflective layer.

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