KR19990017530A - AC plasma display device and panel driving method - Google Patents

Abstract

The present invention provides a three-electrode surface discharge plasma display panel in which a plurality of first and second sustain electrode pairs are divided and driven by? Blocks each by? [Alpha] first common sustain electrodes connecting the? First sustain electrodes having the same order in each block in parallel; Β second common sustain electrodes connecting in parallel the α second sustain electrodes included in each block; A first scan driver including α output terminals connected in a one-to-one correspondence with the α first common sustain electrodes to repeatedly supply the first scan pulse to the α first common sustain electrodes sequentially β times; ; A second scan pulse sequentially synchronized with the first scan pulse to the β second common sustain electrodes by having β output terminals connected in one-to-one correspondence with the β second common sustain electrodes An AC plasma display device and a panel driving method comprising: a second scan driver configured to supply each of the plurality of sustain electrodes to sequentially scan the pair of first and second sustain electrode pairs together with the first scan driver; In the present invention, since the plurality of first and second sustain electrodes are commonly driven in common, the number of driving ICs provided in the system to supply driving pulses to the first and second sustain electrodes is larger than that of the related art. This reduces the manufacturing cost significantly.

Description

AC plasma display device and panel driving method

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an alternating current plasma display device and a method for driving the panel, and more particularly, to an alternating current plasma display device for displaying an image on a three-electrode surface discharge plasma display panel (hereinafter referred to as a three-electrode surface discharge PDP) and a panel driving method thereof. It is about.

As the modern society is called an information society, the importance of display increases with the development and spread of information processing system, and its types are gradually diversifying.

CRT (Cathode Ray Tube), which has been the most used display for a long time, has various problems such as large size, high operating voltage, and distortion of display. Recently, research and development of various flat displays having a matrix structure have been actively progressed since they are not suitable.

Among the flat panel displays, PDP (Plasma Display Panel) is in the spotlight as the next generation large screen flat panel display. The PDP has a large screen and a thin film, and has been applied to wall-mounted televisions, home theater displays, workstation monitors, and the like.

FIG. 1 is a simplified diagram of an AC plasma display device including a three-electrode surface discharge PDP, which is one of the most used PDPs, to display a moving image or a still image on the three-electrode surface discharge PDP screen. The configuration is shown.

In Fig. Reference numeral 10 is a shift in parallel to each other, one of the holding arrangement 480 to the first electrode (Y ₁ ~Y ₄₈₀₎ and 480 of second sustain electrodes (X ₁ ~X ₄₈₀₎ and the first holding electrode in the first (Y _{1 to} Y ₄₈₀ ) and the second storage electrodes (X ₁ to X ₄₈₀ ) with 640 × 480 resolution with ₁₉₂₀ address electrodes A _{1 to} A ₁₉₂₀ arranged to be orthogonal with a predetermined space therebetween. The color 3-electrode surface discharge PDP is shown.

In the above, a cell is formed at each intersection of the 480 first and second sustain electrodes Y _{1 to} Y ₄₈₀ and X _{1 to} X ₄₈₀ and the 1920 address electrodes A _{1 to} A ₁₉₂₀ to form a three-electrode surface discharge PDP ( 10) The screen consists of 1920 × 480 R (Red), G (Green), and B (Blue) cells in a matrix form.

The configuration of each cell of the three-electrode surface discharge PDP 10 will be described by taking the cells of the i-th row and the j-th column shown in FIG. 2 as an example.

First, the i-th first storage electrode Y _i and the i-th second storage electrode X _i parallel to each other are formed on one surface of the front substrate 11, which is a display surface of an image, and the first storage electrode ( A dielectric layer 12 is formed on Y _i ) and the second sustain electrode X _i to limit the discharge current during discharge and facilitate the generation of wall charges, and sputtering occurs upon discharge on the dielectric layer 12. A magnesium oxide (MgO) protective film 13 is formed to protect the first sustain electrode Y _i , the second sustain electrode X _i , and the dielectric layer 12.

Further, the j-th address electrode A _j is formed on the opposite surface to the front substrate 11 among the back substrates 14 arranged in parallel with the front substrate 11 at a predetermined distance therebetween, and the front substrate First and second barrier ribs 15a and 15b are arranged between the 11 and the rear substrate 14 to prevent inter-cell mixing and to secure a discharge space. The first and second barrier ribs are arranged on the address electrode A _j and the first and second barrier ribs. Phosphor 16 is applied to a part of 15a and 15b, and a discharge gas is injected into the discharge space.

The basic driving principle of each cell of the three-electrode surface discharge PDP 10 configured as described above is to generate an address discharge between the first sustain electrode Y _i and the address electrode A _j so that wall charges are generated therein. Sustain discharge is generated between the first sustain electrode (Y _i ) and the second sustain electrode (X _i ) to bring the discharge gas into a plasma state to generate ultraviolet rays, and the ultraviolet rays excite the phosphor 16 to generate visible light. Allow an image to be displayed.

Figure reference numeral 20-1 is the first sustain electrode 480 (Y ₁ ~Y ₄₈₀₎ and provided to the output terminal 480 is connected to the one-to-one correspondence to the first drive in the first sustain electrode (Y ₁ ~Y ₄₈₀₎ pulse denotes a Y driver for supplying, 30 are driven in the second sustain electrode 480 of the second sustain electrode 480 provided with a single output terminal which is connected to the (X ₁ ~X ₄₈₀₎ one-to-one correspondence with (X ₁ ~X ₄₈₀₎ It represents an X driver for supplying the pulse, 40 is 1920 pieces of address electrodes (a ₁ ~A ₁₉₂₀₎ and supplies a drive pulse to the address electrodes (a ₁ ~A ₁₉₂₀₎ and having an output terminal 1920 coupled to a one-to-one basis The digital image signal is output by digitalizing an analog image signal IMAGE that is externally input, and the digital image signal and various external inputs-a clock CLK, a horizontal synchronization signal HS, and a vertical line are shown in FIG. Sync signal-depending on It generates a variety of driving pulses to the control signal represents a control unit for supply to the Y driver 20 and the X driver 30 and the address driver 40.

The Y driver 20 and the X driver 30 are each configured as a driving IC (Integrated Circuit) for supplying driving pulses to the electrodes according to the control signal of the controller 50. In this case, when the driving IC having 60 output pins is used, the Y driving unit 20 and the X driving unit 30 each require 480 output terminals, and thus each includes eight driving ICs.

On the other hand, the gray scale implementation of each cell of the three-electrode surface discharge PDP 10 configured as described above is implemented through the number of discharges per unit time because the intensity of the discharge is difficult to adjust, and each frame When the number of discharges of a cell is divided into 0 to 2 ^X -1 discharges, the brightness of each cell changes according to the number of discharges during one frame, resulting in a 2 ^X gradation image on the entire screen, that is, 0 to 2 ^X -1 levels for each cell. One level of image is displayed.

One of the gradation implementation methods based on the above concept is the ADS subfield method (Addressing and Display System sub-field method), wherein the ADS subfield method has two types of cells: on and off of each cell. Using a binary X bit system based on operating in a state and implementing 2 ^X gradations, one frame is divided and driven into X subfields having different discharge counts (i.e., discharge sustain periods).

3 is a detailed block diagram of one frame when implementing 256 (2 ⁸ ) gray scale according to the ADS subfield method according to the prior art.

First, one frame is divided and driven into eight subfields SF1 to SF8 to implement 256 gray levels, and each subfield SF1 to SF8 is divided into a reset period, an address period, and a sustain period. Driven.

In the reset period of each of the subfields SF1 to SF8, a voltage having a voltage higher than the discharge start voltage is written between the ₄₈₀ first sustain electrodes Y _{1 to} Y ₄₈₀ and the 480 second sustain electrodes X _{1 to} X ₄₈₀ . A wall pulse is generated inside the entire cell by applying a writing pulse, and then discharge starts between the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ . An erase pulse having a voltage lower than the voltage and having the same polarity as the wall charge just generated is applied to erase the internal unnecessary wall charge of each cell.

In the address period of each of the subfields SF1 to SF8, addressing of the digital image signal corresponding to each cell is sequentially performed. That is, a first scan pulse and a second scan pulse are simultaneously applied to any of the first and second sustain electrode pairs to scan the first and second sustain electrode pairs, and the first and second sustain electrode pairs are scanned. A write pulse (image pulse, image pulse) is applied only to an address electrode corresponding to a cell to be turned on among 1920 cells configured to generate an address discharge in the cell to which the write pulse is applied. This process is repeated for ₄₈₀ first and second sustain electrode pairs (Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ ) in sequence 480 times. , On or off.

The write pulse applied to the address electrodes A _{1 to} A ₁₉₂₀ during the address period of each subfield SF1 to SF8 is an 8-bit digital image signal (least significant bit B ₁ to most significant bit B) corresponding to each cell. ₈ ) corresponds to one bit value, more specifically, B ₁ during the address period of the first subfield SF1, B ₂ during the address period of the second subfield SF2,. The eighth sub-address period B ₈ for the field (SF8) is applied, respectively.

In the sustain period of each of the subfields SF1 to SF8, the voltage between the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ is lower than the discharge initiation voltage and immediately before. A sustain pulse having the same polarity as the wall charge generated in the address period is applied to display the cell turned on in the immediately previous address period, and then the first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X are displayed. A sustain pulse, which is alternately alternated between _{1 and} X ₄₈₀ ), is applied to maintain the display of the cells turned on in the address period.

The number of sustain pulses applied to the above during the sustain period of each subfield (SF1~SF8) the entire first sustain electrodes (Y ₁ ~Y ₄₈₀₎ and the second sustain electrodes (X ₁ ~X ₄₈₀₎ is usually SF1: SF2: SF3: SF4: SF5: SF6: SF7: SF8 = 1: 2: 4: 8: 16: 32: 64: 128 is set to enable 256 gray scale implementation.

In addition, the driving pulses are generated by the controller 50 and applied to the corresponding electrodes through the Y driver 20, the X driver 30, and the address driver 40, respectively, and the timing is also controlled by the controller 50. Controlled.

As a result, when the first to eighth subfield SF1 to SF8 screens are sequentially configured through the above-described detailed process, 256 grayscale images of one frame are displayed on the three-electrode surface discharge PDP 10.

On the other hand, the AC plasma display device according to the related art independently drives a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP, so that the Y driver supplies a driving pulse to the first and second sustain electrodes. The X driver is composed of a large number of driver ICs.

However, since high-frequency drive ICs with a breakdown voltage of 200 V or more are usually used in an AC system, as the number of drive ICs increases in the system configuration (such as high resolution), the manufacturing cost of the entire AC plasma display device increases and is currently widely used. Compared to the CRT, there was a problem in that it was difficult to be commercialized.

In order to solve the above problems, the present invention significantly reduces the manufacturing cost by using a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP in common, thereby using fewer drive ICs than the prior art. An object of the present invention is to provide an AC plasma display device and a method for driving the panel.

1 is a block diagram showing a simplified configuration of an AC plasma display device according to the prior art;

FIG. 2 is a cross-sectional view of one cell of the three-electrode surface discharge plasma display panel shown in FIG. 1, except that the front substrate is rotated by 90 °;

3 is a detailed configuration diagram of one frame when implementing 256 gray scales according to the prior art ADS subfield method;

4 is a block diagram showing a simplified configuration of an AC plasma display device according to an embodiment of the present invention;

5 is a diagram illustrating an example of a driving voltage waveform capable of turning on an arbitrary cell according to the panel driving method according to an embodiment of the present invention;

6A, 6B, and 6C are diagrams showing examples of driving voltage waveforms in which an arbitrary cell cannot be turned on in accordance with a panel driving method according to an embodiment of the present invention.

Explanation of symbols for main parts of the drawings

110: 3-electrode surface discharge plasma display panel

Y _{1 to} Y ₄₈₀ : First sustain electrode X _{1 to} X ₄₈₀ : Second sustain electrode

Y _{C1 to} Y _C60 : first common sustain electrode X _{C1 to} X _C8 : second common sustain electrode

120: Y drive unit 130: X drive unit

140: address driver 150: controller

In order to achieve the above object, in the AC plasma display device according to the present invention, a plurality of first and second sustain electrodes are alternately formed one by one, and the plurality of first and second sustain electrode pairs are each of? A three-electrode surface discharge plasma display panel divided into blocks; [Alpha] first common sustain electrodes connecting the? First sustain electrodes having the same order in each block in parallel; Β second common sustain electrodes connecting in parallel the α second sustain electrodes included in each block; A first scan driver including α output terminals connected in a one-to-one correspondence with the α first common sustain electrodes to repeatedly supply the first scan pulse to the α first common sustain electrodes sequentially β times; ; A second scan pulse sequentially synchronized with the first scan pulse to the β second common sustain electrodes by having β output terminals connected in one-to-one correspondence with the β second common sustain electrodes And a second scan driver configured to supply each of the sustain electrodes for each of the sustain electrodes and sequentially scan the pair of first and second sustain electrode pairs together with the first scan driver.

In addition, in the panel driving method of the AC plasma display device according to the present invention, a plurality of first and second storage electrodes are alternately arranged one by one, and the plurality of first and second storage electrode pairs are arranged in β blocks, each of α. A three-electrode surface discharge plasma display panel that is driven in a divided manner,? First common sustain electrodes that connect? First sustain electrodes having the same order in each block in parallel, and? Count included in each block A method of driving a panel of an AC plasma display device having β second common sustain electrodes connecting the second sustain electrodes in parallel, wherein the first scan pulses are sequentially supplied to the? First common sustain electrodes. Repeating β times and simultaneously applying the second scan pulse synchronized with the first scan pulse to the β second common sustain electrodes It is characterized in that it successively scanned one by one pairs of said plurality of first and second sustain electrode pairs is supplied by one α, respectively.

Hereinafter, with reference to the accompanying drawings an embodiment of the present invention will be described in more detail.

4 is a simplified block diagram of an AC plasma display device according to an embodiment of the present invention.

Figure reference numeral 110 is a shift in parallel to each other, one of the holding arrangement 480 to the first electrode (Y ₁ ~Y ₄₈₀₎ and second sustain electrodes (X ₁ ~X ₄₈₀₎ and, the first and second sustain electrode 4 (Y ₁ to Y ₄₈₀ , X _{1 to} X ₄₈₀ ) and 1920 address electrodes A _{1 to} A ₁₉₂₀ arranged to be orthogonal with a predetermined space therebetween, the entire screen is 1920 × 480 R in matrix form, A color three-electrode surface discharge PDP with 640x480 resolution consisting of G and B cells is shown.

The 480 first storage electrodes and the second storage electrode pairs (Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ ) are divided into eight blocks of 60 blocks, which are identical in each block, unlike the prior art. Eight first sustain electrodes having turn numbers are connected in parallel by 60 first common sustain electrodes Y _{C1 to} Y _C60 , and the 60 second sustain electrodes included in each block are eight second common. The storage electrodes X _{C1 to} X _C8 are connected in parallel with each other.

The first and second sustain electrodes connected in parallel by the first common sustain electrodes Y _C1 to Y _C60 and the second common sustain electrodes X _C1 to X _C8 , respectively, are specifically shown in Table 1 below. same.

First common sustain electrode First sustain electrodes connected in series Y _C1 Y ₁ , Y ₆₁ , Y ₁₂₁ , Y ₁₈₁ , Y ₂₄₁ , Y ₃₀₁ , Y ₃₆₁ , Y ₄₂₁ Y _C2 Y ₂ , Y ₆₂ , Y ₁₂₂ , Y ₁₈₂ , Y ₂₄₂ , Y ₃₀₂ , Y ₃₆₂ , Y ₄₂₂ Y _C3 Y ₃ , Y ₆₃ , Y ₁₂₃ , Y ₁₈₃ , Y ₂₄₃ , Y ₃₀₃ , Y ₃₆₃ , Y ₄₂₃ : : Y _C59 Y ₅₉ , Y ₁₁₉ , Y ₁₇₉ , Y ₂₃₉ , Y ₂₉₉ , Y ₃₅₉ , Y ₄₁₉ , Y ₄₇₉ Y _C60 Y ₆₀ , Y ₁₂₀ , Y ₁₈₀ , Y ₂₄₀ , Y ₃₀₀ , Y ₃₆₀ , Y ₄₂₀ , Y ₄₈₀ Second common sustain electrode Second sustain electrodes connected in series X _C1 X ₁ to X ₆₀ X _C2 X ₆₁ -X ₁₂₀ X _C3 X ₁₂₁ -X ₁₈₀ : : X _C7 X ₃₆₁ -X ₄₂₀ X _C8 X ₄₂₁ -X ₄₈₀

In addition, the configuration of each cell of the three-electrode surface discharge PDP 110 is the same as that of each cell of the conventional three-electrode surface discharge PDP shown in FIG. 2.

In Figure 4 by the reference number 120 of 60 the first common sustain electrode (Y _C1 ~Y _C60) and the first common sustain electrode provided with 60 output terminals connected to one-to-one (Y _C1 ~Y _C60) A Y driver for supplying drive pulses to the ₄₈₀ first sustain electrodes Y _{1 to} Y _{480 is} shown.

130 has eight second common sustain electrodes (X _C1 ~X _C8) and to said second common sustain electrodes (X _C1 ~X _C8) 480 of the second holding through 8 having an output terminal connected to the one-to-one An X driver for supplying a drive pulse to the electrodes X _{1 to} X ₄₈₀ ,

140 denotes an address driver for supplying a drive pulse to the address electrodes (A ₁ ~A ₁₉₂₀₎ and having an output terminal 1920 connected to the 1920 address electrodes (A ₁ ~A ₁₉₂₀₎ and one-to-one basis,

The digital signal outputs a digital image signal by digitizing an analog image signal IMAGE that is externally input, and the digital image signal and various external inputs-a clock CLK, a horizontal synchronization signal HS, and a vertical synchronization signal VS. The control unit generates various driving pulses and control signals and supplies them to the Y driver 120, the X driver 130, and the address driver 140.

In the above, the Y driver 120 and the X driver 130 are each composed of a driving IC as in the prior art, and each output terminal corresponds to the output pin of the driving IC, so that the driving IC has 60 output pins as in the prior art. When using the Y driver 120 and the X driver 130 are all composed of one drive IC corresponding to 1/8 of the prior art.

When the AC plasma display device according to the embodiment of the present invention configured as described above displays 256 grayscale images on the three-electrode surface discharge PDP 110 according to the panel driving method according to the embodiment of the present invention, As follows.

First, in order to implement 256 gray levels, one frame is divided into eight subfields, and each subfield is divided into a reset period, an address period, and a sustain period.

In the reset period of each subfield, as described in the related art, the Y driving unit 120 and the X driving unit 130 may include 60 first common sustain electrodes Y _{C1 to} Y _C60 and 8 second common sustain electrodes ( full through X ~X _{C1 C8)} first holding electrodes (Y ₁ ~Y ₄₈₀₎ and the second sustain electrodes (X ₁ ~X ₄₈₀₎ by applying a pulse sseoneotgi between the inner wall charges generated in the all-cell After the sixty first common sustain electrodes Y _{C1 to} Y _C60 and eight second common sustain electrodes X _{C1 to} X _C8 , the entire first sustain electrodes Y ₁ to Y ₄₈₀ and An erase pulse is applied between the second sustain electrodes X ₁ to X ₄₈₀ to erase the internal unnecessary wall charge of each cell.

In the address period of each subfield, the Y driver 120, the X driver 130, and the address driver 140 sequentially perform addressing of the digital image signal corresponding to each cell.

That is, in the address period of each subfield, the Y driver 120 repeatedly applies the first scan pulse to the sixty first common sustain electrodes Y _{C1 to} Y _C60 eight times, and at the same time, X The driving unit 130 sequentially applies 60 second scan pulses synchronized with the first scan pulse to eight second common sustain electrodes X _{C1 to} X _C8 for each of the second common sustain electrodes, respectively. The first and second storage electrode pairs Y ₁ X ₁ , Y ₂ X ₂ ,..., Y ₄₈₀ X ₄₈₀ are sequentially scanned one by one.

For example, when the first scan pulse and the second scan pulse are simultaneously applied to the first common sustain electrode Y _C1 and the second common sustain electrode X _C1 , the first scan pulse and the second scan pulse are generated. Only the first and second storage electrode pairs Y ₁ X ₁ , which are both applied, are scanned, and the remaining first and second storage electrode pairs Y ₂ X _{2 to} Y ₄₈₀ X ₄₈₀ are not scanned.

That is, the first and second sustain electrodes 61, 121, 181, 241, 301, 361, and 421, to which only the first scan pulse is applied through the first common sustain electrode Y _C1 , are applied. Pair (Y ₆₁ X ₆₁ , Y ₁₂₁ X ₁₂₁ , Y ₁₈₁ X ₁₈₁ , Y ₂₄₁ X ₂₄₁ , Y ₃₀₁ X ₃₀₁ , Y ₃₆₁ X ₃₆₁ , Y ₄₂₁ X ₄₂₁ ) or the first common sustain electrode (X _C1) No. 2 to 60 first and second sustain electrode pairs (Y ₂ X _{2 to} Y ₆₀ X ₆₀ ) to which only the second scan pulse is applied, or none of the first and second scan pulses are applied. The first and second sustain electrode pairs are not scanned.

More specifically, in the same principle as described above, the first scan pulse is sequentially applied to the first common sustain electrodes Y _{C1 to} Y _{C60 from} Nos. 1 to 60 and simultaneously to the second common sustain electrode X _C1 . When 60 second scan pulses synchronized with the first scan pulse are continuously applied, the first and second sustain electrode pairs Y ₁ X _{1 to} Y ₆₀ X ₆₀ are sequentially scanned one by one. .

Thereafter, the first scan pulses are sequentially applied to the first common sustain electrodes Y _{C1 to} Y _{C60 from} Nos. 1 to 60, and the second scan sustain electrodes X _C2 are synchronized with the first scan pulses to No. 2. When sixty second scanned pulses are applied successively, the first and second sustain electrode pairs Y ₆₁ X _{61 to} Y ₁₂₀ X ₁₂₀ Nos. _{61 to 120} are sequentially scanned one by one.

Repeating the above process with respect to the second common sustain electrodes X _{C3 to} X _C8 3 to 8 results in 480 first and second sustain electrode pairs Y ₁ X ₁ , Y ₂ X ₂ ,. , Y ₄₈₀ X ₄₈₀ ) are sequentially scanned one by one.

In addition, the address driver 140 receives a write pulse resulting from one bit value of an 8-bit digital image signal of 1920 cells constituted by the first and second sustain electrode pairs that are currently scanned as in the prior art. It is selectively applied to electrodes A ₁ -A ₁₉₂₀ to cause address discharge to occur inside the cell to which the write pulse is applied.

In the sustain period of each subfield, as in the prior art, the Y driving unit 120 and the X driving unit 130 have 60 first common sustain electrodes Y _{C1 to} Y _C60 and 8 second common sustain electrodes X _C1 to X _C8 periodically supplies an alternating sustain pulse between the entire first sustain electrodes Y ₁ to Y ₄₈₀ and the second sustain electrodes X ₁ to X ₄₈₀ so that the cell turned on in the immediately preceding address period is Keep it marked.

5 shows an example of a driving voltage waveform that can turn on any cell, and FIGS. 6A, 6B and 6C show examples of a driving voltage waveform that cannot turn on any cell.

First, the Y driver 120 and the X driver 130 receive the first sustain pulse and the second sustain pulse from the controller 150, and the sixty first common sustain electrodes Y _{C1 to} Y _C60 and eight second The first sustain pulse is supplied to the ₄₈₀ first sustain electrodes Y _{1 to} Y 480 through the common sustain electrodes X _{C1 to} X _C8 , and the second sustain pulse is supplied to the second sustain electrodes X _{1 to} X ₄₈₀ , respectively. In addition, the address driver 140 applies a Va ′ voltage to the ₁₉₂₀ address electrodes A _{1 to} A ₁₉₂₀ .

The first sustain pulse is a three-step pulse in which the pulse voltage changes from the steps of V1 + Vh → V1 + Vm → V1 → V1 + Vm → V1 + Vh, and the second sustain pulse is synchronized with the first sustain pulse. The pulse voltage is a three-step pulse that changes from 0 → Vm → Vh → Vm → 0 (Vh = 2Vm).

In the above state, in the address period of each subfield, the Y driver 120 and the X driver 130 maintain the first sustain pulse at the voltage V1 and the second sustain pulse at the voltage Vh, respectively, as shown in FIG. 5. Any first and second common sustain electrodes (e.g., Y _C1 and X _C1 ) by adding a first scan pulse of 0V to the first sustain pulse and a second scan pulse of voltage V1 to the second sustain pulse, respectively, When supplied to, the pair of first and second sustain electrodes Y ₁ X _{1 to which} the first scan pulse and the second scan pulse are simultaneously supplied are scanned, and at the same time, the address driver 140 performs the address electrodes A _By selectively supplying an address pulse of Va (VaVa'0) voltage to _{1 to} A ₁₉₂₀ , a cell located at the intersection of the scanned first and second sustain electrode pairs Y ₁ X ₁ and the address electrode supplied with the address pulse. Is on.

At this time, the cell located at the intersection of the address electrode supplied with the 0V voltage and the scanned first and second sustain electrode pairs instead of the address pulse of Va voltage is turned off.

Meanwhile, as shown in FIG. 6A, when the first scan pulse is supplied through the first common sustain electrode Y _C1 but the second scan pulse is not supplied (for example, Y ₆₁ and X ₆₁ ), 6B, when the second scan pulse is supplied through the first common sustain electrode X _C1 but the first scan pulse is not supplied (for example, Y ₂ and X ₂ ), As shown in FIG. 6C, when neither the first scan pulse nor the second scan pulse is supplied (for example, Y ₆₂ and X ₆₂ ), the first and second sustain electrode pairs are not scanned, and thus the address of the Va voltage is not provided. The cell is turned off regardless of whether a pulse is applied.

In addition, the present invention is not limited to the above-described embodiment, but may be applied in various embodiments without departing from the gist of the present invention.

As described above, the present invention drives a plurality of first and second sustain electrodes formed on the three-electrode surface discharge PDP, so that the driving IC is provided in the system to supply a driving pulse to the first and second sustain electrodes. Since the number of is greatly reduced than the prior art there is an effect that the manufacturing cost is greatly reduced.

Claims (2)

A three-electrode surface discharge plasma display panel in which a plurality of first and second storage electrodes are alternately arranged one by one, and the plurality of first and second storage electrode pairs are separately driven by? Blocks by? [Alpha] first common sustain electrodes connecting the? First sustain electrodes having the same order in each block in parallel; Β second common sustain electrodes connecting in parallel the α second sustain electrodes included in each block; A first scan driver including α output terminals connected in a one-to-one correspondence with the α first common sustain electrodes to repeatedly supply the first scan pulse to the α first common sustain electrodes sequentially β times; ; A second scan pulse sequentially synchronized with the first scan pulse to the β second common sustain electrodes by having β output terminals connected in one-to-one correspondence with the β second common sustain electrodes And a second scan driver configured to supply each of the plurality of sustain electrodes to sequentially scan the pair of first and second pairs of storage electrodes together with the first scan driver. A three-electrode surface discharge plasma display panel in which a plurality of first and second sustain electrodes are alternately arranged one by one, and the plurality of first and second sustain electrode pairs are divided and driven by? Blocks by? Α first common sustain electrodes that connect the β first sustain electrodes having the same sequence number in parallel, and β second common connect each of the α second sustain electrodes included in each block in parallel A method of driving a panel of an AC plasma display device having a sustain electrode, wherein the first scan pulse is sequentially supplied to the? First common sustain electrodes β? At the same time and the? The plurality of first and second pairs of storage electrodes are supplied by supplying α scan pulses synchronized with a first scan pulse for each of the second common sustain electrodes, respectively. Panel driving method of the AC plasma display device, characterized in that the sequential scanning in each pair.