KR100835404B1 - Liquid Crystal Display With Selection Pad And Method For Manufacturing Thereof - Google Patents

Abstract

The present invention relates to a mobile liquid crystal display device having a selection pad.

Disclosed is an array substrate on which a first pad group and a second pad group are mounted and electrically connected with the driver integrated circuit device, and a circuit device for driving the driver integrated circuit device. And a printed circuit board having a third pad group connected thereto. The printed circuit board is attached to the array substrate such that the first pad group and the third pad group contact each other.

Description

Liquid crystal display device having a selection pad and a method for manufacturing the same {Liquid Crystal Display With Selection Pad And Method For Manufacturing Thereof}

1 is a diagram illustrating a FOG pad structure formed on an array substrate of a liquid crystal display for a mobile device according to the related art;

FIG. 2 is a diagram illustrating a module of a liquid crystal display device for a mobile device having an FPCB and an array substrate on which a panel is formed in a conventional development stage.

3 is a view showing a module of a mobile liquid crystal display device having an FPCB and an array substrate on which a panel is formed in a conventional mass production step;

4 is a diagram illustrating a FOG pad structure formed on an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention;

FIG. 5 illustrates a module of the liquid crystal display of FIG. 4 including an array substrate and an FPCB having a panel formed at a development stage; FIG.

FIG. 6 illustrates a module of the liquid crystal display of FIG. 4 including an array substrate on which a panel is formed and an FPCB in a mass production stage.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a method for manufacturing the same, and more particularly, to a liquid crystal display device for a mobile device having a selection pad and a method for manufacturing the same.

In general, a liquid crystal display device includes pixels arranged in a matrix structure between a plurality of data lines driven by a source driver and a plurality of gate lines driven by a gate driver, and correspond to video data while the gate lines are activated. It refers to a device that emits a pixel by applying an analog driving voltage to a liquid crystal cell on the pixel.

Such liquid crystal display devices are being differentiated into mobile liquid crystal display devices that are increasingly low-powered and miniaturized as they are installed in portable multimedia devices, such as portable telephones, digital cameras, PDAs, etc., which are rapidly expanding in recent years.

1 is a diagram illustrating a FOG pad structure formed on an array substrate of a conventional liquid crystal display for mobile devices. Referring to FIG. 1, a plurality of flexible printed circuit board on glass (FOG) pads 20 formed on a conventional array substrate 10 are bumps of the driver IC 40 with metal wires 30 (not shown). Is electrically connected). Align marks 50 are formed in the lateral direction of the FOG pads 20 positioned at both ends of the plurality of FOG pads 20, respectively.

FIG. 2 is a diagram illustrating a module of a liquid crystal display for a mobile device having an array substrate and an FPCB in which a panel is formed in a conventional development stage, and FIG. 3 is a liquid crystal for mobile having an array substrate and an FPCB in which a panel is formed in a conventional mass production stage. It is a figure which shows the module of a display apparatus. 2 and 3, the flexible printed circuit board (FPCB) 60 coupled with the array substrate 10 in the conventional development stage undergoes a process that is minimized in the mass production stage.

However, in the group of FOG pads 20 formed on the array substrate 10 of the conventional mobile liquid crystal display device, after the function verification of the driver IC 40, the part of the FPCB 60 related to the test data and the signal for the interface (mass production) It is difficult to minimize the FPCB 60 by reducing unnecessary parts in the step.

That is, when masking the FOG pad 20 again in order to minimize the FPCB 60 in the development stage to the FPCB 60 in the mass production stage, the mask cost is doubled. In addition, when minimizing the FPCB 60 without masking again, the same as when the FPCB 60 area in contact with the FOG pad 20 in the development stage is not minimized, so the manufacturing cost does not decrease even if the FPCB 60 is minimized. There is a problem.

This is because the manufacturing cost of the FPCB 60 is determined not by the total area of the FPCB 60 but by the size of the input raw materials. Figure 3 shows that the area of a portion of the conventional FPCB is reduced, but the size of the input raw material is A x B shows the same size as the FPCB used in the mass production step.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to form a FOG pad on an array substrate by dividing it into an essential input terminal and a selective input terminal.

In addition, it is an object to form an alignment mark used in the mass production stage in addition to the alignment mark used in the development stage on the array substrate.

In order to achieve the above object, the present invention provides a method of manufacturing a semiconductor device comprising: a) mounting a driver integrated circuit device on an array substrate and forming a first required pad group and a first selection pad group electrically connected to the driver integrated circuit device, b) A second mandatory pad group mounted on a first printed circuit board and electrically connected to the circuit device for operating the driver integrated circuit device, the second mandatory pad group corresponding to the first mandatory pad group and the first selection pad group, respectively; Forming a second selection pad group, c) the array such that the first mandatory pad group and the first selection pad group of the array substrate are in contact with the second mandatory pad group and the second selection pad group of the printed circuit board, respectively; Attaching the printed circuit board to a substrate; d) through the second selection pad group connected to the first selection pad group; Testing a driver integrated circuit device by applying a test signal to a driver integrated circuit device, e) mounting a circuit device for operating the driver integrated circuit device on a second printed circuit board and electrically connecting the driver integrated circuit device, Forming a third mandatory pad group corresponding to the first mandatory pad group of the array substrate of step a), and f) the first mandatory pad group of the array substrate of step a) is the third mandatory pad group Attaching the second printed circuit board to the array substrate of step a) to be in contact with the substrate.

The step a) may further include forming a first development alignment mark and a first mass alignment mark on the array substrate, and the step b) may be performed on the first printed circuit board. And forming a second development alignment mark corresponding to the first development alignment mark, wherein c) includes: forming the first development alignment mark and the second development alignment mark; The method may further include attaching the first printed circuit board to the array substrate as a reference.

The step e) may further include forming a second mass alignment mark on the second printed circuit board corresponding to the first mass alignment mark of the array substrate of step a). The method may further include attaching the second printed circuit board to the array substrate of step a) based on the second mass alignment mark on the first mass alignment mark.

The present invention also provides an array substrate having a first pad group and a second pad group on which a driver integrated circuit device is mounted and electrically connected to the driver integrated circuit device, and a circuit device for operating the driver integrated circuit device. The printed circuit board may include a printed circuit board having a third pad group electrically connected to the circuit elements, and the printed circuit board may be attached to the array substrate such that the first pad group and the third pad group contact each other.

The array substrate may include a first alignment mark formed between the first pad group and the second pad group, and the printed circuit board may include a third alignment mark formed corresponding to the first alignment mark. The first alignment mark and the third alignment mark preferably provide an alignment reference when the printed circuit board is attached to the array substrate.

In addition, the first pad group includes a plurality of pads that receive control signals and data signals from circuit elements of the printed circuit board.

The second pad group may include a plurality of pads receiving test data signals and interface signals from the outside.

In addition, the interface signal is preferably a signal for testing any one of a serial interface, CPU (CPU) interface, Algibi (RGB) interface and the mobile digital display interface.

In addition, the printed circuit board is preferably FPCB (FPCB).

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 4 is a diagram illustrating a FOG pad structure formed on an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention. As shown in FIG. 4, an FOG pad structure formed on an array substrate of a liquid crystal display according to an exemplary embodiment of the present invention may include an essential FOG pad group 120, a selection FOG pad group 130, and an alignment mark for development. 150, 152 and mass alignment marks 150, 154.

The essential FOG pad group 120 includes a plurality of FOG pads for inputting a control signal, a data signal, and a power to the driver IC 140 to drive the liquid crystal display normally. The FOG pads constituting the required FOG pad group 120 are electrically connected to a bump (not shown) of the driver IC 140 through the metal wiring 102 formed on the array substrate 100.

When the driver IC 140 is a one chip driver IC which performs both a source driver and a gate driver function, the control signal includes a data start signal (STH: Start Horizontal), a data sync signal (Clock Pluse Horizontal), and data. Source driver control signals such as output signals (Load) and polarity inversion signals (MPOL: Data Ploarity Inversion), gate start signals (STV: Start Vertical), gate sync signals (CPV: Clock Pluse Vertical), gate output signals (OE) Gate driver control signal.

The selection FOG pad group 130 includes a plurality of pads for inputting a test data signal and a signal related to an interface to the driver IC 140 in order to verify the driver IC 140 of the liquid crystal display at the development stage.

The interface may be a serial interface, a CPU interface, an RGB interface, a mobile digital display interface (MDDI), or the like.

The FOG pads constituting the selection FOG pad group 130 are electrically connected to a bump (not shown) of the driver IC 140 through the metal wire 102 formed on the array substrate 100.

The development alignment marks 150 and 152 provide an alignment criterion when contacting and attaching the FOG pads constituting the essential and optional FOG pad groups 120 and 130 and the FPCB pads formed on the corresponding FPCBs in the development stage.

In the present exemplary embodiment, the alignment marks 150 and 152 for development are formed on the side surfaces of the end FOG pads 122 and 132 among the essential FOG pad group 120 and the selected FOG pad group 130. In this case, the end means a side where the essential FOG pad group 120 and the selected FOG pad group 130 are not adjacent to each other. The development alignment mark 150 may be used as an alignment mark for mass production.

The mass alignment mark 154 provides an alignment criterion when contacting and attaching the FPCB having the unnecessary portion (the FPCB portion corresponding to the selected FOG pad group portion) removed from the mass production step to the array substrate 100. In this embodiment, the mass alignment mark 154 is formed on the space between the required FOG pad group 120 and the selected FOG pad group 130, that is, on the side of the pad 124 of the required FOG pad group 120. To illustrate.

Hereinafter, a process of minimizing FPCB using the FOG pad structure formed on the array substrate of the liquid crystal display according to the exemplary embodiment of the present invention will be described in detail.

FIG. 5 is a diagram illustrating a module of the liquid crystal display of FIG. 4 including an FPCB and an array substrate on which a panel is formed in a development stage. As shown in FIG. 5, anisotropy is formed on the array substrate 100 on which the required FOG pad group 120, the selective FOG pad group 130, the development alignment marks 150 and 152, and the production alignment marks 154 are formed. The FPCB 160 is attached using an anisotropic conducting film (ACF).

The FPCB 160 is equipped with a circuit element 165 including a resistor, a capacitor, and the like required for operation of a time controller, an internal power generator, and the like in the driver IC 140, and the required FOG pad group 120 of the array substrate 100. ), An optional FPCB pad group 162 corresponding to the selection FOG pad group 130, the development alignment marks 150 and 152, and the production alignment mark 154, the selection FPCB pad group 163, and the development alignment It is preferable that the marks 166 and 167 and the alignment mark 168 for mass production are formed.

In the case of attaching the array substrate 100 and the FPCB 160 on which the panel 102 is formed in the development stage, the array substrate is aligned based on the development alignment marks 150, 152, 166, and 167 formed on the array substrate 100 and the FPCB 160. Attach FPCB 160 to 100. Thus, the test driver IC 140 may be tested by inputting the tester data signal and the interface related signal to the driver IC 140 in the development stage through the selection FOG pad group 130.

FIG. 6 illustrates a module of the liquid crystal display of FIG. 4 including an array substrate on which a panel is formed and an FPCB in a mass production stage. As shown in FIG. 6, in the mass production step, the size of the FPCB 160 is removed by removing a portion (selected FPCB pad group portion) of the FPCB 160 corresponding to the selected FOG pad group 130 of the array substrate 100. It can be minimized. Considering that the manufacturing cost of the FPCB is determined based on the size of the injected raw material, it can be seen that the FPCB has an effect of reducing the manufacturing cost compared to the conventional FPCB in this embodiment having the size of C × B.

Meanwhile, in the case of attaching the array substrate 100 and the FPCB 160 on which the panel 102 is formed in the mass production stage, the array is aligned based on the alignment marks 150, 154, 166 and 168 formed on the array substrate 100 and the FPCB 160. The FPCB 160 is attached to the substrate 100.

Therefore, according to the present embodiment, after verification of the interface, data bus lines and various signals of the driver IC in the initial development stage, the FPCB size can be minimized by removing the portion of the FPCB corresponding to the selected FOG pad group of the array substrate. In addition, since the array substrate and the FPCB can be attached based on the alignment mark for mass production, masking work for changing the structure of the FOG pad of the array substrate can be omitted.

As described above, the liquid crystal display device including the selection pad and the method of manufacturing the same according to the present invention are divided into a required input terminal and a selection input terminal to form a FOG pad on an array substrate, thereby developing an interface and a data bus line of a driver IC at a development stage. After the verification of the various signals, etc., the portion of the FPCB corresponding to the selected FOG pad group of the array substrate may be removed to minimize the FPCB size.

In addition, by forming the alignment mark used in the mass production stage in addition to the alignment mark used in the development stage, the array substrate and the FPCB can be attached to the array substrate based on the mass alignment mark in the mass production stage. Masking work to change the structure of the pad can be omitted.

In addition, preferred embodiments of the present invention are disclosed for the purpose of illustration, those skilled in the art will be able to various modifications, changes, additions, etc. within the spirit and scope of the present invention, these modifications and changes should be seen as belonging to the following claims. something to do.

Claims (9)

a) mounting a driver integrated circuit device on an array substrate and forming a first mandatory pad group and a first selection pad group electrically connected to the driver integrated circuit device; b) a second mandatory pad mounted to a first printed circuit board for operating the driver integrated circuit device and electrically connected to the circuit device and respectively corresponding to the first mandatory pad group and the first selection pad group; Forming a group and a second selection pad group; c) attaching the printed circuit board to the array substrate such that the first mandatory pad group and the first selection pad group of the array substrate contact the second mandatory pad group and the second selection pad group of the printed circuit board, respectively. ; d) testing a driver integrated circuit device by applying a test signal to the driver integrated circuit device through a second selection pad group connected to the first selection pad group; e) a third mandatory mounting circuit element for operating said driver integrated circuit element on said second printed circuit board and electrically connected to said circuit element, said third mandatory corresponding to the first mandatory pad group of the array substrate of step a) Forming a pad group; And f) attaching the second printed circuit board to the array substrate of step a) such that the first mandatory pad group of the array substrate of step a) contacts the third mandatory pad group. Liquid crystal display device manufacturing method. The method of claim 1, The step a) includes a first development alignment mark formed at both ends of a first mandatory pad group and a first selection pad group on the array substrate, and a first production aligner formed at both ends of the first mandatory pad group. Further comprising forming an in mark, In the step b), forming a second development alignment mark formed on both ends of a second mandatory pad group and a second selection pad group in response to the first development alignment mark on the first printed circuit board. More steps, The step c) may further include attaching the first printed circuit board to the array substrate based on the first development alignment mark and the second development alignment mark. Liquid crystal display device manufacturing method. The method of claim 2, The step e) may include forming second mass alignment marks on the second printed circuit board at both ends of a third required pad group in correspondence with the first mass alignment mark on the array substrate of step a). Contains more The step f) may further include attaching the second printed circuit board to the array substrate of step a) based on the second mass alignment mark on the first mass alignment mark. Liquid crystal display device manufacturing method. delete An array substrate having a first pad group and a second pad group on which a driver integrated circuit device is mounted and electrically connected to the driver integrated circuit device; And, A printed circuit board on which a circuit element for operating the driver integrated circuit element is mounted and in which a third pad group is electrically connected; The printed circuit board is attached to the array substrate such that the first pad group and the third pad group contact each other. The array substrate includes a first alignment mark formed between the first pad group and the second pad group, The printed circuit board may include a third alignment mark formed corresponding to the first alignment mark. The first alignment mark and the third alignment mark provide an alignment reference when the printed circuit board is attached to the array substrate. Liquid crystal display. delete An array substrate having a first pad group and a second pad group on which a driver integrated circuit device is mounted and electrically connected to the driver integrated circuit device; And, A printed circuit board on which a circuit element for operating the driver integrated circuit element is mounted and in which a third pad group is electrically connected; The printed circuit board is attached to the array substrate such that the first pad group and the third pad group contact each other. The second pad group includes a plurality of pads receiving test data signals and interface signals from the outside. Liquid crystal display. The method of claim 7, wherein the interface signal is Signals for testing the interface of any one of the serial interface, CPU interface, RGB interface, and mobile digital display interface. Liquid crystal display. delete

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