KR100724481B1 - Crystallization method for removing moire and mask applied therefor - Google Patents

Abstract

The present invention relates to a method of manufacturing an image display device that suppresses moiré pattern generation. The present invention relates to a method of manufacturing an image display device. The generation of moiré can be suppressed by allowing the lattice pattern to be formed and the lattice pattern of the unit pixels formed by the gate line and the data line to form a predetermined angle.

Crystallization, moiré, mask

Description

Crystallization method to remove moiré phenomenon, mask applied thereto and manufacturing method of image display device using same {CRYSTALLIZATION METHOD FOR REMOVING MOIRE AND MASK APPLIED THEREFOR}

1 is a cross-sectional view showing a unit pixel of a conventional liquid crystal display device.

2A is a plan view of the crystalline formed by SLS crystallization.

2B is a cross-sectional view of the crystalline formed by SLS crystallization.

3 is a photograph of a moire fringe appearing on an image display device.

4 is a conceptual diagram showing a relationship between a moire fringe and a lattice.

5 is a photograph showing an experiment to remove the moire pattern.

Fig. 6 is a graph showing a relationship between angles between moire fringes and lattice.

7 is a graph showing the relationship between the laser intensity and the size of crystals formed.

8 is a mask structure according to a first embodiment of the present invention.

9A is a plan view showing a method of crystallizing by applying the mask of the present invention.

9B is a plan view of a unit region crystallized by the crystallization method of the present invention.

9C is a plan view showing a portion of a substrate crystallized by the crystallization method of the present invention.

10A is a mask structure according to another embodiment of the present invention.

10B is a plan view illustrating a part of a substrate to be crystallized by applying a mask according to another embodiment of the present invention.

11A to 11I are flowcharts showing a method of manufacturing an image display apparatus by the crystallization method of the present invention.

***** Explanation of symbols for main parts of drawing *****

800,1000: Mask 801,802,1001,1002: Slit

804: exposure blocking area 900: substrate

810: substrate 811: buffer layer

812,813 Active layer 814,816,818 Insulation layer

812b: Source area 812c: Drain area

815: gate electrode 817: storage electrode

819a: source electrode 819b: drain electrode

820, 822: protective layer 821: anode electrode

823: organic light emitting layer 824: cathode electrode

The present invention relates to a crystallization method of an image display device using polysilicon, and more particularly, to a crystallization method for removing moiré on a screen of an image display device, a mask applied thereto, and a method for manufacturing the image display device using the same. will be.

With the active development of information processing apparatuses today, the development of image display apparatuses is also actively being made. In particular, the development of a liquid crystal display device (LCD) and an organic EL (Electro luminescence) device, which is light and simple and excellent in portability, is being actively performed.

A liquid crystal display device mainly includes a liquid crystal display panel including an array substrate having unit pixels arranged in a matrix, a color filter substrate facing the array substrate, and a liquid crystal layer filled between the array substrate and the color filter substrate. It is composed.

Referring to Figure 1 looks at the structure of the array substrate.

As shown in FIG. 1, the array substrate includes a plurality of gate lines 101 and a plurality of data lines 102 perpendicular to the gate lines 101. A unit pixel region is defined by the intersection of the gate line 101 and the data line 102, and a thin film transistor (TFT) 103, which is a switching element, is formed in each unit pixel region. In addition, a pixel electrode 105 for applying an electric field to the liquid crystal layer is formed for each unit pixel.

In general, the thin film transistor 103 uses amorphous silicon as the channel layer 104. In accordance with the demand for high-speed operation of the liquid crystal display, polysilicon having high electric mobility is actively developed.

Crystallization of an active layer in a liquid crystal display using polysilicon as an active layer is classified into an excimer laser annealing method (ELA) and a sequential horizontal crystallization method (SLS) according to the crystallization method. The excimer laser annealing method (ELA) can obtain polysilicon having a large grain boundary by crystallizing the silicon by heating it to the near-melt region by laser. In the sequential horizontal crystallization method, a large crystalline silicon grown horizontally in the lateral direction may be obtained by exposing a silicon layer to be crystallized through a slit, completely melting the exposed silicon layer, and crystallizing.

In the crystallization methods, crystals soar upward at grain boundaries where crystalline and crystalline meet, and the grain boundaries forming the irregularities form a lattice pattern on a plane.

FIG. 2A shows a plan view of polysilicon crystallized by the SLS crystallization method, and FIG. 2B shows a side view of FIG. 2A. 2A and 2B, it can be seen that a concave-convex boundary is formed between the grain boundaries. The uneven afterimage of the grain boundary is formed not only on the active layer of the thin film transistor but also on the entire array substrate to form a lattice pattern. In addition, since the substrate on which the liquid crystal display panel is formed is large, it cannot be achieved by only one laser irradiation. Therefore, several laser shots must be irradiated to one substrate, and shot marks remain on the substrate by the laser shot.

As a result, the array substrate on which the thin film transistor is formed includes at least 3, such as a lattice pattern formed by the intersection of the gate line and the data line, a lattice pattern formed by the laser shot, and a lattice pattern formed by the grain boundary generated during the crystallization process. Repeating patterns occur.

However, the repetitive pattern causes a problem of forming a negative moire pattern in image quality by acting as a slit of interference and diffraction of incident light when the LCD displays an image.

3 shows moiré patterns appearing on the surface of an organic EL image display device.

Moire refers to a pattern generated when a point or line is regularly distributed. For example, in tricolor or four-color printing, each plate is stained according to the angle when the angle is not exactly. This is called a moiré phenomenon, and when such a moiré phenomenon appears on the screen, there is a problem of degrading image quality.

Hereinafter, the moiré phenomenon will be described in more detail. Before we learn about moiré, in order to understand the moiré phenomena, it is necessary to understand the beat phenomena of sound waves.

The beat phenomenon is that two waves of similar frequency affect each other, and the frequency width changes in a constant cycle according to the difference between the two frequencies. Waves with similar frequencies cancel and reinforce each other's frequencies to form a constant period. It is this cycle that causes the wave to grow or disappear.

The moiré phenomenon can be considered that the beat phenomenon occurs visually. If the objects have a certain distance, interference patterns are generated between them. Therefore, in a liquid crystal display panel, a gate line, a data line, a grain boundary, and the like that form a lattice form a moire pattern on a screen by acting as a slit for interference and diffraction of light. The moiré pattern may form a rainbow lattice or a comb-toothed lattice.

The moire pattern is a problem of an image display device such as a liquid crystal display device, and is particularly problematic in an organic EL image display device using an organic EL as a light emitting element.

An image display apparatus using an organic EL as a light emitting device has a plurality of gate lines arranged in parallel with each other and a plurality of data lines perpendicular to the gate lines, and unit pixels are defined by the intersection of the gate lines and the data lines. Each of the unit pixels is similar to a liquid crystal display in that a thin film transistor is provided as a switching element.

However, since the organic EL image display device uses an organic EL that emits light as a light source, it does not need a backlight assembly, which is a light source of the liquid crystal display device, and expresses color by controlling the amount of light emitted from the organic EL by controlling the voltage. The liquid crystal layer used is unnecessary, and since the organic EL itself has red, green, and blue colors, there is a difference in that the color filter layer of the liquid crystal display device for the natural color is unnecessary.

Although the moire problem occurs in both the organic EL image display device and the liquid crystal display device, the moire phenomenon is more prominent since the organic EL has no polarizing plate used in the liquid crystal display device.

Therefore, an object of the present invention is to provide a crystallization method for removing the moiré phenomenon which can improve the moiré phenomenon appearing on the screen of the liquid crystal display device and the organic EL image display device, a mask applied thereto and a method of manufacturing the image display device using the same. have. In particular, the present invention provides a crystallization method for removing the moiré phenomenon that can remove the moiré phenomenon occurring in the organic EL image display device using polysilicon crystallized by the SLS crystallization method or ELA crystallization method as the active layer of the switching device, An object of the present invention is to provide a method of manufacturing a mask and an image display device.

In order to achieve the above object, a method of manufacturing an image display device includes forming an amorphous silicon layer on a substrate; Crystallizing the amorphous silicon by applying a mask including a slit that forms a predetermined angle with a scan direction of a laser for crystallization; Patterning the crystallized silicon layer to form an active layer; Forming a gate line parallel to or perpendicular to the laser scan direction and a gate electrode on the active layer and positioned on the active layer on the substrate; And forming a data line perpendicular to the source and drain electrodes connected to the active layer and the gate line.

In addition, in the crystallization method of the present invention, in the crystallization of an amorphous silicon layer formed on a substrate including a plurality of gate lines and a plurality of data lines perpendicularly intersected therebetween, the lattice formed by the gate line and the data line Laser irradiation using a mask having a plurality of openings formed at predetermined angles; Irradiating the mask with a laser beam after the X-direction scan distance; After the mask is moved in the Y direction step distance, laser irradiation is performed to perform crystallization, so that the lattice pattern formed by the gate line and the data line and the lattice pattern formed by the crystallization form a predetermined angle with each other. It is done.

In addition, the mask of the present invention comprises a plurality of blocks; The plurality of openings formed in the block and inclined in parallel to each other may be provided, but the openings formed in the blocks adjacent to each other may be arranged to be offset from each other.

Moiré is caused by the interference and diffraction of light by the grid pattern, referring to Figure 4 looks at the relationship between the grid and the moire pattern.

4 illustrates a parallel first linear pattern 401, a second linear pattern 402 having a predetermined angle 2α, and a first linear pattern 401 and a first linear pattern 401. The moire fringe 403 generated by the two linear patterns 402 is shown.

The first linear patterns 401 are arranged parallel to each other with a spacing of d1, and the second linear patterns 402 are arranged parallel to each other with a spacing of d2.

The linear moiré pattern 403 having an interval of d0 is generated by the first linear pattern 401 and the second linear pattern 402.

The relation between the first linear pattern 401, the second linear pattern 402, and the moire fringe 403 is represented as follows.

AB = d1 / sin (θ-α) = d2 / sin (θ + α)

CD = d1 / sin2α = d0 / sin (θ + α)

(Formula 3) d0 = d1d2 / (d12 + d22-2d1d2cos2α) 1/2

(4 expression) θ = tan-1 (tanα (d1 + d2 / d2-d1))

As shown in Equation 3, it can be seen that the spacing d0 of the moire fringe has a constant relationship with the angles 2α and d1 and d2 formed between the first linear pattern 401 and the second linear pattern 402. That is, when the values d1 and d2 are fixed, the interval between the moire fringes becomes narrower when the angle 2α formed by the first linear pattern 401 and the second linear pattern 402 becomes larger.

Since the human eye has a limited resolution, the moiré pattern may not be observed if the moiré pattern interval is less than the resolution of the eye.

In contrast to the result of the image display device having a gate line and a data line, the first linear pattern may correspond to a lattice pattern formed by the gate line and the data line, and the second lattice pattern is a laser generated during the crystallization process. It may be a grid of grain boundaries resulting from shot marks or crystallization.

Through the following experiments, we will examine the relationship between the linear pattern and the moire pattern.

5 illustrates two image display panels overlapping each other. The image display panel may be a liquid crystal display panel or an organic EL image display panel. This experiment was conducted on the organic EL image display panel.

As shown in FIG. 5, the lattice pattern formed on each image display panel by overlapping the two image display panels, that is, the lattice pattern formed by the gate line and the data line forms a predetermined angle with each other.

The lattice patterns formed on the image display panels overlap each other to form a predetermined angle, and the gap between the moire patterns generated while rotating one of the image display panels on the surface of the other image display panel was measured. That is, the first panel 501 and the second panel 502 of FIG. 5 overlap each other at a predetermined angle.

6 shows the relationship between the moire fringe spacing and the angle formed by the lattice pattern.

The x axis of FIG. 6 represents an angle 2α formed by the first panel 501 and the second panel 502, and the left y axis represents an angle formed by the second linear pattern 402 and the moire pattern 403, that is, the moire pattern. The generation angle of θ + α is shown, and the right y-axis shows the interval d0 between moire fringes.

As shown in the graph of Figure 6, it can be seen that the spacing of the moire pattern changes with the change of the angle between the two linear patterns.

As shown in FIG. 6, in the moire fringe, an area indistinguishable with the naked eye according to an angle formed by two intersecting linear patterns, that is, areas A and B of FIG. 6 appear.

In other words, the spacing of the moire fringes is changed by the angle between the two grids, and at a predetermined angle, the moiré cannot be distinguished by the naked eye. From the above results, it can be seen that the moire fringe can be improved when the lattice crossing each other has a predetermined angle.

Hereinafter, the crystallization method of the present invention will be described with reference to FIG. 8.

Prior to this, the sequential horizontal crystallization method (SLS) for generating a grid pattern after crystallization will be briefly described.

The crystallization method of amorphous silicon is mainly used a heating method for heating and crystallizing amorphous silicon in the chamber and a laser crystallization method for instantaneously irradiating laser light to crystallize. In particular, the laser crystallization method has a low temperature below the glass transition temperature. It is a crystallization method that is mainly used today because it is possible to crystallize.

However, in the laser crystallization method, the particle size of the crystal formed is different depending on the laser intensity irradiated onto the specimen.

Hereinafter, the relationship between the laser density irradiated to the amorphous silicon and the size of the crystallized particles will be described with reference to the graph of FIG. 7.

As shown in the graph of FIG. 7, the crystallization of amorphous silicon may be divided into first and second regions according to the intensity of laser energy to be irradiated.

The first region is a partial melting region, in which laser energy is irradiated to the amorphous silicon layer at an intensity such that only the surface of the amorphous silicon layer is melted. In the first region, only the surface of the amorphous silicon is partially melted by laser irradiation, and small crystal particles are formed on the surface of the amorphous silicon layer through a solidification process.

The second region is a near-complete melting region, which irradiates the amorphous silicon with laser energy that is stronger than the first region so that the amorphous silicon layer is almost melted. However, although not completely melted, small nuclei that remain unmelted can act as seeds to grow crystals, and larger crystal grains can be obtained compared to the first region. However, crystals growing in the second region are not uniform and the second region is considerably smaller in width than the first region.

The third region is a complete melting region, in which the intensity of the irradiated laser energy is higher than that of the second region to melt all the amorphous silicon layers. The fully molten silicon layer undergoes cooling and undergoes solidification. The crystals formed are homogeneous nucleation, but the particles are very fine.

However, when the crystallization is performed by applying a mask having a slit having a predetermined width while the crystallization is performed at the laser intensity corresponding to the third region, it is possible to obtain large grain crystalline silicon formed by sequentially crystallization. This method is the SLS crystallization method.

The SLS crystallization method crystallizes by applying a mask having a slit. The amorphous silicon portion irradiated through the slit of the mask is melted, and the region not irradiated with the laser remains in a non-melt state. As the molten amorphous silicon portion is cooled, crystallization proceeds horizontally using the silicon of the non-melting portion as a seed. At this time, crystallization proceeds in both sides, so that grains meet in the center to form only one grain boundary.

However, the SLS crystallization method can obtain a large crystalline silicon growing in the scanning direction of the laser, but forms one large grain boundary in the center of the crystal region. The grain boundary forms a lattice pattern on the entire substrate and causes moiré phenomenon.

 The present invention is intended to remove the moiré phenomenon by using a grain boundary formed by SLS crystallization in reverse. That is, the moiré phenomenon is removed by making the lattice formed by the grain boundary generated in the SLS crystallization process and the lattice made by the gate line and the data line to have a predetermined angle.

Hereinafter, a method of crystallizing an amorphous silicon layer formed on a substrate by applying a mask having a predetermined slit pattern will be described with reference to FIG. 8.

8 shows an example of the mask of the present invention used for crystallization. As shown in FIG. 8, a plurality of blocks 810 and 820 are formed in one mask 800. This embodiment illustrates two blocks.

A plurality of slits 801 and 802 are formed in one block, and each slit is configured to form a predetermined angle with the horizontal and vertical sides of the mask, respectively. Therefore, when the mask 800 is aligned with the substrate, the laser scanning direction and the slits 801 and 802 are at a predetermined angle. In addition, the block is defined in an area in which the horizontal movement corresponds to the scan movement distance and the vertical movement corresponds to the step movement distance.

In addition, the slit formed in the block has a predetermined width W1 and a predetermined length L1. An exposure blocking area 804, that is, a non-slit area, is formed between each slit, and the interval between the slits, that is, the width of the exposure blocking area 804 is configured to be equal to or smaller than the width of the slit.

In addition, the slits formed in the blocks are arranged in different sizes so as to crystallize each block area as much as possible. That is, a large length slit is disposed in the center of each block and a small length slit is disposed at the edge.

On the other hand, the respective slit patterns formed in the adjacent blocks are configured to be offset from each other by a constant interval. The shifted length may be a length corresponding to the width of the slit. As described above, after the first laser shot is irradiated by shifting the slit regions of the respective blocks, the mask is configured so that the slit regions of the first block coincide with the exposure blocking region of the second block when the first laser shot is irradiated. . As such, when the laser shot is repeated while moving the substrate by a certain distance by arranging the slits, the entire area of each block may be crystallized.

Hereinafter, a method of crystallizing amorphous silicon formed on a substrate using the slit will be described with reference to FIGS. 9A to 9C.

9A illustrates a state in which the mask 800 is arranged on the substrate 900. An excimer laser or the like may be used as the means for crystallization, and the mask may be formed inside or outside the projection lens of the laser generating apparatus. While the mask is formed inside the projection lens, it is possible to reduce the damage of the mask by the laser, while the accuracy may be reduced.If the mask is placed outside the projection lens and laser irradiation, the accuracy of the pattern may be improved, but the mask may The laser may be damaged. The position of the mask is determined in consideration of the advantages and disadvantages.

After the horizontal and vertical sides of the mask 800 correspond to the horizontal and vertical sides of the substrate, respectively, the first laser shot is irradiated. Subsequently, the substrate 900 is moved by a scan movement distance in the -X scan direction, and then the second laser shot is irradiated. Then, the silicon region that is not crystallized due to the exposure blocking region of the second block portion of the first laser sash mask may be crystallized by the laser irradiated through the slit of the first block to crystallize the entire unit exposure region.

Since the horizontal length of the substrate 900 is much larger than that of the mask, crystallization proceeds to the end of the substrate while repeatedly scanning and moving. Subsequently, after the substrate 900 is moved by the step movement distance in the -Y step movement direction, crystallization is performed again while the substrate 900 is moved in the X direction. That is, the substrate moves zigzag in the Y direction for crystallization. The process is repeated until the entire substrate is crystallized.

As a result, it is possible to obtain a lattice pattern formed by grain boundaries that form a predetermined angle with the scan movement direction of the substrate over the entire substrate.

FIG. 9B illustrates the unit region crystallized by the first laser shot and the second laser shot. That is, 802a of FIG. 9B shows a region crystallized through the slit of the second block of the first laser sash mask, and 801a shows a region crystallized through the slit of the first block of the second laser sash mask after the scan movement. do. As a result, there is no amorphous region in the unit region.

FIG. 9C illustrates a state in which more unit regions are crystallized. When crystallization is performed by applying the mask having a slit pattern having a predetermined angle with the scan direction of the laser, the scan direction of the laser and the predetermined direction are determined. You can get the lattice pattern of the grain boundary forming the angle of.

In the future, a lattice pattern of a unit pixel region formed by a gate line and a data line perpendicular to the gate line is added to the substrate. The lattice pattern formed by the unit pixel region and the lattice pattern formed by the grain boundary are mutually different. The moiré phenomenon can be removed at a predetermined angle.

Meanwhile, another mask structure of the present invention will be described with reference to FIG. 10 with reference to FIG. 10. The mask 1000 of FIG. 10 includes a plurality of blocks, and in each block, a plurality of slits having the same size are formed at a predetermined angle with the scan direction. The slits formed in each block are different from the above embodiment in that all the slits have the same size.

The mask 1000 of FIG. 10 includes a plurality of blocks and includes a plurality of slits parallel to each other in a unit area defined by an x-direction scan movement distance and a Y-direction step movement distance. The slits have the same width and length and are formed at regular intervals from each other. Between the slits is an exposure blocking region in which light irradiated upon exposure is blocked, and the width of the exposure blocking region is equal to or smaller than the width of the slit.

Further, the patterns of the slits formed in the adjacent blocks are shifted from each other by a predetermined length. The shifted length may be equal to or smaller than the width of the slit.

Next, referring to FIG. 10B, the substrate is crystallized by applying the mask. After aligning the horizontal and vertical axes of the mask with the laser scanning direction, the first laser shot is irradiated, and the substrate is then scanned in the X direction. After moving by a distance, the second laser shot is irradiated. The process proceeds until all of the transverse directions of the substrate are crystallized.

Next, the substrate is moved in the Y direction by the Y step moving distance, and then the laser shot is irradiated for crystallization. The process proceeds until the entire substrate is crystallized. As a result, a portion of the edge of the substrate remains amorphous but there is no problem in forming the device.

The process of crystallizing amorphous silicon by applying the mask was described.

Next, a manufacturing process of an image display device will be described as an embodiment formed by applying the crystallization method of the present invention.

This embodiment looks at an organic EL image display device in which moire generation is particularly problematic.

Hereinafter, a method of applying the crystallization method of the present invention and forming an array substrate using an organic EL as a light emitting device will be described with reference to FIGS. 11A to 11I.

As shown in FIG. 11A, a buffer layer 1111 is formed on a transparent substrate 1110 and an amorphous silicon layer is formed thereon. Thereafter, the amorphous silicon layer is crystallized by a laser crystallization method. The crystallization method may be an SLS crystallization method or an ELA crystallization method.

This embodiment adopts the SLS crystallization method as the crystallization method.

When the amorphous silicon layer is crystallized to form a polycrystalline silicon layer, the polycrystalline grain boundary pattern is generated in a predetermined direction, and the grain boundary forms a uniform lattice pattern on the substrate.

Subsequently, the polycrystalline silicon is applied and patterned to form island type active layers 1112 and 1113.

Subsequently, as illustrated in FIG. 11B, an insulating layer such as a silicon oxide layer is deposited on the active layers 1112 and 1113 and a conductive material such as a metal is deposited thereon, followed by patterning using a second mask. The insulating layer 1114 and the gate electrode 1115 are formed. At this time, the gate line is simultaneously formed when the gate electrode is formed, and the gate line is formed in the scan direction of the laser to form a predetermined angle with the grid pattern formed by the grain boundary.

Subsequently, the gate electrode 1115 is applied as a mask and impurity ions are implanted into the active layers 1112 and 1113 to form source and drain regions 1112a and 1112b and a capacitor electrode 1113a. The source and drain regions 1112a and 1112b are formed at both sides of the active layer.

Subsequently, as shown in FIG. 11C, a first interlayer insulating layer 1116 is formed on the gate electrode 1115, a conductive material such as a metal is deposited thereon, and then a third mask is applied and patterned to form a capacitor electrode ( The storage line 1117 is formed on the upper portion 1113a. The storage line 817 together with the capacitor electrode 813a forms a storage capacitor.

Subsequently, as illustrated in FIG. 11D, the first to third contact holes 1118a, 1118b, and 1118c are formed by forming a second interlayer insulating layer 1118 on the storage line 1117 and patterning by applying a fourth mask. Form. The first contact hole 1118a exposes the drain region 1112b, the second contact hole 1118b exposes the source region 1112c, and the third contact hole 1118c exposes the storage line 1117. Expose

Next, as shown in FIG. 11E, a conductive material such as a metal is deposited on the second interlayer insulating layer 1118 and patterned with a fifth mask to form a drain electrode 1119b. The drain electrode 1119a is connected to the drain region 1112b through the first contact hole 1118a, and the source electrode 1119b is connected to the source region 1112c and the storage through the second and third contact holes 1118b and 1118c. Connected to lines 1117, respectively.

Next, as illustrated in FIG. 11F, a fourth passivation layer 1120 is formed on the drain electrode 1119a and the source electrode 1119c and is patterned with a sixth mask to expose the drain electrode 1119a. The contact hole 1120a is formed.

Subsequently, as illustrated in FIG. 11G, the anode electrode 1121 is connected to the drain electrode 1119a through the fourth contact hole 1120a by depositing the transparent conductive material and patterning the seventh mask. ).

Next, as shown in FIG. 11H, a bank 1122a for forming the second protective layer 1122 on the anode electrode 1121 and applying and patterning the eighth mask is exposed to expose the anode electrode 1121. Form.

Subsequently, as shown in FIG. 11I, an organic light emitting layer 1123 is formed on the bank 1122a of the second protective layer 1122, and an opaque conductive material such as metal is deposited thereon to form a cathode electrode ( 1124).

The above method shows an example of a manufacturing process of the organic EL image display device, wherein the lattice pattern formed by the gate line and the data line and the lattice pattern formed by the grain boundary generated during crystallization have a predetermined angle. This can reduce moiré phenomena caused by light interference and diffraction.

Although the SLS crystallization is used as the crystallization method in the above embodiment, the present invention may also be achieved by the ELA crystallization method to form a certain lattice pattern. In addition, in the above embodiment, a crystallization method for reducing moiré generated in the organic EL image display device is introduced, but the present invention can be applied to a liquid crystal display device.

As described above, the present invention provides a lattice pattern formed by a gate line and a data line, in which a lattice pattern formed by grain boundaries generated as a result of crystallization by crystallizing a silicon layer by applying a mask having a slit pattern having a predetermined angle with a laser scan direction. Moiré pattern generation can be suppressed by forming a predetermined angle with the pattern. In addition, the present invention is provided with a mask having a slit pattern formed at an angle and the horizontal and vertical direction of the mask can be arranged to match the horizontal and vertical direction of the substrate to prevent the laser irradiated to unnecessary areas during crystallization Optimize the amount of laser that is being

Claims (20)

Forming an amorphous silicon layer on the substrate; The slits are arranged to be inclined at a predetermined angle with the scanning direction of the laser for crystallization, and have a plurality of slits having the same width and different lengths, wherein the longest slits are formed at the center, and the shorter slits are formed at the edges. Crystallizing the amorphous silicon using a formed mask; Patterning the crystallized amorphous silicon layer to form an active layer; Forming a gate line parallel to or perpendicular to the laser scan direction and a gate electrode on the active layer and positioned on the active layer on the substrate; And forming a data line vertically intersecting the source and drain electrodes and the gate line connected to the active layer. The method of claim 1, wherein the mask is defined by a plurality of blocks, and the plurality of slits formed in the mask are inclined at a predetermined angle with the scan direction of the laser and formed in parallel with each other. The method of claim 1, wherein the plurality of slits are formed to be parallel to each other at regular intervals and the spacing between the slits is smaller than or equal to the width of the slits. 3. The exposure blocking region of claim 2, wherein the slits formed in the second block among the slits formed in each of the first block and the second block adjacent to each other among the plurality of blocks are formed in the first block. And a video display device positioned in the non-slit region. The method of claim 1, wherein crystallizing the amorphous silicon Aligning a mask in which a plurality of slits are formed on the amorphous silicon; Laser exposure through a slit of the mask; Moving the substrate by an X-direction scan distance; And moving the substrate by a step distance in the Y direction. The method of claim 1, wherein the image display device manufacturing method Forming a first passivation layer exposing the drain electrode; Forming an anode electrode connected to the drain electrode; Forming a second passivation layer exposing the anode electrode; Forming an organic light emitting layer connected to the anode electrode; and And forming a cathode electrode connected to the organic light emitting layer. In the crystallization method of the amorphous silicon layer formed on a substrate comprising a plurality of gate lines and a lattice formed by a plurality of data lines perpendicularly intersected therewith, A plurality of openings having the same width and different lengths are disposed to be inclined by a predetermined angle with a grid formed by the gate line and the data line, and an opening having a long length is formed in the center and has a short length. Laser irradiation on the substrate using a mask formed on the edge; Irradiating the mask with a laser beam after the X-direction scan distance; After the mask is moved in the Y direction step distance, laser irradiation is performed to perform crystallization, and the lattice pattern formed by the gate line and the data line and the lattice pattern formed by the crystallization are arranged to be inclined with each other by a predetermined angle. Amorphous silicon crystallization method, characterized in that. The amorphous silicon crystallization method according to claim 7, wherein the mask is defined by a plurality of blocks, and a plurality of openings having the same width and different lengths are formed in each block. The amorphous silicon crystallization method of claim 8, wherein the plurality of openings are formed to be parallel to each other and have a predetermined distance therebetween, and are inclined by a predetermined angle with respect to the laser scanning direction. The amorphous silicon crystallization method of claim 8, wherein the block includes a unit laser crystallization region corresponding to one side of the X-direction scan distance, and the other side of the block to a Y-direction step distance. 8. The method of claim 7, wherein the gap between the openings is less than or equal to the width of the openings. The method of claim 8, wherein the openings formed in the second block of the openings formed in each of the first and second blocks adjacent to each other of the blocks are located in the non-opening region between the openings formed in the first block Amorphous silicon crystallization method, characterized in that. A plurality of blocks defined on the mask; And The plurality of slit patterns are formed on a mask in which each block is located, inclined by a predetermined angle with respect to the vertical direction and the horizontal direction of the mask, and have the same width and different lengths, but the plurality of same widths and different lengths Among the slit patterns, the long slit pattern is formed at the center of the block, and the short slit pattern is formed at the edge of the block. The slit patterns formed in the second block among the slit patterns formed in each of the first block and the second block adjacent to each other among the plurality of blocks are non-slit which is an exposure blocking region between the slit patterns formed in the first block. A mask, characterized in that located in the pattern area. The mask of claim 13, wherein the slit pattern is formed in a unit laser crystallization region defined as a scan movement distance and a step movement distance in the block. The mask of claim 13, wherein an interval between the slit patterns is smaller than or equal to a width of the slit pattern. The mask of claim 13, wherein the width of the non-slit pattern region, which is an exposure blocking region between the slit patterns formed in the adjacent blocks, is smaller than or equal to the width of the slit pattern. delete delete delete delete

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