JPS6279628A - Method for reduction in interfacial level density - Google Patents

Abstract

PURPOSE:To reduce the interfacial level density of Si-SiO2 to 1X10<10>/cm<2> or less by a method wherein a high speed thermal oxidation is performed for oxidizing treatment of Si, and a high speed annealing treatment is used for the hydrogen annealing in order to decrease the interfacial level density of Si-SiO2. CONSTITUTION:When a silicon oxide film is formed on a silicon substrate, an oxidizing process is performed using a high speed thermal oxidization processing method, and the hydrogen annealing processing for reduction in interfacial level density is performed using a high speed thermal annealing method. When a high speed oxidization and a high speed hydrogen annealing are performed for formation of Si-SiO2 as above-mentioned, the density of interfacial level of Si-SiO2 can be reduced to 1X10<10>/cm<2> or less. The accomplishment of reduction in interfacial level density of Si-SiO2 to 1X10<10>/cm<2> gives a very large effect on the stabilization of threshold voltage of an MOS FET, the reduction in surface noise, and the improvement in long period reliability of threshold voltage due to the decrease in trap density.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for reducing the interface state density of a 5i-3in2 thread in a semiconductor device, particularly in a MO3 type IFKT.

[Summary of the invention]

The present invention relates to a method for reducing the interface state density between Si and 5102 in a semiconductor device, and in forming a silicon oxide film on a silicon substrate, oxidation treatment is performed by high-speed thermal oxidation treatment, and
The hydrogen annealing process for reducing interface levels is also characterized by high-speed thermal annealing process.

[Conventional technology]

Conventionally, 810. on S1. For film formation, a thermal oxidation treatment using resistance heating has generally been performed. Also, 5i-
Hydrogen annealing for reducing the planeness of the 8iO□ world level was also commonly performed using a resistance heating furnace.

[Problems and objects to be solved by the invention] However, in the thermal oxidation and hydrogen annealing according to the above-mentioned conventional technology, 5i-3i
There was a problem in that it was impossible to reduce the interface state density of n2 to 5×101 O/cr1 or less.

The present invention eliminates the problems of the prior art and
To provide an oxidation and hydrogen annealing treatment method 2 for reducing the interface state density of io2 to I x 1010/cd or less 2
purpose.

[Means for solving problems]

In order to solve the above-mentioned problems, a means of high-speed thermal oxidation of Si oxidation treatment 2 and high-speed thermal annealing treatment of hydrogen annealing for reducing the planeality of the 5i-3iO□ interface level is used.

〔Example〕

Hereinafter, the present invention will be explained in detail with reference to Examples.

That is, as a single crystal, a (100) crystal plane of 15 to 25 Ω, and a secondary Si Milani coating surface are rapidly oxidized at 1500° C. in an oxygen atmosphere using a so-called lamp annealing device.
Formed to a thickness of 100XN degrees in seconds, A1m! After depositing the electrode, hydrogen annealing was performed at 400℃ for 8 seconds using a high-speed thermal annealing system [
(So-called lamp ◆ annealing equipment) N296%,
After conducting in an atmosphere of 24% N, the interface state density was measured by the C-vlil!I constant of the MOS diode (I x 1010/cyl or less. However, 1 The limit is 109
The order could not be confirmed.

〔Effect of the invention〕

As in the present invention, fast oxidation and fast hydrogen annealing are performed in 5i-3.
When in2 formation and annealing are performed, the interface state density of 5i-8102 can be reduced to I x 10"/, -J or less. 5i-3in, the interface state density can be reduced to I x
Being able to make it smaller than 1010/crd is MO.
Needless to say, this method has an extremely large effect on stabilizing the threshold voltage of SFET, reducing surface noise, and improving long-term reliability of the threshold voltage by reducing trap density.

The present invention applies not only to MOS structures but also to other MOS structures such as MNostm structures.
Needless to say, the same effect can be obtained even when applied to the S structure.

that's all

Claims (1)

[Claims] When forming a silicon oxide film on a silicon substrate, oxidation treatment is performed using rapid thermal oxidation (RTO).
Rapid thermal annealing (RTA:
1. A method for reducing interface state density between Si and SiO_2 in a semiconductor device, characterized by using rapid thermal annular processing.