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JPS6425608A - Amplitude companding circuit - Google Patents

Amplitude companding circuit

Info

Publication number
JPS6425608A
JPS6425608A JP18306587A JP18306587A JPS6425608A JP S6425608 A JPS6425608 A JP S6425608A JP 18306587 A JP18306587 A JP 18306587A JP 18306587 A JP18306587 A JP 18306587A JP S6425608 A JPS6425608 A JP S6425608A
Authority
JP
Japan
Prior art keywords
signal
circuit
input
value
amplitude
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18306587A
Other languages
Japanese (ja)
Other versions
JP2712183B2 (en
Inventor
Kenzo Akagiri
Tomoko Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP18306587A priority Critical patent/JP2712183B2/en
Publication of JPS6425608A publication Critical patent/JPS6425608A/en
Application granted granted Critical
Publication of JP2712183B2 publication Critical patent/JP2712183B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)
  • Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
  • Reduction Or Emphasis Of Bandwidth Of Signals (AREA)

Abstract

PURPOSE:To realize an input/output characteristic expressed in an optional power function by means of a digital circuit by using a control signal so as to control a gain of a multiplier circuit being an amplitude modulation circuit to a value represented by a linear conversion equation of a negative coefficient. CONSTITUTION:An input signal S1 with an amplitude (x) is given to a multiplier 21 connected in series by n-set and whose gain is changed in response to a control signal SG2, from which a signal SO5 whose amplitude is Y is outputted. On the other hand, a multiplier circuit 22 receives signals S1, SG2 and outputs its output signal SO6 to a signal processing circuit 23 thereby constituting the amplitude modulation circuit. Then the circuits 22, 23 act like signal forming circuits controlling the gain of the circuit 21 to a value expressed in a linear conversion equation using a negative coefficient a with respect to the signal 51. Then the amplifier Y is expressed as y b<n>x in case of ax<<1 and y b<n>.x<1-n>/a<n>, in case of ax>1, where (b) is a coefficient an when the level of the signal S1 is large, the (1-n)-th power function input/output characteristic is obtained while the input/output characteristic is changed from the value of the former equation into the value of latter equation.
JP18306587A 1987-07-22 1987-07-22 Amplitude compression / expansion circuit Expired - Fee Related JP2712183B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18306587A JP2712183B2 (en) 1987-07-22 1987-07-22 Amplitude compression / expansion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18306587A JP2712183B2 (en) 1987-07-22 1987-07-22 Amplitude compression / expansion circuit

Publications (2)

Publication Number Publication Date
JPS6425608A true JPS6425608A (en) 1989-01-27
JP2712183B2 JP2712183B2 (en) 1998-02-10

Family

ID=16129133

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18306587A Expired - Fee Related JP2712183B2 (en) 1987-07-22 1987-07-22 Amplitude compression / expansion circuit

Country Status (1)

Country Link
JP (1) JP2712183B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105030A (en) * 1974-01-23 1975-08-19
JPS5915337A (en) * 1974-01-26 1984-01-26 ア−・エヌ・テ−・ナツハリヒテンテヒニ−ク・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Elongating circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50105030A (en) * 1974-01-23 1975-08-19
JPS5915337A (en) * 1974-01-26 1984-01-26 ア−・エヌ・テ−・ナツハリヒテンテヒニ−ク・ゲゼルシャフト・ミット・ベシュレンクテル・ハフツング Elongating circuit

Also Published As

Publication number Publication date
JP2712183B2 (en) 1998-02-10

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees