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JPS5662351A - Semiconductor device for memory - Google Patents

Semiconductor device for memory

Info

Publication number
JPS5662351A
JPS5662351A JP13762379A JP13762379A JPS5662351A JP S5662351 A JPS5662351 A JP S5662351A JP 13762379 A JP13762379 A JP 13762379A JP 13762379 A JP13762379 A JP 13762379A JP S5662351 A JPS5662351 A JP S5662351A
Authority
JP
Japan
Prior art keywords
pellets
memory
lead frame
tape carrier
copper foils
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13762379A
Other languages
Japanese (ja)
Inventor
Yuji Sano
Hajime Murakami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP13762379A priority Critical patent/JPS5662351A/en
Publication of JPS5662351A publication Critical patent/JPS5662351A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49575—Assemblies of semiconductor devices on lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PURPOSE:To increase the memory capacity along with a compacter size by bonding a plurality of a semiconductor pellets for memory in paralle with a lead frame empolying a tape carrier. CONSTITUTION:Projected electrodes 12 and 13 are formed on semiconductor pellets 10 and 11. Copper foils 14 and 15 provided on a tape carrier are fastened on electrodes 12 and 13 with the free end of the copper foils connected to the lead frame 16. The pellets 10 and 11 are solidly molded with a resin as a single package. This molding can reduce a space between the upper and lower pellets thereby making the device compact.
JP13762379A 1979-10-26 1979-10-26 Semiconductor device for memory Pending JPS5662351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13762379A JPS5662351A (en) 1979-10-26 1979-10-26 Semiconductor device for memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13762379A JPS5662351A (en) 1979-10-26 1979-10-26 Semiconductor device for memory

Publications (1)

Publication Number Publication Date
JPS5662351A true JPS5662351A (en) 1981-05-28

Family

ID=15202987

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13762379A Pending JPS5662351A (en) 1979-10-26 1979-10-26 Semiconductor device for memory

Country Status (1)

Country Link
JP (1) JPS5662351A (en)

Cited By (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810839A (en) * 1981-07-14 1983-01-21 Mitsubishi Electric Corp Semiconductor device
JPS5944853A (en) * 1982-09-06 1984-03-13 Toshiba Corp Semiconductor device
EP0221496A2 (en) * 1985-11-04 1987-05-13 International Business Machines Corporation Integrated circuit package
JPS6481348A (en) * 1987-09-24 1989-03-27 Hitachi Maxell Manufacture of semiconductor device
JPH0320051A (en) * 1989-03-20 1991-01-29 Seiko Epson Corp Semiconductor device mounting structure and mounting method and mounting device
US5034350A (en) * 1987-09-23 1991-07-23 Sgs Thomson Microelectronics S.R.L. Semiconductor device package with dies mounted on both sides of the central pad of a metal frame
WO1991014282A1 (en) * 1990-03-15 1991-09-19 Fujitsu Limited Semiconductor device having a plurality of chips
US5147815A (en) * 1990-05-14 1992-09-15 Motorola, Inc. Method for fabricating a multichip semiconductor device having two interdigitated leadframes
US5291061A (en) * 1993-04-06 1994-03-01 Micron Semiconductor, Inc. Multi-chip stacked devices
WO1994005038A1 (en) * 1992-08-21 1994-03-03 Olin Corporation Metal electronic package incorporating a multi-chip module
US5530292A (en) * 1990-03-15 1996-06-25 Fujitsu Limited Semiconductor device having a plurality of chips
US5579208A (en) * 1993-07-09 1996-11-26 Fujitsu Limited Semiconductor device having a plurality of semiconductor chips
US5689135A (en) * 1995-12-19 1997-11-18 Micron Technology, Inc. Multi-chip device and method of fabrication employing leads over and under processes
US5721452A (en) * 1995-08-16 1998-02-24 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US5801448A (en) * 1996-05-20 1998-09-01 Micron Technology, Inc. Conductive lines on the back side of wafers and dice for semiconductor interconnects
US5874781A (en) * 1995-08-16 1999-02-23 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US5917242A (en) * 1996-05-20 1999-06-29 Micron Technology, Inc. Combination of semiconductor interconnect
US5952725A (en) * 1996-02-20 1999-09-14 Micron Technology, Inc. Stacked semiconductor devices
US6005778A (en) * 1995-06-15 1999-12-21 Honeywell Inc. Chip stacking and capacitor mounting arrangement including spacers
US6118176A (en) * 1999-04-26 2000-09-12 Advanced Semiconductor Engineering, Inc. Stacked chip assembly utilizing a lead frame
US6175149B1 (en) * 1998-02-13 2001-01-16 Micron Technology, Inc. Mounting multiple semiconductor dies in a package
US6261865B1 (en) 1998-10-06 2001-07-17 Micron Technology, Inc. Multi chip semiconductor package and method of construction
US6297547B1 (en) * 1998-02-13 2001-10-02 Micron Technology Inc. Mounting multiple semiconductor dies in a package
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6452278B1 (en) 2000-06-30 2002-09-17 Amkor Technology, Inc. Low profile package for plural semiconductor dies
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6563205B1 (en) 1995-08-16 2003-05-13 Micron Technology, Inc. Angularly offset and recessed stacked die multichip device and method of manufacture
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6784023B2 (en) 1996-05-20 2004-08-31 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6884657B1 (en) 1995-08-16 2005-04-26 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
USRE40061E1 (en) 1993-04-06 2008-02-12 Micron Technology, Inc. Multi-chip stacked devices
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
US20160379933A1 (en) * 2007-02-21 2016-12-29 Amkor Technology, Inc. Semiconductor package in package

Cited By (60)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5810839A (en) * 1981-07-14 1983-01-21 Mitsubishi Electric Corp Semiconductor device
JPS628033B2 (en) * 1981-07-14 1987-02-20 Mitsubishi Electric Corp
JPS5944853A (en) * 1982-09-06 1984-03-13 Toshiba Corp Semiconductor device
EP0221496A2 (en) * 1985-11-04 1987-05-13 International Business Machines Corporation Integrated circuit package
US5034350A (en) * 1987-09-23 1991-07-23 Sgs Thomson Microelectronics S.R.L. Semiconductor device package with dies mounted on both sides of the central pad of a metal frame
JPS6481348A (en) * 1987-09-24 1989-03-27 Hitachi Maxell Manufacture of semiconductor device
JPH0320051A (en) * 1989-03-20 1991-01-29 Seiko Epson Corp Semiconductor device mounting structure and mounting method and mounting device
US5530292A (en) * 1990-03-15 1996-06-25 Fujitsu Limited Semiconductor device having a plurality of chips
EP0473796A4 (en) * 1990-03-15 1994-05-25 Fujitsu Ltd Semiconductor device having a plurality of chips
US5463253A (en) * 1990-03-15 1995-10-31 Fujitsu Limited Semiconductor device having a plurality of chips
WO1991014282A1 (en) * 1990-03-15 1991-09-19 Fujitsu Limited Semiconductor device having a plurality of chips
US5147815A (en) * 1990-05-14 1992-09-15 Motorola, Inc. Method for fabricating a multichip semiconductor device having two interdigitated leadframes
WO1994005038A1 (en) * 1992-08-21 1994-03-03 Olin Corporation Metal electronic package incorporating a multi-chip module
US5504372A (en) * 1992-08-21 1996-04-02 Olin Corporation Adhesively sealed metal electronic package incorporating a multi-chip module
US5291061A (en) * 1993-04-06 1994-03-01 Micron Semiconductor, Inc. Multi-chip stacked devices
USRE36613E (en) * 1993-04-06 2000-03-14 Micron Technology, Inc. Multi-chip stacked devices
USRE40061E1 (en) 1993-04-06 2008-02-12 Micron Technology, Inc. Multi-chip stacked devices
US5724233A (en) * 1993-07-09 1998-03-03 Fujitsu Limited Semiconductor device having first and second semiconductor chips with a gap therebetween, a die stage in the gap and associated lead frames disposed in a package, the lead frames providing electrical connections from the chips to an exterior of the packag
US5579208A (en) * 1993-07-09 1996-11-26 Fujitsu Limited Semiconductor device having a plurality of semiconductor chips
US6005778A (en) * 1995-06-15 1999-12-21 Honeywell Inc. Chip stacking and capacitor mounting arrangement including spacers
US6051886A (en) * 1995-08-16 2000-04-18 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US6884657B1 (en) 1995-08-16 2005-04-26 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US5874781A (en) * 1995-08-16 1999-02-23 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
US6563205B1 (en) 1995-08-16 2003-05-13 Micron Technology, Inc. Angularly offset and recessed stacked die multichip device and method of manufacture
US5721452A (en) * 1995-08-16 1998-02-24 Micron Technology, Inc. Angularly offset stacked die multichip device and method of manufacture
EP0972307A4 (en) * 1995-12-19 2000-01-19 Micron Technology Inc Multi-chip device and method of fabrication employing leads over and under processes
EP0972307A1 (en) * 1995-12-19 2000-01-19 Micron Technology, Inc. Multi-chip device and method of fabrication employing leads over and under processes
US5898220A (en) * 1995-12-19 1999-04-27 Micron Technology, Inc. Multi-chip device and method of fabrication employing leads over and under processes
US5689135A (en) * 1995-12-19 1997-11-18 Micron Technology, Inc. Multi-chip device and method of fabrication employing leads over and under processes
US5952725A (en) * 1996-02-20 1999-09-14 Micron Technology, Inc. Stacked semiconductor devices
US6337227B1 (en) 1996-02-20 2002-01-08 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US6080264A (en) * 1996-05-20 2000-06-27 Micron Technology, Inc. Combination of semiconductor interconnect
US6989285B2 (en) 1996-05-20 2006-01-24 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US7371612B2 (en) 1996-05-20 2008-05-13 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US5801448A (en) * 1996-05-20 1998-09-01 Micron Technology, Inc. Conductive lines on the back side of wafers and dice for semiconductor interconnects
US5817530A (en) * 1996-05-20 1998-10-06 Micron Technology, Inc. Use of conductive lines on the back side of wafers and dice for semiconductor interconnects
US6784023B2 (en) 1996-05-20 2004-08-31 Micron Technology, Inc. Method of fabrication of stacked semiconductor devices
US5917242A (en) * 1996-05-20 1999-06-29 Micron Technology, Inc. Combination of semiconductor interconnect
US6175149B1 (en) * 1998-02-13 2001-01-16 Micron Technology, Inc. Mounting multiple semiconductor dies in a package
US6297547B1 (en) * 1998-02-13 2001-10-02 Micron Technology Inc. Mounting multiple semiconductor dies in a package
US6673650B2 (en) 1998-10-06 2004-01-06 Micron Technology, Inc. Multi chip semiconductor package and method of construction
US6458625B2 (en) 1998-10-06 2002-10-01 Micron Technology, Inc. Multi chip semiconductor package and method of construction
US6261865B1 (en) 1998-10-06 2001-07-17 Micron Technology, Inc. Multi chip semiconductor package and method of construction
US6118176A (en) * 1999-04-26 2000-09-12 Advanced Semiconductor Engineering, Inc. Stacked chip assembly utilizing a lead frame
US6762078B2 (en) 1999-05-20 2004-07-13 Amkor Technology, Inc. Semiconductor package having semiconductor chip within central aperture of substrate
US6395578B1 (en) 1999-05-20 2002-05-28 Amkor Technology, Inc. Semiconductor package and method for fabricating the same
US6798049B1 (en) 1999-08-24 2004-09-28 Amkor Technology Inc. Semiconductor package and method for fabricating the same
US6642610B2 (en) 1999-12-20 2003-11-04 Amkor Technology, Inc. Wire bonding method and semiconductor package manufactured using the same
US6803254B2 (en) 1999-12-20 2004-10-12 Amkor Technology, Inc. Wire bonding method for a semiconductor package
US6452278B1 (en) 2000-06-30 2002-09-17 Amkor Technology, Inc. Low profile package for plural semiconductor dies
US6552416B1 (en) 2000-09-08 2003-04-22 Amkor Technology, Inc. Multiple die lead frame package with enhanced die-to-die interconnect routing using internal lead trace wiring
US7485490B2 (en) 2001-03-09 2009-02-03 Amkor Technology, Inc. Method of forming a stacked semiconductor package
US6555917B1 (en) 2001-10-09 2003-04-29 Amkor Technology, Inc. Semiconductor package having stacked semiconductor chips and method of making the same
US6946323B1 (en) 2001-11-02 2005-09-20 Amkor Technology, Inc. Semiconductor package having one or more die stacked on a prepackaged device and method therefor
US6919631B1 (en) 2001-12-07 2005-07-19 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US6737750B1 (en) 2001-12-07 2004-05-18 Amkor Technology, Inc. Structures for improving heat dissipation in stacked semiconductor packages
US7154171B1 (en) 2002-02-22 2006-12-26 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US6879047B1 (en) 2003-02-19 2005-04-12 Amkor Technology, Inc. Stacking structure for semiconductor devices using a folded over flexible substrate and method therefor
US20160379933A1 (en) * 2007-02-21 2016-12-29 Amkor Technology, Inc. Semiconductor package in package
US9768124B2 (en) 2007-02-21 2017-09-19 Amkor Technology, Inc. Semiconductor package in package

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