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JPS55108771A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS55108771A
JPS55108771A JP1648979A JP1648979A JPS55108771A JP S55108771 A JPS55108771 A JP S55108771A JP 1648979 A JP1648979 A JP 1648979A JP 1648979 A JP1648979 A JP 1648979A JP S55108771 A JPS55108771 A JP S55108771A
Authority
JP
Japan
Prior art keywords
region
metal electrode
diffusion layer
electrode
window
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1648979A
Other languages
Japanese (ja)
Inventor
Masahide Ozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP1648979A priority Critical patent/JPS55108771A/en
Publication of JPS55108771A publication Critical patent/JPS55108771A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To heighten the withstanding voltage of a protective circuit by a method wherein impurities which can form a deep semiconductor joint containing phosphorus, etc. are used for a diffusion layer constituting an input gate protective circuit of a MOSFET integrated circuit and a diffusion layer under the portion where an input electrode is connected to the layer. CONSTITUTION:An n-type conductive region 5 is formed on the surface of a p-type silicon substrate 6 by the use of arsenic ions in such a way that the region has a junction depth of about 0.5mum. Next an n-type region 9 having a junction depth of 1.5-2mum is formed under the portion where the region 5 is connected to a metal electrode 3 by injecting phosphorus ions having a larger duffusion coefficient than that of arsenic. Thence after forming a field insulating film 4, a window 7 for the portion where the metal electrode and the diffusion layer are connected together to form the metal electrode 3, then a protective insulator 2 is formed on the electrode. After this, a window 10 for connecting an external lead is made, and the external lead 1 is connected to a metal electrode 8. By so doing, the joint of the region 9 is separated from a penetrating portion 8 by 1mum or more, and a sufficient distance can be maintained.
JP1648979A 1979-02-15 1979-02-15 Semiconductor device Pending JPS55108771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1648979A JPS55108771A (en) 1979-02-15 1979-02-15 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1648979A JPS55108771A (en) 1979-02-15 1979-02-15 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS55108771A true JPS55108771A (en) 1980-08-21

Family

ID=11917695

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1648979A Pending JPS55108771A (en) 1979-02-15 1979-02-15 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS55108771A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4503448A (en) * 1980-07-01 1985-03-05 Fujitsu Limited Semiconductor integrated circuit device with a high tolerance against abnormally high input voltage
JPS61263285A (en) * 1985-05-17 1986-11-21 Matsushita Electronics Corp semiconductor equipment
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5496382A (en) * 1978-01-17 1979-07-30 Toshiba Corp Semiconductor integrated circuit device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5496382A (en) * 1978-01-17 1979-07-30 Toshiba Corp Semiconductor integrated circuit device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4503448A (en) * 1980-07-01 1985-03-05 Fujitsu Limited Semiconductor integrated circuit device with a high tolerance against abnormally high input voltage
US4893157A (en) * 1984-08-24 1990-01-09 Hitachi, Ltd. Semiconductor device
JPS61263285A (en) * 1985-05-17 1986-11-21 Matsushita Electronics Corp semiconductor equipment
JPH0528511B2 (en) * 1985-05-17 1993-04-26 Matsushita Electronics Corp

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