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JPS5491040A - Flip-flop circuit - Google Patents

Flip-flop circuit

Info

Publication number
JPS5491040A
JPS5491040A JP15795777A JP15795777A JPS5491040A JP S5491040 A JPS5491040 A JP S5491040A JP 15795777 A JP15795777 A JP 15795777A JP 15795777 A JP15795777 A JP 15795777A JP S5491040 A JPS5491040 A JP S5491040A
Authority
JP
Japan
Prior art keywords
gate
input terminal
output
input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15795777A
Other languages
Japanese (ja)
Inventor
Kuniaki Shirai
Takashi Fukuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP15795777A priority Critical patent/JPS5491040A/en
Publication of JPS5491040A publication Critical patent/JPS5491040A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/027—Generators characterised by the type of circuit or by the means used for producing pulses by the use of logic circuits, with internal or external positive feedback
    • H03K3/037—Bistable circuits

Abstract

PURPOSE:To constitute a FF circuit which operates completely with an edge trigger pulse by improving logic margins by constituting the FF circuit by combining two D type FFs with a two-input NOR gate. CONSTITUTION:The 1st and 2nd D type FFs 7 and 8 and two-input NOR gate 9 are combined together to constitute the FF circuit; and output terminal OUT of output Qa of the 1st FF7, input terminal D6 of the 2nd FF8 and reset input terminal R6 are connected together, output Q6 of the 2nd FF8 is connected to one input terminal of NOR gate 9, and the clear signal input terminal is connected to the other input terminal of gate 9. The output of this gate 9 is connected reset input terminal Ra of the 1st FF to extract outputs from output terminals Qa and -Qa of FF7. In this constitution, the FF circuit is set and reset definitely when the SET input and RESET input rise.
JP15795777A 1977-12-28 1977-12-28 Flip-flop circuit Pending JPS5491040A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15795777A JPS5491040A (en) 1977-12-28 1977-12-28 Flip-flop circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15795777A JPS5491040A (en) 1977-12-28 1977-12-28 Flip-flop circuit

Publications (1)

Publication Number Publication Date
JPS5491040A true JPS5491040A (en) 1979-07-19

Family

ID=15661142

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15795777A Pending JPS5491040A (en) 1977-12-28 1977-12-28 Flip-flop circuit

Country Status (1)

Country Link
JP (1) JPS5491040A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196617A (en) * 1981-05-29 1982-12-02 Nec Home Electronics Ltd Phase difference detecting device
JPS60114022A (en) * 1983-11-25 1985-06-20 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Latch circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196617A (en) * 1981-05-29 1982-12-02 Nec Home Electronics Ltd Phase difference detecting device
JPS60114022A (en) * 1983-11-25 1985-06-20 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Latch circuit

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