JPH1032817A - Image decoding device and method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the computing frequency in a decoding mode and to attain the fast decoding processing by applying the different decoding operations to the conversion factors for each prescribed unit. SOLUTION: A CPU 2 carries out the processing, according to the key operation of an input part, while using a prescribed area of a work area RAM 4 as its work area, based on each type of control programs stored in a program ROM 3. The CPU 2 also performs the decoding processing, based on an image program of the control program stored in the ROM 3 and expands the compressed image data stored in a data ROM 6 or an FDD 8 into the RAM 4. The expanded image data undergo Huffman decoding, the reverse quantization and the IDCT conversion sequentially, from the 1st block through the final block with (8×8) dots defined as a block. Thus, the (8×8)-dot reproduction image data are generated. Then a display driver 9 stores the data, expanded into the RAM 4 in a display memory 10, under the control of the CPU 2 and then displays the image and sentence data, expanded into the memory 10 on a CRT 11 via the driver 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an image decoding apparatus and an image decoding method, and more particularly, to an image decoding apparatus and an image decoding method for performing IDCT conversion at high speed.

[0002]

2. Description of the Related Art JPEG (Jo
int Photographic Expert Group) or MPEG (Moving
Picture Expert Group). JPEG aims at compressing a still image, and a coding method of a color still image has already been determined and has been approved as an international standard. As for JPEG, chips have also been commercialized, and boards using these chips have begun to appear on the market.
The JPEG algorithm is roughly divided into two compression methods. The first method is DCT (Discrete Cosine Transf
orm: discrete cosine transform), and the second method is DPCM (Differntial PCM) in a two-dimensional space.
Is a Spatial (spatial function) method that performs In general, the DCT method is lossy coding in which the original image is not completely reproduced because it includes quantization. However, sufficient decoding image quality can be obtained even with a small number of bits, and the DCT method is a basic method of the present algorithm. is there. On the other hand, the Spatial method is a reversible coding that has a small compression ratio but completely reproduces the original image, and is a method added as a standard method to realize this characteristic.

[0003] The DCT method further includes a baseline process (Baseline System) which is an essential function and an extended DCT process (Extended System) which is an optional function.
Are classified into two types. Apart from these methods, there is a hierarchical process that combines the above methods to achieve progressive build-up. The baseline process is an algorithm based on the Adaptive Discrete Cosine Transform Coding (ADCT), which is the minimum function that all encoders / decoders that realize the DCT must have. It is. In image compression in the above baseline process, image data is processed in blocks of 8 × 8 dots. The processing process is as follows. (1) Two-dimensional DCT processing (2) DCT coefficient quantization processing (3) Entropy coding processing In the two-dimensional DCT processing, spatial data is converted into frequency data, and 64 DCT coefficients are output. At this time, the color components are (Y, CB, CR). As shown in FIG. 12, the upper left coefficient in the matrix among these coefficients is called a DC component and is an average value of block data. The remaining 63 coefficients are called AC components.

In the DC component quantization process, DCT coefficients are linearly quantized using a quantization matrix in which a quantization step size having a different size is set for each coefficient by a quantizer. However, in order to control the code amount or the decoded image quality, quantization is performed using a value obtained by multiplying a quantization matrix by a coefficient (scaling factor) specified from the outside as an actual matrix value. In this way, the 64 DCT coefficients are quantized into integer values while referring to the table. This quantization process results in lossy compression. The contents of the reference table used are not specified in JPEG. The quantization table is created in consideration of human visual characteristics. Since humans are not sensitive to visual information of high-frequency components, these high-frequency components are roughly quantized.

In the entropy coding process, first, the difference between the DC component and the quantized DC component in the block on the left is calculated and coded. This method is called DPCM. The AC component has a zigzag
It is converted into a one-dimensional array by scanning. Huffman coding is used in the entropy coding of the baseline process. In the Huffman coding process, it is determined whether or not each coefficient is zero, and a continuous zero coefficient has its length counted as a run length. When a non-zero coefficient comes, two-dimensional Huffman coding is performed by combining the quantization result and the run length of the zero coefficient up to that time. D
The Huffman coding of the C / AC coefficients is based on a given Huffman code table, but the quantization matrix and the Huffman code table have no default values in order to be optimal in the situation used, and Transfer from encoder to decoder for use.

Further, when decoding a compressed image,
In the reverse path, each process of entropy decoding, inverse quantization, and two-dimensional IDCT (Inverse Discrete Cosine Transform) is performed.

[0007] One block of image data (8 x 8 dot image data) is converted to a normal matrix operation: gi (output matrix) =
One-dimensional DCT by C ^t (transformation matrix) × Fi (input matrix)
Alternatively, when the IDCT transform is performed, 64 times of multiplication and addition / subtraction are required for the conversion of one column, and when the two-dimensional DCT or the IDCT transform is performed, 1024 times.
It is necessary to perform the product-sum operation twice. Therefore, two-dimensional DCT
Alternatively, when performing the IDCT conversion, there is a problem that the number of product-sum operations is large and a large amount of operation time is required.

Therefore, recently, a high-speed algorithm for IDCT conversion has been researched and developed. For example, a method of performing IDCT processing at high speed by reducing the number of product-sum operations in IDCT is described in the reference "Z. Wang," Fast algorithms for t.
he discrete W transformand for the discrete Fourie
r transform, "IEEE Trans. Acount., Speech, andSigna
l Process., vol.ASSP-32, pp.803-816, Aug.1984, and N.Suehiro and M.Hatori, "Fast algorithms for the
DFT and other sinusoidal transform. "IEEE Trans.A
coust., Speech, and Signal Process., vol.ASSP -34.p
p.642-644, June 1986. "
Both references are referred to as "Suehiro's algorithm."

The "Suehiro's algorithm" will be described below with reference to FIGS. FIG. 13 is a schematic diagram showing a two-dimensional IDCT transform by “Suehiro's algorithm”, and FIG. 14 is a one-dimensional IDCT transform shown in FIG.
It is a signal flow figure of a conversion part.

In FIG. 13, this input is each column vector Fi (i = 0 ,,,, 7) of the DCT transformation matrix, and the first 1
The transpose of the dimensional output is the row vector gi (i = 0 ,,,,,
7) and becomes the input of the next one-dimensional IDCT transformation. Then, a final column vector Xi (i = 0 ,,,, 7) obtained by subjecting the row vector gi (i = 0 ,,,, 7) to IDCT conversion is output.

FIG. 14 shows a column vector Fi (i = 0 ,,,, 7).
Is a one-dimensional DCT transform and transposed row vector gi (i =
0 ,,,, 7). here,
Node (circle) tij: indicates the result of addition of the two input values on the left, -1 on the arrow indicates the sign inversion of the value on the left, and x (constant) indicates the value on the left. Shows the integration with the value of. According to the “Suehiro algorithm”, the number of multiplications for one block is 1024 (8 × 8
× 8 × 2) to 176 times and the number of additions from 1024 to 46
It is reduced to four times. A system that realizes this "Suehiro algorithm" by software can perform encoding or decoding of image data at high speed.

[0012]

However, in "Suehiro's algorithm", when performing IDCT conversion, DCT
Since the calculation is also performed on the zero coefficient included in the T conversion matrix, there is a problem that the number of calculations is large and the speed of the IDCT conversion is slow.

The present invention has been made in view of the above problems, and has as its object to provide an image decoding apparatus and an image decoding method capable of performing high-speed IDCT conversion.

[0014]

According to a first aspect of the present invention, there is provided an image decoding apparatus for decoding a transform coefficient of image data encoded for each predetermined unit. Zero coefficient detecting means for detecting the amount of continuous zero coefficients among the transform coefficients, and performing different decoding on the transform coefficients for each predetermined unit in accordance with the amount of the continuous zero coefficients detected by the zero coefficient detecting means. The above problem is solved by providing decoding means.

That is, according to the image decoding apparatus of the first aspect, in the image decoding apparatus for decoding the transform coefficient of the image data encoded for each predetermined unit, the zero coefficient detecting means includes: The decoding unit detects the amount of the continuous zero coefficient among the conversion coefficients for each predetermined unit, and the decoding unit changes the conversion coefficient for each predetermined unit in accordance with the amount of the continuous zero coefficient detected by the zero coefficient detection unit. Perform decryption.

Therefore, the number of operations in decoding can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

In this case, as in the image decoding apparatus according to the second aspect, the encoding means is an orthogonal transformation means and a quantization means, and the decoding means is an inverse quantization means and an inverse orthogonal transformation. A plurality of inverse orthogonal transforming means for performing different inverse orthogonal transforms on the transform coefficients after the inverse quantization into transform coefficients for each predetermined unit according to the amount of the continuous zero coefficient. It is effective to have a conversion means.

That is, according to the image decoding apparatus of the second aspect, in the image decoding apparatus of the first aspect, the orthogonal transformation means and the quantization means encode the image data, and the decoding means performs the inverse quantization. Transforming means and inverse orthogonal transforming means, wherein the inverse orthogonal transforming means performs, on the transform coefficient after the inverse quantization, a different inverse orthogonal transform into transform coefficients for each predetermined unit according to the amount of continuous zero coefficients. And a plurality of inverse orthogonal transform means.

Therefore, it is possible to reduce the number of operations in the inverse orthogonal transform. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

In this case, according to the image decoding apparatus of the third aspect, in the image decoding apparatus of the first aspect, the decoding means includes a zero coefficient detected by the continuous zero coefficient detecting means. It is effective to provide a selecting means for selecting one of the plurality of decoding means depending on the amount of the decoding means.

That is, according to the image decoding device of the third aspect, in the image decoding device of the first aspect, the selection unit included in the decoding unit includes a zero signal detected by the continuous zero coefficient detection unit. One of the plurality of decoding means is selected according to the amount of the coefficient.

Therefore, one of a plurality of decoding means is selected for decoding the coded image data in accordance with the amount of the continuous zero coefficient of the conversion coefficient for each predetermined unit, and decoding is performed. Therefore, the number of operations in decoding can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

According to a fourth aspect of the present invention, there is provided an image decoding method for decoding a conversion coefficient of image data coded for each predetermined unit. A plurality of decoding processes corresponding to the amount of the zero coefficient to be performed, and detecting the amount of the continuous zero coefficient among the transform coefficients for each of the predetermined units; and A step of selecting one of the plurality of decoding processes and performing the decoding process on the basis of the plurality of decoding processes.

According to a fourth aspect of the present invention, there is provided an image decoding method for decoding a conversion coefficient of image data coded for each predetermined unit. It has a plurality of decoding processes corresponding to the amount of the continuous zero coefficient, detects the amount of the continuous zero coefficient among the transform coefficients for each of the predetermined units, and, based on the detected amount of the continuous zero coefficient. Then, one of the plurality of decoding processes is selected to perform the decoding process.

Therefore, it is possible to reduce the number of operations in decoding. As a result, high-speed decoding processing can be performed, and a high-speed image decoding method can be provided.

In this case, as in the image decoding method according to a fifth aspect, the encoding processing is an orthogonal transformation processing and a quantization processing, and the decoding processing is an inverse quantization processing and an inverse orthogonal transformation. Processing, the inverse orthogonal transform process has a plurality of inverse orthogonal transform processes corresponding to the amount of continuous zero coefficients, and a plurality of inverse orthogonal transform processes corresponding to the amount of the continuous zero coefficients. It is effective to perform one of the following.

That is, according to the image decoding method of the fifth aspect, the encoding process is executed by the orthogonal transform process and the quantization process, and the decoding process is executed by the inverse quantization process and the inverse orthogonal transform process. , The inverse orthogonal transform process includes a plurality of inverse orthogonal transform processes corresponding to the amount of continuous zero coefficients, and one of the plurality of inverse orthogonal transform processes corresponding to the amount of the continuous zero coefficients. Execute

Therefore, it is possible to reduce the number of operations in the inverse orthogonal transform. As a result, high-speed decoding processing can be performed, and a high-speed image decoding method can be provided.

In this case, according to the image decoding method of the sixth aspect, in the image decoding method of the fourth aspect, the encoding processing includes orthogonal transformation processing, quantization processing, and variable length encoding. The decoding process is a variable-length encoding process, an inverse quantization process, and an inverse orthogonal transform process. The inverse orthogonal transform process includes a plurality of inverse orthogonal transform processes corresponding to the amount of continuous zero coefficients. And detecting the amount of the continuous zero coefficient comprises detecting the amount of the continuous zero coefficient based on the code length in the variable-length encoding process, and selecting and decoding the selected zero coefficient. , One of the plurality of inverse orthogonal transform processes based on the detected amount of consecutive zero coefficients.
It is effective to select one and execute the inverse orthogonal transform process.

In this case, as in the image decoding method according to the sixth aspect, in the image decoding method according to the fourth aspect, the encoding processing includes orthogonal transformation processing, quantization processing, and variable length encoding processing. Yes, the decoding process is a variable length encoding process, an inverse quantization process, and an inverse orthogonal transform process, and the inverse orthogonal transform process has a plurality of inverse orthogonal transform processes corresponding to the amount of continuous zero coefficients. Detecting the amount of the continuous zero coefficient includes detecting the amount of the continuous zero coefficient based on the code length in the variable-length encoding process, and determining the amount of the continuous zero coefficient based on the detected amount of the continuous zero coefficient. It is effective to select one of the plurality of inverse orthogonal transform processes and execute the inverse orthogonal transform process.

Therefore, for the encoded image data, one of a plurality of decoding processes is selected in accordance with the amount of continuous zero coefficients of the conversion coefficient for each predetermined unit, and inverse orthogonal transform is performed. With this configuration, it is possible to reduce the number of operations in the inverse orthogonal transform. As a result, high-speed decoding processing can be performed, and a high-speed image decoding method can be provided.

[0032]

Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. 1 to 10 are diagrams showing an embodiment of a computer system to which an image decoding device and an image decoding method according to the present invention are applied. In the present embodiment, the compression and decoding of the image data are performed in accordance with the JPEG algorithm described in the above “Prior Art”.

FIG. 1 is a block diagram showing a main configuration of a computer system 1 to which the present invention is applied. The computer system 1 shown in FIG.
OM3, work area RAM4, data ROM driver 5,
It comprises a data ROM 6, an FDD driver 7, an FDD 8, a display driver 9, a display memory 10, a CRT 11, a printer driver 12, a printer 13, and the like.

The CPU 2 executes a work area RA based on various control programs stored in the program ROM 3.
While using a predetermined area in the M4 as a work area, processing corresponding to operation of each key of an input unit (not shown) is executed to control each unit of the computer system 1.

The CPU 2 executes an image decoding process (to be described later) (see FIGS. 2 to 11) in accordance with an image decoding program stored in the program ROM 3, and outputs data RO.
The compressed image data stored in M6 or FDD8 is
The compressed image data is expanded in the work area RAM 4 and subjected to processing such as Huffman decoding, inverse quantization, and IDCT to generate expanded image data.

The program ROM 3 stores various control programs and control data. The various control programs include the above-described image decoding program and image compression program. The control data includes the control data for the above-described image decoding process. There are a quantization table and a Huffman coding table used.

The work area RAM 4 is used as a work memory of the CPU 2 and temporarily stores input data, image data, processing results, and the like.

The data ROM driver 5 reads and writes data stored in the data ROM 6 under the control of the CPU 2. The data ROM 6 is an optical storage medium such as a CD-ROM for storing compressed image data, audio data, and the like.

The FDD driver 7 reads and writes data stored in the FDD 8 under the control of the CPU 2. The FDD 8 is a magnetic storage medium for storing text data, compressed image data, and the like.

The display driver 9, under the control of the CPU 11, temporarily stores the data developed in the work area RAM 4 in the display memory 10 and then drives the display on the CRT 11, and the display memory 10 stores the data to be displayed on the CRT 11. Is temporarily stored in the buffer memory, and CR
T11 is the time when the display memory 1 is driven by the display driver 9.
This is a color display unit that displays image data and text data expanded to 0.

The printer driver 12 drives the printer 13 to output print data supplied from the CPU 2 under the control of the CPU 2. Further, the printer 13 outputs the input print data in color print by driving of the printer driver 12.

Next, the operation of this embodiment will be described. Hereinafter, an image decoding process executed under the control of the CPU 2 according to the image decoding program stored in the program ROM 3 will be described with reference to FIGS.

First, the overall operation of the image decoding process is shown in FIG.
This will be described with reference to FIGS. FIG. 2 is a flowchart for explaining the overall operation of the image decoding process. FIG. 3 is a schematic block diagram showing the process of the image decoding process. FIG. 4 is a diagram showing a specific image data decoding process in the image decoding process.

The correspondence of the variables used in FIGS. 2 to 4 is shown below. N: represents the horizontal dot size of the image. M: represents the vertical dot size of the image. i: a block loop counter indicating which block to decompress DP: a decode pointer indicating the decompression position of the compressed image data.

Next, the overall algorithm of the image decoding process will be described with reference to FIG. In the decoding process, the compressed image data stored in the data ROM 6 or the FDD 8 is expanded in the work area RAM 4, and the expanded compressed image data is one block from the upper left corner of the image using 8 × 8 dots as a block unit. Decoding is performed sequentially for each block. In FIG. 2, first, a block loop counter i and a decode pointer DP are initialized, and DP = 0 and i = 1 are set (step S1).

Through the following steps S2 to S4, the compressed image data is sequentially decoded one block at a time from the first block to the last block (N / 8) × (M / 8) block (Huffman decoding). , Inverse quantization, and IDC
T conversion).

First, the compressed image data of the i-th block specified by the decode pointer DP is decoded, and the decode pointer DP is incremented by the Huffman code length corresponding to the i-th block (step S2). Where JPE
The decoding process of one block of the compressed image data of the G system is as follows.
As shown in FIG. 3, the process of decoding the quantized DCT coefficients by Huffman decoding the encoded compressed image data and inversely quantizing the decoded quantized DCT coefficients based on a quantization table to generate DCT coefficients. And a step of generating reproduced image data of a block of 8 × 8 dots by performing a two-dimensional IDCT conversion of the DCT coefficient.

Then, the value of the block loop counter i is incremented by "1" (step S3). Next, it is determined whether or not the value of the block loop counter i is smaller than N / 8 × M / 8, which is the last block (step S4), and the value of the block loop counter i is (N / 8).
If it is smaller than (M / 8), the process proceeds to step S2 to repeat the process of decoding the compressed image data of the i-th block, while the block loop counter value i is N / 8 × M
In the case of / 8, the image decoding process ends.

Next, a specific example of the decoding of the compressed image data in step S2 will be described.

For example, with respect to the encoded compressed image data as shown in FIG. 4A, the compressed image data of the i-block designated by the decode pointer DP is converted into a DC component,
Each AC component is decoded by the Huffman method, one-dimensional data is converted into zigzag one-dimensional data into two-dimensional data, and the data is converted into eight as shown in FIG.
Decode the × 8 quantized DCT coefficients. Since the Huffman coding method is reversible coding, the quantized DCT coefficients are reversibly decoded.

Subsequently, the quantized DC shown in FIG.
The T coefficient is quantized using a quantization table as shown in FIG. 4E having 64 different values for each quantized DCT coefficient position. That is, a DCT coefficient matrix as shown in FIG. 4C is generated by multiplying each quantized DCT coefficient by the quantization table value at the corresponding coefficient position. Then, two-dimensional IDCT transformation is performed on the DCT coefficient matrix shown in FIG. 4C to generate reproduced image data of an 8 × 8 dot block as shown in FIG. 4D. by the way,
As shown in FIG. 4C, the inversely quantized DCT coefficient matrix contains a large amount of zero coefficients. The present invention proposes a method of performing the IDCT transform at high speed by reducing the number of times of calculating the zero coefficient in the two-dimensional IDCT transform. Such a method will be described below.

Next, a specific algorithm of the two-dimensional IDCT conversion will be described with reference to FIGS. FIG.
FIG. 3 is a schematic block diagram showing a detailed process of the two-dimensional IDCT process of FIG. 2. FIG. 6 is a signal flow diagram of a plurality of IDCT arithmetic expressions used in the one-dimensional IDCT transform. FIG. 7 is a diagram showing a transformation matrix that is the basis of the TYPEI signal flow diagram of FIG. FIG.
FIG. 7 is a diagram showing an example in which the transformation determinant shown in FIG. FIG. 9 is a flowchart for explaining the one-dimensional IDCT processing. FIG. 10 shows the one-dimensional IDC shown in FIG.
FIG. 9 is a diagram illustrating an IDCT process of specific image data in T processing.

The correspondence of variables used in FIGS. 5 to 10 is shown below. F: 8 × 8 DCT coefficient matrix (input matrix) g: output matrix i: column number of matrix F j: after the element Fki (k = 0 ,,,,,, 7) having i columns, all 0s The minimum value of k (Fki = 0, Fk + 1, i = 0,..., F7i = 0), that is, an index indicating where the matrix value becomes 0, and a zero coefficient from the last row Corresponding to a continuous value of.

In the two-dimensional IDCT conversion process shown in FIG. 3, two one-dimensional ICTs are performed as shown in FIG.
Performed by DCT transformation and transposition. That is, the DCT coefficient matrix of the block of 8 × 8 dots is subjected to one-dimensional IDCT transform for each column (in the horizontal direction), and the result is returned to the same column. Subsequently, the obtained matrix is transposed, and one-dimensional IDCT transformation is similarly performed using the transposed matrix as an input to generate reproduced image data of an 8 × 8 dot block. The transposition can be executed by storing the matrix subjected to the one-dimensional IDCT conversion in a predetermined area of the work area RAM 4 and reading the matrix in the vertical direction by changing the read address order.

Incidentally, in the present invention, a plurality of arithmetic algorithms are used together in order to reduce the number of times of calculation of the zero coefficient of the inversely quantized DCT coefficient matrix. FIG. 6 shows TY used in the one-dimensional IDCT transform in the present invention.
FIG. 14 is a signal flow diagram of four IDCT arithmetic expressions of PEI to IV. In FIG. 6, a circle (node) tij indicates a result of addition of two input values on the left. -1 on the arrow
Means that the sign of the value on the left is inverted,
(Constant) means to take the product with the value on the left.

The TYPEI type is a signal flow diagram of the algorithm proposed by Suehiro described in the above “prior art”. This signal flow diagram corresponds to the determinant shown in FIG.
When gi (output sequence) = C ^t (transform matrix) × Fi (input matrix), the transform matrix C ^t is based on an expression obtained by decomposing the transform matrix into a sparse matrix including a butterfly matrix and a cyclic matrix as shown in FIG. Generally, when the transformation matrix can be decomposed into a sparse matrix, it is possible to execute a high-speed algorithm. In the TYPEI type algorithm, 11 multiplications and 29 additions and subtractions are required to perform one column of IDCT conversion as shown in FIG.

In the TYPEII type, all the operation parts of the input strings F2i to F7i are deleted in the TYPEI type, and the TYPEII type algorithm requires four multiplications and ten additions / subtractions to perform one column of IDCT conversion. .

The TYPE III type is a flow in which the value of F0i of the input sequence is output to the output sequences g0i to g7i, and all the operation parts are deleted. In the TYPE III type algorithm, the number of product-sum operations is zero. .

In the TYPEIV type, "0" is output from the output column g0i to
g7i, and all the operation parts are deleted, and the number of product-sum operations becomes zero.

Next, the algorithm of the one-dimensional IDCT conversion processing will be described with reference to the flowchart of FIG. First, the column number i of the DCT coefficient matrix F is initialized so that i = 0
And the column number of the DCT coefficient matrix F is set as the head (step S10). Next, processing for determining the value of j is performed in steps S11 to S13. In step S11,
It is determined whether or not j is greater than 1, and if j is greater than 1, the process proceeds to step S12. If j is 1 or less, the process proceeds to step S13.

In step S12, it is determined whether or not j = 2. If j ≠ 2 is not satisfied, that is, if j ≧ 3, TYPEI type IDCT processing is performed on the column i (step S14). If, on the other hand, j = 2, TYPE II IDCT processing is performed on the i-th column (step S15), and the process proceeds to step S18.

In step S13, it is determined whether or not j = 0. If j ≠ 0, that is, if j = 1, TYPE III type IDCT processing is performed on the column i (step S16). On the other hand, if j = 0, TYPEIV IDCT processing is performed on the i-th column (step S17), and the process proceeds to step S18.

Next, the column number i of the DCT transformation matrix F is incremented by "1" (step S18), and it is determined whether or not the column number i of the DCT transformation matrix F is smaller than 8.
If column number i is 8 or more, IDCT up to the last column
When it is determined that the process is completed and the flow is terminated, while the column number i of the DCT transform matrix F is smaller than 8, the processes of steps S11 to S18 are performed, and the column number i of the DCT transform matrix F is The process is performed until the value reaches 8 (step S19).

That is, in the one-dimensional IDCT process, the value of the minimum row in which zero coefficients continue from the last row: j (corresponding to the continuous value of zero coefficients from the last row) is determined for each column of the DCT coefficient matrix. Then, based on this determination value, TYPEI
Any IDC from the IDCT operation formula of TYPEIV
The T operation expression is selected, and IDCT processing is performed based on the IDCT operation expression selected for each column. Specifically, when j = 0, TYPEIV type, and when j = 1, TYPEII
The IDCT processing of the I type, the TYPE II type when j = 2, and the TYPE type IDCT processing when j ≧ 3 is performed.

Next, a specific example of the one-dimensional IDCT processing shown in FIG. 9 will be described with reference to FIG. The two-dimensional IDCT process shown in FIG. 10 shows the process from (D) to (E) in FIG. 4 in detail. First, when a one-dimensional IDCT process according to the flowchart of FIG. 9 is performed on the DCT coefficient matrix shown in FIG. 10A, a matrix as shown in FIG. 10B is generated. That is, in the DCT coefficient matrix shown in FIG. 10A, 0 column {256, −84, 0,
−14, 0, 0, 0,｝ becomes j = 4 and is a TYPEI type,
One row {44,36, -13,0,0,0,0} is j = 3
TYPEI type, 2 columns {−20,0,0,0,0,
0,0} is j = 1, and the type III type, and the third to seventh columns {0,0,0,0,0,0,0} are j = 0, and the type VI type IDCT processing is performed. Therefore, FIG.
When the one-dimensional IDCT process according to the flowchart of FIG. 9 is performed on the DCT coefficient matrix shown in FIG.
11 × 2 + 4) multiplications and 68 (= 29 × 2 + 10) additions / subtractions are required.

Next, the one-dimensional I shown in FIG.
The matrix after the DCT transformation is transposed to generate a transposed matrix as shown in FIG. When one-dimensional IDCT processing according to the flowchart of FIG. 9 is performed on the matrix shown in FIG. 10C, reproduced image data of an 8 × 8 dot block as shown in FIG. 10B is generated. In the transposed matrix after the one-dimensional IDCT transformation shown in FIG.
The values of j for (= 0,1,2,3,4,5,6,7) are all (3,3,3,3,3,3,3), and all columns are TYPEI type and IDCT processed Is performed. Therefore, when the one-dimensional IDCT processing according to FIG. 10C is executed, 88 (= 11 × 8) multiplications and 232 (= 2
9 × 8) additions and subtractions are required. Therefore, FIG.
When the two-dimensional IDCT process is performed on the DCT coefficient matrix shown in (A), the multiplication necessary to output one block of reproduced image data is 114 (= 26 + 88) times, and the addition / subtraction is 300 (= 68 + 232). Times, a total of 414
It requires multiple product-sum operations.

On the other hand, in the case of the ordinary one-dimensional IDCT transformation gi = Ct × Fi matrix operation shown in the above-mentioned prior art, one column is always irrespective of the amount of the zero coefficient included in the DCT transformation matrix. Requires 64 multiplications and additions / subtractions for the conversion of .times.
It is necessary to perform the product-sum operation twice. Further, in the “Suehiro” algorithm, it is necessary to always perform 176 multiplications and 464 additions and subtractions and to perform a total of 640 multiply-accumulate operations, as described above, regardless of the amount of zero coefficients included in the DCT transform matrix. is there. Therefore, in the present embodiment, the two-dimensional ID
The number of product-sum operations in the CT operation can be reduced to about 2/5 as compared with a normal matrix operation, and can be reduced to about 2/3 as compared to Suehiro's algorithm. It is possible to greatly reduce the number of sum operations. As a result, the IDCT operation can be performed at high speed.

In the above-described embodiment, the configuration in which the IDCT process is executed by software has been described. However, the IDCT process may be executed by hardware. FIG. 11 shows an example of the IDCT operation circuit. The one-dimensional IDCT operation circuit shown in FIG.
An input buffer 20, a zero detection circuit 21, a switching circuit 22,
It is composed of the TYPEI to IV type arithmetic circuits 23 to 26, an output buffer 27, and the like. As shown in FIG. 11, column data F0i to F7i of the DCT transformation matrix F are serially input to the input buffer 20, and the column data F0i to
For F7i, the zero detection circuit 21 performs zero detection to j
And outputs the calculated value of j to the switching circuit 22. The switching circuit 22 sets TYPEI to IV according to the value of j.
Are selectively selected to output column data F0i to F7i. TYPEI ~
In the IV operation circuits 23 to 26, the input column data F0i
After performing the IDCT conversion on F7i to F7i, output matrices g0i to g7i are output to the output buffer 27. Although the block diagram shown in FIG. 11 shows an example of the one-dimensional IDCT transform, the transposed matrix obtained by transposing the output matrices g0i to g7i by the transposed circuit is converted to a zero detection circuit, a switching circuit, and a TYPEI to
One-dimensional IDCT conversion is again performed by an IV type arithmetic circuit,
A configuration for performing two-dimensional IDCT conversion may be adopted.

As described above, in the present embodiment, when the DCT coefficient is subjected to the IDCT transform, the DCT coefficient matrix is converted into the value of the minimum row in which the zero coefficient continues from the last row for each column (the zero coefficient from the last row). Corresponding to the continuous value of
Based on this determination value, the IDCT operation is performed by selecting one of a plurality of IDCT expressions from a plurality of IDCT expressions for each column, so that the operation of the zero coefficient can be eliminated, and the IDCT processing can be omitted. The number of operations can be reduced. As a result, high-speed IDCT processing can be performed, and a high-speed image decoding device can be provided.

In this embodiment, the two-dimensional I
Since the DCT transform processing is performed by two one-dimensional IDCT transforms and transposition, it is possible to perform the two-dimensional IDCT transform at a higher speed.

In the above-described embodiment, the DC
I used in one-dimensional IDCT transformation of T coefficient matrix
Although the above four types of TYPEI to IV were used as DCT arithmetic expressions, the present invention is not limited to these,
Any arithmetic expression that can reduce the number of zero coefficient operations may be used.

In the above embodiment, J
Although the PEG algorithm is adopted, the present invention is not limited to this, and any algorithm including DCT or IDCT may be used. 261 and MP
Of course, it may be applied to the EG algorithm.

Further, in the present embodiment, the order of the IDCT transform is set to 8, but the present invention is not limited to this, and any order of 2N (N is a natural number) may be used.

In the above embodiment, the IDCT
Although an example of the conversion has been described, the DCT conversion can be performed at a high speed by performing the reverse process in the signal flow illustrated in FIG. 6, and a high-speed image encoding device can be provided.

Further, in the present embodiment, the image decoding apparatus and the image decoding method according to the present invention are applied to a computer system, but the present invention is not limited to this. Can also be applied.

[0076]

As described above, according to the image decoding apparatus of the first aspect, it is possible to reduce the number of operations in decoding. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

According to the image decoding apparatus of the second aspect, the number of operations in the inverse orthogonal transform can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

According to the image decoding apparatus of the present invention, a plurality of decoding means are provided for the encoded image data in accordance with the amount of continuous zero coefficients of the conversion coefficient for each predetermined unit. Is selected to perform decoding, so that the number of operations in decoding can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding device can be provided.

According to the image decoding method of the fourth aspect, the number of operations in decoding can be reduced. As a result, high-speed decryption processing can be performed,
It is possible to provide a high-speed image decoding method.

According to the image decoding method of the fifth aspect, the number of operations in the inverse orthogonal transform can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding method can be provided.

According to the image decoding method of the present invention, a plurality of decoding processes are performed on the coded image data in accordance with the amount of the continuous zero coefficient of the conversion coefficient for each predetermined unit. Is selected to perform the inverse orthogonal transform, so that the number of operations in the inverse orthogonal transform can be reduced. As a result, high-speed decoding processing can be performed, and a high-speed image decoding method can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main configuration of a computer system 1 to which the present invention is applied.

FIG. 2 is a schematic block diagram for explaining an entire process of an image decoding process.

FIG. 3 is a flowchart for explaining the overall operation of the image decoding process.

FIG. 4 is a diagram illustrating a specific image data decoding process in the image decoding process.

FIG. 5 is a schematic block diagram showing a detailed process of the two-dimensional IDCT process of FIG. 2;

FIG. 6 is a signal flow diagram of a plurality of IDCT arithmetic expressions used in one-dimensional IDCT transformation.

FIG. 7 is a diagram showing a transformation determinant on which the TYPEI signal flow diagram of FIG. 6 is based;

8 is a diagram showing an example in which the transformation determinant shown in FIG. 7 is expanded into a sparse matrix.

FIG. 9 is a flowchart illustrating a one-dimensional IDCT process;

FIG. 10 is a diagram showing an IDCT process of specific image data in the IDCT process shown in FIG. 9;

11 is a circuit configuration diagram when the IDCT shown in FIG. 10 is executed by hardware.

FIG. 12 is a diagram showing a transmission order of two-dimensional DCT coefficients.

FIG. 13: Two-dimensional ID by “Suehiro's algorithm”
Schematic diagram showing CT processing

14 is a signal flow of the one-dimensional IDCT converter in FIG.

[Explanation of symbols]

 Reference Signs List 1 computer system 2 CPU 3 program ROM 4 work area RAM 5 data ROM driver 6 data ROM 7 FDD driver 8 FDD 9 display driver 10 display memory 11 CRT 12 printer driver 13 printer 20 input buffer 21 zero detection circuit 22 switching circuit 23 TYPEI Arithmetic Circuit 24 Arithmetic Circuit of TYPEII 25 Arithmetic Circuit of TYPEIII 26 Arithmetic Circuit of TYPEIV 27 Output Buffer

Claims (6)

[Claims] An image decoding apparatus for decoding a conversion coefficient of image data encoded for each predetermined unit, wherein a zero coefficient for detecting an amount of continuous zero coefficients among the conversion coefficients for each predetermined unit. Image decoding, comprising: detecting means; and decoding means for performing different decoding on transform coefficients for each predetermined unit in accordance with the amount of continuous zero coefficients detected by the zero coefficient detecting means. Device. 2. The encoding means comprises orthogonal transform means and quantization means; the decoding means comprises inverse quantization means and inverse orthogonal transform means; and the inverse orthogonal transform means comprises the inverse quantization means. 2. The image according to claim 1, further comprising a plurality of inverse orthogonal transform means for performing a different inverse orthogonal transform on a subsequent transform coefficient into a transform coefficient for each predetermined unit according to the amount of the continuous zero coefficient. Decryption device. 3. The decoding means according to claim 2, wherein said decoding means has a selecting means for selecting one of said plurality of decoding means according to an amount of zero coefficients detected by said continuous zero coefficient detecting means. Item 2. The image decoding device according to Item 1. 4. An image decoding method for decoding a transform coefficient of image data encoded for each predetermined unit, comprising: decoding a plurality of decoding coefficients corresponding to an amount of continuous zero coefficients among transform coefficients for each predetermined unit. Detecting the amount of continuous zero coefficients among the transform coefficients for each of the predetermined units; and detecting one of the plurality of decoding processes based on the detected amount of continuous zero coefficients. Selecting an image and performing a decoding process. 5. The encoding process is an orthogonal transform process and a quantization process, and the decoding process is an inverse quantization process and an inverse orthogonal transform process. Has a plurality of inverse orthogonal transform conversion processes corresponding to the amount,
5. The method according to claim 4, wherein one of a plurality of inverse orthogonal transform processes is performed in accordance with the amount of the continuous zero coefficient.
The image decoding method as described in the above. 6. The encoding process is an orthogonal transformation process, a quantization process, and a variable length encoding process, and the decoding process is
Variable-length encoding processing, inverse quantization processing and inverse orthogonal transformation processing, wherein the inverse orthogonal transformation processing has a plurality of inverse orthogonal transformation processing corresponding to the amount of continuous zero coefficients, The step of detecting the amount detects the amount of the continuous zero coefficient based on the code length in the variable length encoding process, and the step of selectively decoding performs the amount of the detected continuous zero coefficient. 5. The image decoding method according to claim 4, wherein one of the plurality of inverse orthogonal transform processes is selected based on the first and second orthogonal orthogonal transform processes to execute the inverse orthogonal transform process.