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JPH03183151A - Electrostatic chuck plate - Google Patents

Electrostatic chuck plate

Info

Publication number
JPH03183151A
JPH03183151A JP1322093A JP32209389A JPH03183151A JP H03183151 A JPH03183151 A JP H03183151A JP 1322093 A JP1322093 A JP 1322093A JP 32209389 A JP32209389 A JP 32209389A JP H03183151 A JPH03183151 A JP H03183151A
Authority
JP
Japan
Prior art keywords
electrode
chuck plate
electrostatic chuck
dielectric layer
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1322093A
Other languages
Japanese (ja)
Inventor
Mitsuyoshi Iwasa
光芳 岩佐
Masaru Ide
勝 井出
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP1322093A priority Critical patent/JPH03183151A/en
Publication of JPH03183151A publication Critical patent/JPH03183151A/en
Pending legal-status Critical Current

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  • Jigs For Machine Tools (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE:To obtain an electrostatic chuck plate whose electrostatic attraction force is large and whose thermal conductivity is high by a method wherein an electrode itself is used as a base material and an electrode face other than a part to which an electric current is applied is covered with a nitride-based ceramic. CONSTITUTION:An electrode 2 itself is used as a base material for an electrostatic chuck plate; a nitride-based ceramic coating film 7 formed by a CVD method is formed on the whole surface other than a part 8 to which an electric current is applied. The electrostatic chuck plate is attached to a support stand 6 equipped with a temperature control mechanism such as a circulation function of cooling water or the like; the temperature of a wafer is controlled. In order to increase a temperature control property and a uniform temperature property of the wafer, it is preferable that an electrostatic attraction force is large, that the thermal conductivity of the electrode and a dielectric layer material is high and that a thickness is thinner.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、導電材料や半導体材料からなるシリコンウェ
ハ等の試料を電気的に吸着固定する高熱伝導性の静電チ
ャック板に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a highly thermally conductive electrostatic chuck plate for electrically adsorbing and fixing a sample such as a silicon wafer made of a conductive material or a semiconductor material.

〔従来の技術〕[Conventional technology]

シリコンウェハにパターンニング等の各種微細加工を施
し、多数のトランジスタを形成する集積回路の製作にお
いては、ウェハを平坦な面に確実に固定することが必要
である。このため、従来から機械式、真空式及び電気式
のチャンク板が用いられている。これらのチャックの中
で電気的にウェハを吸着固定する静電チャック板は、ウ
ェハの平坦度を良くして固定することができ、かつパー
ティクル(粒子)の発生が少ないため、半導体製造技術
分野において特に有用である。
2. Description of the Related Art In manufacturing integrated circuits in which a large number of transistors are formed by subjecting a silicon wafer to various types of microfabrication such as patterning, it is necessary to reliably fix the wafer to a flat surface. For this reason, mechanical, vacuum, and electric chunk plates have been conventionally used. Electrostatic chuck plates, which electrically attract and fix wafers in these chucks, can fix wafers with good flatness, and generate fewer particles, so they are popular in the semiconductor manufacturing technology field. Particularly useful.

従来、静電チャック板は、セラミックスからなる焼結基
体上に導体層を印刷等で施し、更にこの導体層上にアル
ミナ製誘電層を接着剤等で貼着した構造であった。
Conventionally, an electrostatic chuck plate has a structure in which a conductive layer is applied by printing or the like on a sintered base made of ceramics, and a dielectric layer made of alumina is further adhered onto the conductive layer with an adhesive or the like.

吸着力Fは、一般に次式で示され、誘電層の厚みの2乗
に反比例する。
The adsorption force F is generally expressed by the following equation, and is inversely proportional to the square of the thickness of the dielectric layer.

ここで、ε。;真空の誘電率、  ε7 ;誘電層の比
誘電率、  S;対向面積。
Here, ε. ; Dielectric constant of vacuum, ε7 ; Relative permittivity of dielectric layer, S: Opposing area.

V ;印加電圧、  t:誘電層の厚さである。V: Applied voltage, t: Thickness of the dielectric layer.

従って、強い吸着力を得るためにはこの誘電層は薄いの
が望ましいが、貼着されるアルミナ製誘雷層を500μ
m以下に薄くするのは加工上至難であり、高い吸着力が
得られないという問題があった。
Therefore, in order to obtain a strong adsorption force, it is desirable that this dielectric layer be thin, but the alumina lightning dielectric layer to be attached should be 500 μm thick.
It is very difficult to make it thinner than m in terms of processing, and there is a problem that high adsorption force cannot be obtained.

最近、この欠点を補うため、第2図に示すように、アル
ミナからなる絶縁性基板5上に形成された電極2の一生
面に化学気相成長法(CVD法)によってアルミナ被覆
膜3を設けてなる静電チャック板が提案されている(特
開昭60−197335号公報)。
Recently, in order to compensate for this drawback, as shown in FIG. 2, an alumina coating film 3 has been applied to the entire surface of an electrode 2 formed on an insulating substrate 5 made of alumina by chemical vapor deposition (CVD). An electrostatic chuck plate has been proposed (Japanese Unexamined Patent Publication No. 197335/1983).

しかし、このものは、基板及び誘電層がアルミナ製であ
ること及び基板を薄くできないことにより、静電チャッ
ク板の熱伝導性が低く、ウェハの温度コントロールが不
十分であった。なお、第2図において、1はソリコンウ
ェハ、4は直流1源である。
However, since the substrate and dielectric layer are made of alumina and the substrate cannot be made thin, the electrostatic chuck plate has low thermal conductivity and the temperature control of the wafer is insufficient. In addition, in FIG. 2, 1 is a solicon wafer, and 4 is a direct current source.

近年、集積回路製造プロセスでは、LSIの高集積化・
高速化に伴い、素子の微細加工の高精度化が強く要望さ
れている。従って、工、チング処理プロセス制御、CV
Dプロセス制御も高精度化が要求されている。これらの
プロセスは化学反応を利用しているため、処理温度の制
御が最も重要である。ウェハの温度制御は温度制御機構
を備えた支持台によって静電チャック板を介して行なわ
れるため、より高熱伝導性を有する静電チャック板の開
発が望まれていた。
In recent years, in the integrated circuit manufacturing process, there has been an increase in LSI integration and
As speed increases, there is a strong demand for higher precision in microfabrication of elements. Therefore, engineering, processing process control, CV
D process control is also required to be highly accurate. Since these processes utilize chemical reactions, controlling the processing temperature is most important. Since the temperature of the wafer is controlled via the electrostatic chuck plate by a support base equipped with a temperature control mechanism, it has been desired to develop an electrostatic chuck plate with higher thermal conductivity.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

本発明の目的は、上記欠点を解決した高熱伝導性の静電
チャック板を提供することにある。
An object of the present invention is to provide a highly thermally conductive electrostatic chuck plate that solves the above-mentioned drawbacks.

〔課題を解決するための手段〕[Means to solve the problem]

すなわち、本発明は、電極面を誘電層で被覆してなり、
該誘電層上に試料を電気的に固定保持する静電チャック
板において、電極自体を静電チャック板の基板としてな
り、しかも、化学気相成長法によって、電極の通電部以
外の全面に窒化物系セラミックスの被覆膜からなる誘電
層を形成させてなることを特徴とする静電チャック板で
ある。
That is, the present invention covers the electrode surface with a dielectric layer,
In an electrostatic chuck plate that electrically fixes and holds a sample on the dielectric layer, the electrode itself serves as the substrate of the electrostatic chuck plate, and nitride is deposited on the entire surface of the electrode other than the current-carrying part by chemical vapor deposition. This is an electrostatic chuck plate characterized by forming a dielectric layer made of a ceramic coating film.

以下、さらに詳しく本発明について説明する。The present invention will be explained in more detail below.

本発明における静電チャック板の構造は、第1図に示す
ように、電極2自体を静電チャック板の基材としてなり
、しかも通電部8以外の全面にCVD法によって形成さ
れた窒化物系セラミックスの被覆膜7を設けたことが特
徴である。
As shown in FIG. 1, the structure of the electrostatic chuck plate according to the present invention is such that the electrode 2 itself is used as the base material of the electrostatic chuck plate, and a nitride-based material is formed on the entire surface other than the current-carrying part 8 by the CVD method. The feature is that a ceramic coating film 7 is provided.

本発明で使用される電極材料としては、基本的には導電
性材料であれば良いが、被覆する窒化物系セラミックス
と熱膨張率がほぼ等しいことが望ましい。その理由は、
両者の差があまりにも大きいと、製作時あるいは使用時
の温度変化等によって被覆膜に亀裂が生じたり、静電チ
ャック板が変形してしまうという問題が生しるからであ
る。
Basically, the electrode material used in the present invention may be any electrically conductive material, but it is desirable that the coefficient of thermal expansion is approximately the same as that of the covering nitride ceramic. The reason is,
This is because if the difference between the two is too large, problems such as cracks occurring in the coating film and deformation of the electrostatic chuck plate may occur due to temperature changes during manufacturing or use.

電極材料はCVD工程において変形、変質しないもので
なければならない。このような電極材料の例としては”
v4. Mo等の高融点金属あるいは黒鉛等をあげるこ
とができる。一方、チャック板の形状は種々多様である
ため加工性に優れたものが望ましい。
The electrode material must not be deformed or altered in quality during the CVD process. Examples of such electrode materials include “
v4. Examples include high melting point metals such as Mo, graphite, and the like. On the other hand, since the shapes of the chuck plate are various, it is desirable that the chuck plate has excellent workability.

本発明では、−上記の電極それ自体を静電チャック板の
基材とするものであり、それによって以下の効果をもた
らすものである。
In the present invention, - the above-mentioned electrode itself is used as a base material of an electrostatic chuck plate, thereby bringing about the following effects.

(1)  誘電層(、こケ・1し7て熱膨張係数を合わ
セる相手が1種類で良いこと。従来は、セラミ・7クス
製基板上に形成された電極上に誘電層を被覆する場合、
誘電層に対して基板材料と電極材料の2種との熱膨張係
数を合わせる必要があった。
(1) Dielectric layer (1) Only one type of material with matching thermal expansion coefficients is required. Conventionally, a dielectric layer was coated on an electrode formed on a ceramic substrate. If you do,
It was necessary to match the thermal expansion coefficients of the two types of substrate material and electrode material with respect to the dielectric layer.

(2)従来のように電極膜を形成するプロセスを省ける
(2) The conventional process of forming an electrode film can be omitted.

本発明の誘電層を構成する材料はCVD法によって形成
されたA I N、 5iJn+ BN等の窒化物系セ
ラミックスである。窒化物系セラミックスは、一般に、
酸化物系、炭化物系、硼化物系のセラミックスに比較し
絶縁耐力が大きく、高温絶縁性に優れる特徴があるので
誘電層の厚みを薄くできる点で有利である。また、熱伝
導率においてもA I2203よりも高く、特にAIN
は熱伝導率が極めて高いために優れたものである。
The material constituting the dielectric layer of the present invention is a nitride-based ceramic such as Al IN or 5iJn+BN formed by CVD. Nitride ceramics are generally
Compared to oxide-based, carbide-based, and boride-based ceramics, it has a higher dielectric strength and excellent high-temperature insulation properties, so it is advantageous in that the thickness of the dielectric layer can be made thinner. Also, the thermal conductivity is higher than AI2203, especially AIN
is excellent because it has extremely high thermal conductivity.

本発明において、窒化物系セラミ・7クスを電極面に被
覆するにあたっては、第1図に示すように、通電部8を
除く全面に形成させる。そのようにすることによって、
温度制御機構を備えた支持台6との絶縁も薄いCVD膜
でとれるので、熱伝導性の面で有利となる。
In the present invention, when coating the electrode surface with nitride ceramic 7x, it is formed over the entire surface except for the current-carrying portion 8, as shown in FIG. By doing so,
Insulation with the support base 6 equipped with a temperature control mechanism can also be achieved with a thin CVD film, which is advantageous in terms of thermal conductivity.

窒化物系セラミックスの被覆膜の形成にあたっては、熱
CVD、プラズマCVD等のCVD法を用いることによ
り前記の特徴を最大限に生かすことができる。すなわち
、CVD法によれば焼結助剤や気孔を含まない高純度で
緻密な膜を薄く均一に被覆することができる。しかも接
着剤を用いる必要がないため、熱伝導率の低下や誘電層
の厚みのバラツキの問題も生じない。さらには、CV口
温度、圧力等のCVD条件を調整することにより電極材
料との熱膨張率を合わせることも可能である。たとえば
Anの場合、高温低圧下で得られる膜はど低い熱膨張率
を示し、900−1300℃、  0.5〜lOtor
rの条件の組み合せで、室温からtooo℃までの平均
熱膨張係数が3〜6X10−6/℃である^l膜をつく
り分けることができる。
When forming a coating film of nitride-based ceramics, the above characteristics can be utilized to the maximum by using a CVD method such as thermal CVD or plasma CVD. That is, according to the CVD method, a highly pure and dense film containing no sintering aid or pores can be coated thinly and uniformly. Furthermore, since there is no need to use an adhesive, problems such as a decrease in thermal conductivity and variations in the thickness of the dielectric layer do not occur. Furthermore, it is also possible to match the coefficient of thermal expansion with the electrode material by adjusting CVD conditions such as CV port temperature and pressure. For example, in the case of An, the film obtained under high temperature and low pressure shows a very low coefficient of thermal expansion;
Depending on the combination of conditions r, it is possible to produce films with an average thermal expansion coefficient of 3 to 6 x 10-6/°C from room temperature to too much °C.

誘電層をAINとする場合、基材である電極材料として
は上記した理由から、W、 Moおよび黒鉛が望ましく
、黒鉛としては、室温から1000℃までの平均熱膨張
係数が4〜7 Xl0−’/’Cであるものが特に好ま
しい。
When the dielectric layer is made of AIN, the base electrode material is preferably W, Mo, and graphite for the reasons mentioned above, and graphite has an average thermal expansion coefficient of 4 to 7 Xl0-' from room temperature to 1000°C. /'C is particularly preferred.

一方、誘電層をSi、N、とする場合、室温から100
0℃までの平均熱膨張係数が2〜5 XIQ−”/’C
の黒鉛を電極材料とするのが望ましい。
On the other hand, when the dielectric layer is made of Si or N,
Average thermal expansion coefficient up to 0℃ is 2 to 5 XIQ-''/'C
It is desirable to use graphite as the electrode material.

電極板の厚さは0.5〜10閣程度が適切であり、あま
り薄すぎるとチャック板が変形してしまうし、厚すぎる
と熱伝導性が低下する。
The appropriate thickness of the electrode plate is about 0.5 to 10 mm; if it is too thin, the chuck plate will be deformed, and if it is too thick, the thermal conductivity will decrease.

誘電層の厚さは50〜400μ信程度が適切である。The appropriate thickness of the dielectric layer is about 50 to 400 microns.

あまり薄すぎると電極板に印加される電圧に耐えられず
絶縁破壊を生じるし、厚すぎると静電吸着力や熱伝導性
の低下を招く。
If it is too thin, it will not be able to withstand the voltage applied to the electrode plate and dielectric breakdown will occur, and if it is too thick, it will cause a decrease in electrostatic adsorption force and thermal conductivity.

本発明の静電チャック板を冷却水の循環機能等温度制御
機構を備えた支持台6に取りつけウェハの温度を制御す
る。ウェハの温度制御性と均熱性を高めるには、静電吸
着力が大きく、電極と誘電層材料の熱伝導率が高く、か
つ厚みが薄いほど良い。
The electrostatic chuck plate of the present invention is attached to a support table 6 equipped with a temperature control mechanism such as a cooling water circulation function to control the temperature of the wafer. In order to improve the temperature controllability and thermal uniformity of the wafer, the larger the electrostatic attraction force, the higher the thermal conductivity of the electrode and dielectric layer materials, and the thinner the thickness, the better.

〔実施例〕〔Example〕

以下、実施例と比較例をあげてさらに具体的に本発明を
説明する。
Hereinafter, the present invention will be explained in more detail with reference to Examples and Comparative Examples.

1〜10      1.2 第1表に示す原料ガス及び条件により減圧熱CVD法で
第1図に示すような黒鉛質電極2 (1251−φX5
ist+熱伝導率=100 w/m −k、市販品)あ
るいは−、 Mo電極2 (125n=φ×2■璽0の
通電部8を除いた全面を各種のセラミックス膜7で被覆
して静電チャック板を得、以下の性能評価を実施した。
1 to 10 1.2 Graphite electrode 2 (1251-φX5
ist + thermal conductivity = 100 w/m -k, commercially available product) or -, Mo electrode 2 (125n = φ A chuck plate was obtained and the following performance evaluation was performed.

なお、膜厚は原料ガス濃度及びCVD時間により約20
0μ閣に調整した。
Note that the film thickness varies depending on the raw material gas concentration and CVD time.
Adjusted to 0μ.

(11膜厚の測定は以下の評価終了後、基材とともに切
断し、切断面の膜厚を実体顕微鏡を用いて測定した。
(11) After completing the following evaluation, the film was cut together with the base material, and the film thickness of the cut surface was measured using a stereomicroscope.

(2)基材の熱膨張係数は5 x 5 X20mのブロ
ックを切り出し、測定器(セイコー電子工業■製rTM
A−300J )を用いて室温〜1000℃までの熱膨
張率を測定し、平均熱膨張係数を求めた。
(2) To determine the thermal expansion coefficient of the base material, cut out a 5 x 5 x 20 m block and use a measuring device (rTM manufactured by Seiko Electronics Co., Ltd.).
A-300J) was used to measure the coefficient of thermal expansion from room temperature to 1000°C, and the average coefficient of thermal expansion was determined.

(3)チャック力(静電吸引力)の測定は、第1図に示
したように、チャック板に5インチφのシリコンウェハ
1をセットし、電極2に直流電源4を用いて2kVの電
圧を印加し、静電吸引力によりシリコンウェハをチャッ
クさせた状態で引張試験機(東洋精機製作所■製「スト
ログラフWJ)を用いてシリコンウェハをチャック板か
ら引き剥す際の引張強度を測定し、それをチャック力と
した。
(3) To measure the chuck force (electrostatic attraction force), as shown in Figure 1, a 5-inch φ silicon wafer 1 is set on the chuck plate, and a DC power source 4 is used to apply a voltage of 2 kV to the electrode 2. was applied, the silicon wafer was chucked by electrostatic attraction, and the tensile strength was measured when the silicon wafer was peeled off from the chuck plate using a tensile testing machine (Strograph WJ manufactured by Toyo Seiki Seisakusho ■). This was used as the chuck force.

(4)  シリコンウェハの温度制御性は、ドライエツ
チング装置において、エツチング処理におけるシリコン
ウェハの温度上昇の挙動で評価した。
(4) The temperature controllability of the silicon wafer was evaluated by the behavior of the temperature rise of the silicon wafer during the etching process in a dry etching apparatus.

すなわち、25℃の冷却水を循環させた支持台(下部エ
ツチング電極を兼ねる)上に試作した静電チャック板を
取りつけ、直流電圧2kVを電極に印加し、シリコンウ
ェハをチャックした状態で、CHF、ガスを0.05t
orrの下、13.56 MHz、1w/−の高周波電
力を印加してプラズマ化し、ウェハ上のSi0g膜をエ
ツチング処理した。ウェハの温度をモニタしておき、エ
ツチング開始時から次第に上昇するウェハの温度がエツ
チング処理中一定温度となるまでの時間とその温度を記
録した。
That is, a prototype electrostatic chuck plate was mounted on a support base (also serving as the lower etching electrode) on which cooling water at 25°C was circulated, a DC voltage of 2 kV was applied to the electrode, and while the silicon wafer was chucked, CHF, 0.05t of gas
A high-frequency power of 13.56 MHz and 1 W/- was applied to generate plasma under the following conditions, and the SiOg film on the wafer was etched. The temperature of the wafer was monitored, and the time and temperature until the temperature of the wafer, which gradually rose from the start of etching until it reached a constant temperature during the etching process, were recorded.

以上の結果を第1表に示す。The above results are shown in Table 1.

且1■通工 第2図に示すように、予じめ通電部用の慣通穴を設けた
アルミナ焼結体からなる絶縁性基板5(125wφX5
m1.熱伝導率=27 w/m−k)上の120抽φの
領域にTiCff1n + TaCJl  を原料とし
て減圧熱CVD法(1300℃、 10 torr)に
よりTi−Ta合金膜を約1OpIllt形威し、電極
2とした。次いで、電極2上に第1表に示す原料ガス及
び条件により減圧熱CVD法でアルミナ膜3を約200
μm1形戒して静電チャック板を得、実施例と同じ性能
評価を行なった。その結果を第1表に示す。
In addition, as shown in Fig. 2, an insulating substrate 5 (125wφ×5
m1. Using TiCff1n + TaCJl as raw materials, a Ti-Ta alloy film of approximately 1 OpIllt was formed using the low pressure thermal CVD method (1300°C, 10 torr) in a region of 120 mm on the surface (thermal conductivity = 27 w/m-k), and then the electrode was formed. It was set as 2. Next, an alumina film 3 of about 200% was deposited on the electrode 2 by low pressure thermal CVD using the raw material gases and conditions shown in Table 1.
An electrostatic chuck plate was obtained using μm 1 type, and the same performance evaluation as in the example was performed. The results are shown in Table 1.

比較斑1 絶縁性基板5を窒化ケイ素焼結体く熱伝導率=45 w
/m−k)、に、電極2を−F、ガスを原料としたCV
D法(Boo℃+ 10torr)によるW、誘電N3
を第1表に示す原料ガスおよび条件によりCVD法で形
成した窒化ケイ素膜とした以外は比較例3と同様の構造
をもつ静電チャック板を製作し、実施例と同じ性能評価
を行なった。その結果を第1表に示す。
Comparison spot 1 Thermal conductivity of the insulating substrate 5 is made of silicon nitride sintered body = 45 w
/m-k), electrode 2 is -F, CV using gas as raw material
W, dielectric N3 by D method (Boo℃+10torr)
An electrostatic chuck plate having the same structure as Comparative Example 3 was manufactured, except that the silicon nitride film was formed by the CVD method using the raw material gas and conditions shown in Table 1, and the same performance evaluation as in the example was performed. The results are shown in Table 1.

また実施例、比較例で製作した静電チャック板の製作コ
ストを比較し、低、中、高の3段階に分け、第1表に示
した。
In addition, the manufacturing costs of the electrostatic chuck plates manufactured in Examples and Comparative Examples were compared and divided into three levels: low, medium, and high, and are shown in Table 1.

以下余白 〔発明の効果〕 本発明の静電チャック板は、電極自体を基材とし、通電
部以外の電極面をCVD法による窒化物系セラミックス
で被覆したものであって、静電吸着力が大きく、熱伝導
性が高い。従って、シリコンウェハの温度コントロール
を正確に行うことができるので、LSI製造プロセスに
おける底膜、エツチング等の選択性、制御性が向上でき
、LSIの歩留りを大幅に高めることができる。
Margins below [Effects of the Invention] The electrostatic chuck plate of the present invention uses the electrode itself as a base material, and the electrode surface other than the current-carrying part is coated with nitride ceramics by CVD method, and the electrostatic chuck plate has a strong electrostatic adsorption force. Large and highly thermally conductive. Therefore, since the temperature of the silicon wafer can be accurately controlled, the selectivity and controllability of the bottom film, etching, etc. in the LSI manufacturing process can be improved, and the yield of LSI can be greatly increased.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明例の静電チャック板、第2図は従来の静
電チャック板の構成を示す説明図である。 ■−シリコンウェハ(半導体試料) 2−電極 3−アルミナ被覆膜(誘電層) 4−直流電源 5−アルミナ基板(wA縁性基板) 6・−支持台 7〜窒化物系セラミツクスの被覆膜(誘電N)8−通電
FIG. 1 is an explanatory diagram showing the structure of an electrostatic chuck plate according to an example of the present invention, and FIG. 2 is a diagram showing the structure of a conventional electrostatic chuck plate. ■-Silicon wafer (semiconductor sample) 2-Electrode 3-Alumina coating film (dielectric layer) 4-DC power supply 5-Alumina substrate (wA edge substrate) 6.-Support 7-Nitride ceramic coating film (Dielectric N) 8- Current carrying part

Claims (1)

【特許請求の範囲】[Claims] 1、電極面を誘電層で被覆してなり、該誘電層上に試料
を電気的に固定保持する静電チャック板において、電極
自体を静電チャック板の基板としてなり、しかも、化学
気相成長法によって、電極の通電部以外の全面に窒化物
系セラミックスの被覆膜からなる誘電層を形成させてな
ることを特徴とする静電チャック板。
1. In an electrostatic chuck plate in which the electrode surface is covered with a dielectric layer and a sample is electrically fixed and held on the dielectric layer, the electrode itself serves as the substrate of the electrostatic chuck plate, and furthermore, chemical vapor deposition An electrostatic chuck plate characterized in that a dielectric layer made of a nitride-based ceramic coating is formed on the entire surface of an electrode other than the current-carrying part by a method.
JP1322093A 1989-12-12 1989-12-12 Electrostatic chuck plate Pending JPH03183151A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1322093A JPH03183151A (en) 1989-12-12 1989-12-12 Electrostatic chuck plate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1322093A JPH03183151A (en) 1989-12-12 1989-12-12 Electrostatic chuck plate

Publications (1)

Publication Number Publication Date
JPH03183151A true JPH03183151A (en) 1991-08-09

Family

ID=18139838

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1322093A Pending JPH03183151A (en) 1989-12-12 1989-12-12 Electrostatic chuck plate

Country Status (1)

Country Link
JP (1) JPH03183151A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536819A (en) * 1991-07-30 1993-02-12 Kyocera Corp Electrostatic chuck
US6383302B2 (en) 1997-12-02 2002-05-07 Nec Corporation Apparatus and method for manufacturing semiconductor device
JP2009004806A (en) * 2003-07-08 2009-01-08 Future Vision:Kk Substrate stage electrostatic chuck, electrode used therefor, and processing system having them
TWI402933B (en) * 2009-11-26 2013-07-21 Semes Co Ltd Vacuum chuck table of semiconductor device cutting apparatus capable of supplying cooling water

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0536819A (en) * 1991-07-30 1993-02-12 Kyocera Corp Electrostatic chuck
US6383302B2 (en) 1997-12-02 2002-05-07 Nec Corporation Apparatus and method for manufacturing semiconductor device
US6878625B2 (en) 1997-12-02 2005-04-12 Nec Electronics Corporation Method for manufacturing semiconductor device
JP2009004806A (en) * 2003-07-08 2009-01-08 Future Vision:Kk Substrate stage electrostatic chuck, electrode used therefor, and processing system having them
TWI402933B (en) * 2009-11-26 2013-07-21 Semes Co Ltd Vacuum chuck table of semiconductor device cutting apparatus capable of supplying cooling water

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