JPH0897137A - Semiconductor device and its manufacture - Google Patents

Abstract

PURPOSE: To form a crystalline silicon film, which has higher crystallinity than the crystallinity obtained by ordinary heat treatment with good productivity and that by low-temperature heat treatment by introducing an indispensable minimum quantity of catalyst element into an amorphous silicon film, controlling the quantity of addition precisely and with good uniformity under a board face and with good reproducibility between boards. CONSTITUTION: A diffusion prevetive film 105 to the catalyst element for accelerating the crystallization to an amorphous silicon film, and a film 106 including catalyst elements are formed in order on an amorphous silicon film 103, and then by heat treatment, the catalyst element is introduced into the amorphous silicon film 13 through the diffusion preventive film 106 form the film 105, and also the amorphous silicon film 103 is crystallized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device having a crystalline silicon film obtained by crystallizing an amorphous silicon film as an active region and a manufacturing method thereof. In particular, the present invention is effective for a semiconductor device having a TFT (thin film transistor) provided on an insulating substrate, and can be applied to an active matrix type liquid crystal display device, a contact image sensor, a three-dimensional IC and the like.

[0002]

2. Description of the Related Art In recent years, large-sized, high-resolution liquid crystal display devices,
High-speed, high-resolution contact image sensor, three-dimensional IC
In order to realize the above, an attempt has been made to form a high-performance semiconductor element on an insulating substrate such as glass or on an insulating film. A thin film silicon semiconductor layer is generally used for a semiconductor element used in these devices.

The thin-film silicon semiconductor layer is roughly classified into two, that is, an amorphous silicon semiconductor (a-Si) and a crystalline silicon semiconductor. Amorphous silicon semiconductors are the most commonly used because they have a low fabrication temperature, can be fabricated relatively easily by the vapor phase method, and have high mass productivity. It is inferior to the silicon semiconductors it has. Therefore, in order to obtain higher speed characteristics in the future, there is a strong demand for establishment of a method for manufacturing a semiconductor device made of a crystalline silicon semiconductor. Known crystalline silicon semiconductors include polycrystalline silicon, microcrystalline silicon, amorphous silicon containing a crystalline component, and semi-amorphous silicon having an intermediate state between crystalline and amorphous.

As a method for obtaining these thin film silicon semiconductor layers having crystallinity, (1) a semiconductor film is formed while the semiconductor film has crystallinity (2) an amorphous semiconductor A film is formed, and then the semiconductor film is made crystalline by the energy of laser light. (3) An amorphous semiconductor film is formed, and then thermal energy is applied to the semiconductor film. To have crystallinity,
Such methods are known.

However, in the method (1), crystallization progresses at the same time as the film forming step. Therefore, in order to obtain crystalline silicon having a large grain size, it is indispensable to increase the thickness of the silicon film. It is technically difficult to uniformly form a film having a film on the entire surface of the substrate. Further, in this method, since the film forming temperature is as high as 600 ° C. or higher, there is a cost problem that an inexpensive glass substrate cannot be used.

Further, in the method (2), since the crystallization phenomenon in the melting and solidification process is utilized, the grain boundaries are favorably processed with a small grain size, and a high quality crystalline silicon film can be obtained. Taking the most commonly used excimer laser as an example, there is a problem that the irradiation area of laser light is small and throughput is low. In addition, the crystallization treatment with laser light is not sufficient in the stability of the laser for uniformly treating the entire surface of a large-area substrate, and is strongly regarded as a next-generation technology.

The method (3) has an advantage that it can be applied to a large area as compared with the methods (1) and (2), but heat treatment for several tens of hours at a high temperature of 600 ° C. or more is required for crystallization. is necessary. On the other hand, considering the use of an inexpensive glass substrate and the improvement of throughput, it is necessary to lower the heating temperature and crystallize it in a shorter time. Therefore, in the method (3), it is necessary to simultaneously solve the above-mentioned conflicting problems.

Further, in the method (3), since the solid phase crystallization phenomenon is utilized, the crystal grains spread parallel to the substrate surface and are several μm.
Although even those with a grain size of 1 appear, the grown crystal grains collide with each other to form a grain boundary, and the grain boundary acts as a trap level for carriers, which is a major cause of lowering the mobility of the TFT. Will end up.

A method for solving the above-mentioned problem of grain boundaries by utilizing the method (3) is disclosed in Japanese Patent Laid-Open No. 5-55142.
Japanese Patent Laid-Open Publication No. 5-136048. In these methods, a foreign particle serving as a nucleus for crystal growth is introduced into the amorphous silicon film, and then a heat treatment is performed to obtain a large-grain crystalline silicon film having the foreign particle as a nucleus.

In the former case, silicon (Si ⁺ ) is introduced into the amorphous silicon film by an ion implantation method, and then a heat treatment is performed to obtain a polycrystalline silicon film having crystal grains with a grain size of several μm.
In the latter, Si particles having a particle diameter of 10 to 100 nm are blown onto the amorphous silicon film together with a high pressure nitrogen gas to form a growth nucleus. It is the same in both cases that a semiconductor element is formed using a high-quality crystalline silicon film in which a foreign substance is selectively introduced into an amorphous silicon film and crystal growth is performed using the foreign substance as a nucleus.

However, in these techniques proposed in Japanese Patent Application Laid-Open No. 5-55142 or Japanese Patent Application Laid-Open No. 5-136048, the introduced foreign matter acts only as growth nuclei, so that the crystal grows. Although it is effective for controlling nucleation and crystal growth direction, the above-mentioned problems in the heat treatment step for crystallization still remain.

In JP-A-5-55142, a temperature of 6
Crystallization is performed by heat treatment at 00 ° C. for 40 hours. Further, in Japanese Patent Laid-Open No. 5-136048, heat treatment is performed at a heating temperature of 650 ° C. or higher. Therefore, these technologies are applied to SOI (Silicon-On-Insulator) substrates and SOS.
Although this is an effective technique for a (Silicon-On-Sapphire) substrate, it is difficult to form a crystalline silicon film on an inexpensive glass substrate to form a semiconductor device using these techniques. For example, Corning 7059 (trade name of Corning Incorporated) used for an active matrix type liquid crystal display device.
Glass has a glass strain point of 593 ° C., and there is a problem in heating at 600 ° C. or higher in consideration of increasing the area of the substrate.

In order to solve the above-mentioned various problems, the present inventors have made it possible to lower the temperature required for crystallization and shorten the processing time, and to minimize the influence of grain boundaries. We have found a method for producing a crystalline silicon thin film that is limited to the above.

According to the research conducted by the present inventors, a trace amount of a metal element such as nickel, palladium, or lead is introduced into the surface of the amorphous silicon film, and thereafter, the metal element is heated to 5
It has been found that crystallization can be performed at 50 ° C. for a treatment time of about 4 hours. It is understood that this mechanism is that crystal nucleation with a metal element as a nucleus occurs at an early stage of the heat treatment, and then the metal element serves as a catalyst to promote crystal growth and crystallization rapidly progresses. In that sense, these metal elements are hereinafter referred to as catalyst elements. Crystalline silicon film that has been crystallized by promoting crystallization by these catalytic elements,
While the amorphous silicon film crystallized by the usual solid phase growth method has a twin structure, it is composed of many needle-like crystals or columnar crystals. Is in an ideal single crystal state.

When a TFT is manufactured by using such a crystalline silicon film in the active region, the field effect mobility is 1.2 times that in the case of using the crystalline silicon film formed by the usual solid phase growth method. Improve. In addition, by irradiating laser light or intense light after the crystallization treatment using the catalyst element to promote the crystallinity, the difference in the field effect mobility becomes more remarkable.

That is, when the crystalline silicon film is irradiated with laser light or intense light, the grain boundary portions are intensively processed due to the difference in melting points between the crystalline silicon film and the amorphous silicon film. However, in the crystalline silicon film formed by the usual solid phase growth method, since the crystal structure is in a twin state, twin crystal defects remain inside the crystal grain boundaries even after laser light irradiation. In comparison, the crystalline silicon film crystallized by introducing the catalytic element,
It is formed of needle-like crystals or columnar crystals, and the inside is in a single-crystal state. Therefore, when the crystal grain boundary is processed by irradiation with laser light or strong light, a high-quality crystal close to a single-crystal state is obtained over the entire surface of the substrate. A crystalline silicon film is obtained.

[0017]

By the way, in order to introduce a small amount of the catalyst element as described above, plasma treatment, ion implantation, and a method of applying a solution or compound containing the catalyst element may be used. Here, plasma treatment is a method of adding a catalytic element to an amorphous silicon film by using a material containing a catalytic element as an electrode in a plasma CVD apparatus and generating plasma in an atmosphere such as nitrogen or hydrogen. is there.

However, the presence of a large amount of the above-mentioned elements in the semiconductor impairs the reliability and electrical stability of the device using these semiconductors and is not preferable.

That is, the above-mentioned catalytic element that promotes crystallization of nickel or the like is necessary when crystallizing the amorphous silicon region, but it should be contained as little as possible in the crystallized silicon region. Preferably. In order to achieve this purpose, select a catalyst element that has a strong tendency to be inert in the crystalline silicon region, at the same time reduce the amount of the catalyst element necessary for crystallization as much as possible, and crystallize in the minimum amount. Need to be converted. In order to do so, it is necessary to precisely control the introduction amount of the above-mentioned catalyst element, and further, the uniformity of the addition amount of the catalyst element in the treatment method in the substrate and the stability between the substrates (reproduction) Property), that is, it is inevitable to ensure that the variation between the substrates to be processed is small.

Further, in the case of using nickel as a catalytic element, the crystallization process in the process of forming a crystalline silicon film by forming an amorphous silicon film and adding nickel by a plasma treatment method was examined in detail. However, the following matters were found.

(1) When nickel is introduced onto the amorphous silicon film by plasma treatment, nickel has already penetrated to a considerable depth in the amorphous silicon film before the heat treatment.

(2) The initial nuclei of crystals are generated from the surface of the region where nickel is introduced.

(3) When the crystalline silicon film crystallized by introducing nickel into the amorphous silicon film by the plasma treatment is irradiated with laser light, excess nickel is deposited on the surface of the crystalline silicon film.

From these facts it is concluded that all the nickel introduced by the plasma treatment is not functioning effectively. That is, it is considered that there is nickel that does not function sufficiently even if a large amount of nickel is introduced. From this, it is considered that the contact portion or the contact surface portion where nickel and silicon are in contact with each other functions at the time of low temperature crystallization. Then, it is concluded that nickel should be dispersed as finely as possible in atomic form. In other words, it is concluded that "what is necessary is to introduce nickel in the vicinity of the surface of the amorphous silicon film in a range where low temperature crystallization is possible and in a concentration as low as possible in atomically dispersed state." To be done.

Therefore, a method of introducing an extremely small amount of nickel only near the surface of the amorphous silicon film, in other words,
As a method of introducing a very small amount of a catalytic element that promotes crystallization only near the surface of the amorphous silicon film, there is a method of dissolving the catalytic element in a solvent or a compound so as to be in contact with the amorphous silicon film and holding it. In this method, the amount of nickel introduced into the amorphous silicon film can be easily controlled by controlling the concentration of nickel in the solution or compound, and the addition of the minimum amount of catalytic element necessary for crystallization is added. Is possible.
When a crystalline silicon film crystallized using this method is irradiated with laser light, nickel is not deposited and a high-quality crystalline silicon film is obtained.

However, the above-mentioned method of coating the solvent or compound in which the catalytic element is dissolved on the amorphous silicon film has a problem that the amount of added nickel in the substrate is not uniform. As the method of coating,
A method of uniformly applying a solution or the like with a spinner and drying it, or a method of directly dipping the substrate in the solution and then drying it with an air knife were tried. In both cases, the amount of added nickel was ± 10 to 20% in a 127 mm square substrate. There was variation.

If the non-uniformity of the amount of added nickel in the substrate is large, a region where crystal growth does not occur locally due to insufficient nickel amount or a region where nickel is contained in such a large amount as to affect the semiconductor element appears. Therefore, as in the process of manufacturing an active matrix substrate of a liquid crystal display device, it is necessary to uniformly manufacture hundreds of thousands of TFTs on one substrate by using a substrate to which a catalytic element is added as described above. It was difficult. At present, in order to reduce the cost and increase the area of the device, a semiconductor device having excellent TFT uniformity and reproducibility and a method for manufacturing the same are required so as to be compatible with a glass substrate of 400 mm square or more.

The present invention has been made to solve the above-mentioned problems, and the minimum required amount of catalytic element is
It can be introduced into an amorphous silicon film with precise control over the amount added and with good in-plane uniformity and reproducibility between substrates, and higher than the crystallinity obtained by ordinary heat treatment. It is an object of the present invention to obtain a semiconductor device capable of forming a crystalline silicon film having crystallinity with high productivity by a low temperature heat treatment at 600 ° C. or less and a method for manufacturing the semiconductor device.

[0029]

[Means for Solving the Problems]

(1) A semiconductor device according to the present invention includes a substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film. The active region contains a catalytic element that promotes crystallization of the amorphous silicon film by heat treatment or heat treatment and laser light or intense light irradiation treatment. The catalytic element contained in the active region is introduced into the amorphous silicon film through a diffusion prevention film for the catalytic element by thermal diffusion from a thin film containing the catalytic element. Thereby, the above object is achieved.

(2) A semiconductor device according to the present invention comprises a substrate having an insulating surface and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film. . The active region is a part of the lateral crystal growth region in which the crystal grains are in a substantially single crystal state, which is formed by crystal growth progressing in the direction parallel to the substrate surface from the crystallization region in the vicinity thereof. . The crystallization region contains a catalytic element that promotes crystallization of the amorphous silicon film by heat treatment or heat treatment and laser light or intense light irradiation treatment. The catalytic element contained in the crystallized region is introduced into the amorphous silicon film through a diffusion prevention film for the catalytic element by thermal diffusion from a thin film containing the catalytic element. Thereby, the above object is achieved.

(3) In the present invention, the diffusion barrier film for the catalytic element preferably has a diffusion coefficient for the catalytic element of 1/10 or less as compared with the amorphous silicon film.

(4) In the present invention, it is preferable that the diffusion preventing film for the catalyst element is a silicon oxide film or a silicon nitride film.

(5) In the present invention, the catalyst element is Ni, Co, Pd, Pt, Cu, Ag, Au, I.
It is preferable to use one or more kinds of elements selected from n, Sn, Al, P, As, and Sb.

(6) In the present invention, the concentration of the catalytic element in the active region is 1 × 10 ¹⁵ atoms / c.
It is preferably m ³ to 1 × 10 ¹⁹ atoms / cm ³ .

(7) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a diffusion preventing film for a catalytic element that promotes crystallization of the amorphous silicon film are formed. And a step of forming a thin film containing the catalytic element, and by heat treatment to diffuse the catalytic element in the thin film to the amorphous silicon film through the diffusion preventive film, And a step of performing crystallization, whereby the above object is achieved.

(8) In the method of manufacturing a semiconductor device according to the present invention, a step of forming an amorphous silicon film on a substrate and a diffusion prevention film for a catalytic element that promotes crystallization of the amorphous silicon film are formed. And a step of forming a thin film containing the catalytic element, and by heat treatment, the catalytic element in the thin film is selectively diffused into the amorphous silicon film through the diffusion preventive film, and the amorphous By selectively crystallizing the crystalline silicon film and subsequent heat treatment, crystal growth is performed in a direction substantially parallel to the substrate surface from the crystallized portion, and lateral crystal growth is performed in the amorphous silicon film. And a step of forming a region, whereby the above object is achieved.

(9) In the present invention, after the amorphous silicon film is crystallized by the heat treatment, the amorphous silicon film is irradiated with laser light or strong light to treat the crystal. Is preferred.

(10) In the present invention, it is preferable to form a silicon oxide film or a silicon nitride film as the diffusion prevention film.

(11) In the present invention, the silicon oxide film or the silicon nitride film as the diffusion prevention film is preferably formed by thin film oxidation or thin film nitriding on the surface of the amorphous silicon film.

(12) In the present invention, the thin film containing the catalyst element is preferably formed by a vapor deposition method.

(13) In the present invention, as the catalyst element, Ni, Co, Pd, Pt, Cu, Ag, Au,
It is preferable to use one or more elements selected from In, Sn, Al, P, As, and Sb.

[0042]

In the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating. The crystalline silicon film forming the active region, which is obtained by crystallizing the film, can have a crystallinity higher than that obtained by a usual solid phase growth method.

Since the crystallization of the amorphous silicon film by heating is promoted by the catalytic element, a high quality crystalline silicon film can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization can be suppressed to 600 ° C. or lower, an inexpensive glass substrate can be used.

The concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , this catalytic element can effectively function when the amorphous silicon film is crystallized.

In the method for manufacturing a semiconductor device of the present invention, a thin film containing a catalytic element that promotes crystallization of an amorphous silicon film is formed on the amorphous silicon film, and the catalyst is thermally diffused from the thin film. Since the element is introduced into the amorphous silicon film,
It is possible to reduce variations in the addition amount of the catalyst element within the surface of the substrate.

Further, since the catalyst element is introduced into the amorphous silicon film through the diffusion preventive film, most of the catalyst element is introduced into the amorphous silicon film on the way from the thin film to the amorphous silicon film. Therefore, the catalyst element can be introduced in the minimum necessary amount. Further, even if the concentration of the catalyst element in the thin film varies, the variation is mitigated when the catalyst element diffuses in the diffusion prevention film.

In the method of manufacturing a semiconductor device of the present invention, the catalytic element in the thin film is selectively diffused into the amorphous silicon film through the diffusion preventive film by heat treatment, and the amorphous silicon is removed. By selectively crystallizing and by subsequent heat treatment, crystal growth is performed from this crystallized portion in a direction substantially parallel to the substrate surface, and a lateral crystal growth region is formed in the amorphous silicon film. It is possible to obtain a crystallized region having significantly better crystallinity than the region into which the catalytic element is introduced.

[0048]

EXAMPLES First, the basic principle of the present invention will be described.

In the present invention, as a method of introducing a catalytic element that promotes crystallization of an amorphous silicon film, a thin film containing the catalytic element is formed, and the catalytic element is prevented from passing through a diffusion prevention film for the catalytic element. A method of diffusing into a crystalline silicon film is used. In this method, since the catalyst element is introduced into the amorphous silicon film by forming a thin film containing the catalyst element,
Compared with the method of applying the solution or compound in which the catalyst element is dissolved as described above, the variation in the addition amount of the catalyst element in the substrate can be reduced. According to the experiments conducted by the present inventors, a 127 mm square substrate is within ± 5%. As the thin film forming method in this case, since almost completed techniques such as the vapor deposition method, the sputtering method or the plating method which have been conventionally used can be used, the uniformity of the film thickness is also good, and the good uniformity can be obtained. The property can be directly reflected on the uniformity of the amount of the catalyst element added. Further, even if the substrate has a large area, it can be dealt with by increasing the size of the film forming apparatus, and the substantial variation in the amount of catalytic element added at that time is largely different from the result of the 127 mm square substrate. It seems that there is no.

However, if the catalyst element is simply formed as a thin film on the amorphous silicon film, and the catalyst element is diffused and introduced into the amorphous silicon film, the concentration of the catalyst element in the plane of the substrate can be reduced. Even if the homogeneity can be improved, another object of the present invention is that it is difficult to control the introduction amount of the catalytic element to the minimum introduction amount necessary for crystallization. That is, the amount of the catalytic element required in the present invention is an extremely thin film (several nm or less) that cannot be visually confirmed as a thin film, and it is almost impossible to control the film thickness by a method of forming a thin film. This is because the level is close.

In order to solve this problem, in the present invention,
The catalyst element is introduced through the diffusion prevention film for the catalyst element. That is, in the present invention, in order for the catalytic element formed in a thin film to reach the amorphous silicon film, it is first diffused in the diffusion prevention film. This diffusion prevention film needs to have a smaller diffusion coefficient for a catalytic element such as a metal element than a silicon film, and literally acts as a diffusion prevention film or a buffer film.

Therefore, even if the catalyst element is excessively added to the surface of the diffusion prevention film to a certain extent, a large number of them are trapped in the diffusion prevention film, so that the amount of the catalyst element introduced into the amorphous silicon film is extremely limited. It becomes possible to control a minute amount. Further, even if the concentration of the catalyst element film formed on the surface of the diffusion prevention film is locally varied, the variation is mitigated when diffusing in the diffusion prevention film. Furthermore, since the catalytic element reaches the surface of the amorphous silicon film in a finely atomically dispersed state by diffusing in the diffusion barrier film, all the catalytic elements introduced into the amorphous silicon film are efficiently Function. Therefore, by using the present invention, the problem of introducing a catalytic element from a thin film state to an amorphous silicon film is solved, and the catalytic element is introduced uniformly over the entire surface of the substrate and in a necessary minimum amount. Is possible. Therefore, in the case of using the present invention, deposition of a catalytic element does not occur even if irradiation with laser light or strong light is performed after crystallization by heating, and the uniformity and stability mounted on a large-area substrate are excellent. A high-performance semiconductor device can be realized.

The diffusion barrier film of the present invention preferably has a diffusion coefficient for the catalytic element of at least 1/10 or less of that of the amorphous silicon film. The reason is that the diffusion coefficient of the diffusion barrier film determines the amount of the catalytic element introduced into the amorphous silicon film.

FIG. 6 shows the relationship between the diffusion coefficient of the diffusion barrier film and the amount of catalyst element introduced into the amorphous silicon film. this is,
Data is obtained when nickel was excessively introduced as a catalytic element onto the diffusion barrier film and heated at a temperature of 550 ° C., the horizontal axis represents the ratio of the diffusion coefficient of the amorphous silicon film / the diffusion barrier film to nickel, and the vertical axis represents the vertical axis. It represents the amount of nickel introduced into the amorphous silicon film through the diffusion barrier film. From FIG. 6, when the diffusion coefficient ratio to the amorphous silicon film is about 1/10 or less, the introduction amount of the catalytic element to the amorphous silicon film is 10 ¹⁹ atoms / c.
It can be seen that it can be reduced to m ³ or less. The amount of the catalytic element introduced into the amorphous silicon film is 10 ¹⁹ atoms /
It is necessary to suppress it to ³ cm ³ or less, and it is desirable that the diffusion prevention film of the present invention has a diffusion coefficient ratio to the amorphous silicon film of 1/10 or less.

As the diffusion barrier film of the present invention, one having the above diffusion coefficient and having no adverse effect on the amorphous silicon film which will later become an active region is most desirable. A silicon oxide film or a silicon nitride film, which is the same silicon-based substance, is a material that satisfies this condition. Therefore, the best results can be obtained when these films are used as the diffusion barrier film of the present invention.

As a method for forming the silicon oxide film and the silicon nitride film in the present invention, a deposition method such as a CVD method or a sputtering method may be used, but the required thickness of the silicon oxide film or the silicon nitride film is about several nm. Considering that an extremely thin film is sufficient and that the uniformity of the thickness of the silicon oxide film or the silicon nitride film is indispensable for the uniform introduction of the catalytic element, the above-mentioned silicon oxide film and silicon nitride film are not It is most effective to form the surface of the crystalline silicon film by a thin film oxidation method or a thin film nitriding method.

As the thin film oxidation method for the surface of the amorphous silicon film, a thermal oxidation method for performing surface oxidation by heat treatment in an oxidizing atmosphere such as oxygen or water vapor, a mixed solution of sulfuric acid and hydrogen peroxide solution, etc. There is a chemical solution oxidation method in which the surface is oxidized by immersing the oxidizing solution in 1) in the substrate, and the effect of the present invention can be obtained by using any method.

The vacuum deposition method is the most effective method for forming the thin film containing the catalytic element in the present invention. That is, the points when forming the catalytic element are:
This is because it is desired to allow the catalytic element to exist only on the surface of the diffusion prevention film without allowing the catalyst element to enter the diffusion prevention film as much as possible.
However, it is possible to deal with the sputtering method by making the power low, and it is also possible to deal with other methods.

As an application example of the present invention, a catalyst element is selectively introduced into a part of the amorphous silicon film and heated, so that the crystal growth occurs laterally (direction parallel to the substrate) from the introduced region. There is a way to do it. This lateral crystal growth region is
Inside it, needle-like crystals and columnar crystals with the growth direction aligned in one direction are crowded together, and the crystallinity is much better than in the region where the catalytic elements were directly introduced and random generation of crystal nuclei occurred. It has become an area.

When this lateral crystal growth region is irradiated with laser light or strong light, the crystal grain boundaries between needle-like crystals or columnar crystals are processed, and a crystalline silicon film that is almost a single crystal is obtained. Also in this case, by using the present invention as the method of introducing the catalytic element, lateral crystal growth can be efficiently performed. Here, the catalytic element that contributes to crystallization exists at the tips of needle-like crystals and columnar crystals, that is, at the tips of crystal growth.
In other words, if the catalytic element functions efficiently for crystallization, it means that the catalytic element exists only in the crystal growth tip portion where crystallization is performed, and almost does not exist in the already crystallized lateral crystal growth region. Become. In fact, the nickel concentration in this lateral crystal growth region when nickel is used as the catalyst element is 1 × 10 ^{18 to} 5 × 1 in the plasma treatment method.
While it was 0 ¹⁸ atoms / cm ³ , when the method of the present invention was used, it was 1 × 10 ^{16 to} 5 × 10 ¹⁶ atoms.
The value was as small as about 2 digits, which is / cm ³ .

The lower the concentration of the catalytic element introduced into the amorphous silicon film, the better, but if it is too low, it does not function to promote crystallization of the amorphous silicon film. As a result of examination by the present inventors, the minimum concentration of the catalytic element in which crystallization occurs is 1 × 10 ¹⁵ atoms / cm ³ , and at a concentration lower than this, crystal growth by the catalytic element does not occur.

Further, if the concentration of the catalytic element is high, the influence on the device becomes a problem. The phenomenon that occurs when the concentration of the catalyst element is high is mainly an increase in leak current in the off region of the TFT. It is understood that this is due to the influence of the impurity level formed by the catalytic element in the silicon film and the tunnel current through the level. As a result of examination by the present inventors,
The maximum concentration of the catalytic element that can suppress the influence on the device is 1 × 10 ¹⁹ atoms / cm ³ . Therefore, the concentration of the catalytic element in the film is 1 × 10 ^{15 to} 5 × 10 ¹⁹
If it is atoms / cm ³ , the catalytic element functions most effectively.

In the present invention, the most remarkable effect can be obtained when Ni is used as the catalyst element, but other types of catalyst elements that can be used include Co, Pd,
Pt, Cu, Ag, Au, In, Sn, Al, P, A
s and Sb can be used. A single element or a plurality of elements selected from these elements have a small amount of the effect of promoting crystallization, and therefore have little effect on the semiconductor element.

Each embodiment of the present invention will be described below. [Embodiment 1] FIG. 1 is a cross-sectional view for explaining a thin film transistor and a method of manufacturing the same according to a first embodiment of the present invention. FIGS. 1A to 1E are TF of this embodiment.
The manufacturing method of T is shown in the order of steps.

In the figure, reference numeral 100 denotes a semiconductor device having an N-type thin film transistor (TFT) 10.
Is formed on a glass substrate 101 with an insulating base film 102 such as a silicon oxide film interposed therebetween. The insulating base film 10
An island-shaped crystalline silicon film 103i forming the above TFT is formed on the TFT 2. This crystalline silicon film 103
A central portion of i is a channel region 111, and both side portions thereof are source and drain regions 112 and 113. An aluminum gate electrode 109 is provided on the channel region 111 via a gate insulating film 108. The surface of the gate electrode 109 is covered with an oxide layer 110. The entire surface of the TFT 10 is covered with an interlayer insulating film 114, and a contact hole 114a is formed in a portion of the interlayer insulating film 114 corresponding to the source / drain regions 112 and 113. The source / drain regions 112 and 113 have electrode wirings 115,
It is connected to 116.

In this embodiment, the crystalline silicon film 103i contains a catalytic element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in this film are in a substantially single crystal state. Of needle-like crystals or columnar crystals.

Of course, the TFT 10 of this embodiment can be used as an element constituting a driver circuit or a pixel portion of an active matrix type liquid crystal display device.
CPU mounted on the same substrate as these circuits and pixel parts
It can also be used as an element constituting the. In addition, T
The application range of FT is not limited to liquid crystal display devices,
It goes without saying that it can be applied to a thin film integrated circuit generally called.

Next, the manufacturing method will be described. First, a base film 102 made of silicon oxide and having a thickness of about 200 nm is formed on a glass substrate 101 by, for example, a sputtering method. This silicon oxide film is provided to prevent the diffusion of impurities from the glass substrate. Next, a thickness of 25 to 100 n is obtained by a low pressure CVD method or a plasma CVD method
An intrinsic (I-type) amorphous silicon film (a-Si film) 103 having a thickness of, for example, 80 nm is formed.

Next, as shown in FIG. 1A, the surface of the a-Si film is thinly oxidized to form a silicon oxide film 105. As a method at this time, first, the natural oxide film on the a-Si surface is removed by hydrofluoric acid cleaning, and then the surface of the a-Si film 103 is immersed in a mixed solution of sulfuric acid and hydrogen peroxide solution at about 80 ° C. for 10 minutes. To form an oxide film 105. The oxide film 105 thus formed has a thickness of about 1 to 2 nm. By forming the oxide film 105, the a-Si film 103 is formed.
The film thickness is reduced, but the reduction amount is 1 n in the case of this embodiment.
m or less, which is a level that can be ignored compared to the initially set film thickness.

Subsequently, a nickel thin film 106 is formed by, for example, a vacuum evaporation method. At this time, an appropriate film thickness is about 1 nm to 10 nm. Actually the a-Si film 103
The amount of Ni that contributes to the crystallization of
In the present invention, the control is performed not by the thickness of the nickel thin film but by the oxide film 1 serving as the buffer film.
The feature is that the film thickness is 05.

Then, this is annealed in a hydrogen reducing atmosphere or an inert atmosphere at a heating temperature of 520 to 580 ° C. for several hours to several tens of hours, for example, at 550 ° C. for 8 hours to be crystallized. At this time, the nickel thin film 106 deposited on the surface
Diffuses in the oxide film 105 and is atomically dispersed so that only a part thereof reaches the surface of the a-Si film 103. Then a
The nickel that reaches the surface of -Si becomes a nucleus, and the substrate 101
The crystallization of the amorphous silicon film 103 occurs in a direction perpendicular to the direction. At the same time as this crystallization, diffusion of nickel into the film occurs. As a result, the nickel concentration in the crystalline silicon film 103a is about 5 × 10 ¹⁷ atoms / cm ³ .

Subsequently, after removing the silicon oxide film 105, as shown in FIG. 1B, the crystalline silicon film 103a is formed.
The crystallinity is promoted by irradiating the surface with laser light.
As the laser light at this time, a XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec) is used. When the laser light is irradiated, the substrate is 200 to 45 at the time of irradiation.
It is kept so as to be heated to 0 ° C., for example, 400 ° C., and the energy density is 200 to 400 mj / cm ² , for example, 300.
It is performed at mj / cm ² .

Next, as shown in FIG. 1C, unnecessary portions of the crystalline silicon film 103a are removed to perform element isolation, and then the active regions (source / drain regions, channel regions) of the TFT are formed. The island-shaped crystalline silicon film 103i is formed.

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 108 so as to cover the crystalline silicon film 103i to be the active region. Here, TEO is used for forming the silicon oxide film.
Using S (Tetra Ethoxy Ortho Silicate) as a raw material, the substrate temperature is 150 to 600 ° C., preferably 300, together with oxygen.
Decomposition and deposition by RF plasma CVD method at ˜450 ° C. Alternatively, TEOS may be formed together with ozone gas by a low pressure CVD method or a normal pressure CVD method at a substrate temperature of 350 to 650 ° C, preferably 400 to 550 ° C. After the film formation, in order to improve the bulk characteristics of the gate insulating film itself and the interface characteristics between the crystalline silicon film and the gate insulating film, 400 to 6 in an inert gas atmosphere.
Anneal at 30 ° C. for 60 minutes.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 to 800 nm, for example 600 nm, is formed. Then, the aluminum film is patterned to form the gate electrode 109. Further, the surface of the aluminum electrode is anodized to form an oxide layer 110 on the surface (FIG. 1D). Here, the anodic oxidation is performed in an ethylene glycol solution containing tartaric acid in an amount of 1 to 5%, the voltage is first increased to 220 V with a constant current, and the state is maintained for 1 hour to complete the treatment. The thickness of the obtained oxide layer 110 is 200 nm. Note that the thickness of the oxide layer 110 has a length that defines the offset gate region in the subsequent ion doping process, and thus the length of the offset gate region can be determined in the anodizing process.

Next, an impurity (phosphorus) is implanted into the active region by ion doping using the gate electrode 109 and the oxide layer 110 around it as a mask. Phosphine (PH ₃ ) is used as the doping gas, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and the dose amount is 1 × 10.
^{It is set to 15} to 8 × 10 ¹⁵ cm ^-2 , for example, 2 × 10 ¹⁵ cm ^-2 . By this step, the regions 112 and 113 into which the impurities are implanted will later become the source and drain regions of the TFT, and the region 111 which is masked by the gate electrode 109 and the oxide layer 110 around it and in which the impurities are not implanted will later become the channel region of the TFT. Become.

Thereafter, as shown in FIG. 1D, annealing is performed by irradiation with laser light to activate the ion-implanted impurities, and at the same time, the crystal of the portion where the crystallinity is deteriorated in the above-mentioned impurity introduction step is performed. Improve sex. On this occasion,
The laser used is a XeCl excimer laser (wavelength 308 nm, pulse width 40 nsec), and irradiation is performed with an energy density of 150 to 400 mj / cm ² , preferably 200 to 250 mj / cm ² . The sheet resistance of the N-type impurity (phosphorus) regions 112 and 113 thus formed is 200 to 800 Ω / □.

Then, a silicon oxide film or a silicon nitride film having a thickness of about 600 nm is formed as an interlayer insulating film 114. When a silicon oxide film is used, if TEOS is used as a raw material and it is formed by a plasma CVD method of this and oxygen, or a low pressure CVD method or an atmospheric pressure CVD method of this and ozone, excellent step coverage is obtained. An interlayer insulating film is obtained. Further, if a silicon nitride film formed by plasma CVD using SiH ₄ and NH ₃ as source gases is used,
By supplying hydrogen atoms to the interface of the active region / gate insulating film,
This has the effect of reducing dangling bonds that deteriorate the FT characteristics.

Next, a contact hole 114a is formed in the interlayer insulating film 114, and the electrode wiring 11 of the TFT is made of a two-layer film of a metal material such as titanium nitride and aluminum.
5, 116 are formed. At this time, the titanium nitride film is provided as a barrier film for the purpose of preventing aluminum from diffusing into the semiconductor layer. And finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm, and then, as shown in FIG.
The TFT 10 shown in is completed.

When this TFT is used as an element for switching a pixel electrode, the electrode 115 or 116 is I
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used in a thin film integrated circuit, a contact hole may be formed also on the gate electrode 109 and necessary wiring may be provided.

NTF produced according to the above examples
T has a field effect mobility of 120 to 150 cm ² / Vs,
The S value was 0.2 to 0.4 V / digit, and the threshold voltage was 2 to 3 V, which was a good characteristic. Here, the S value is a rise coefficient in the sub-threshold region of the TFT, and in the graph showing the relationship between the gate voltage and the drain current, the slope of the graph at the point where the drain current sharply rises indicates that the drain current is 1 It is shown by the change in the gate voltage when the number of digits increases. In addition, variations in TFT characteristics within the substrate are
The field effect mobility was within ± 12%, and the threshold voltage was within ± 8%.

As described above, in this embodiment, the active region 103i formed on the surface of the insulating base film 102 of the substrate 101 is formed.
Has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film 103 by heating. Therefore, the crystalline silicon film 103a forming the active region, which is obtained by crystallization of the amorphous silicon film, is There is an effect that crystallinity higher than that obtained by a normal solid phase growth method can be obtained.

Further, since the crystallization of the amorphous silicon film 103 by heating is promoted by the catalytic element, the crystalline silicon film 103a of high quality can be formed with high productivity, and the heating required for crystallization at this time. Since the temperature is suppressed to 600 ° C. or lower, there is an effect that an inexpensive glass substrate can be used.

Further, since the crystalline silicon film 103i obtained by the heat treatment of the amorphous silicon film 103 is subjected to the laser light irradiation treatment, the silicon film 10 constituting the active region is formed.
The crystallinity of 3i can be further improved, and the field effect mobility of carriers in the active region can be further improved.

The concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , the amorphous silicon film 1
In crystallization of 03, there is an effect that this catalytic element can effectively function.

Further, a thin film 106 containing a catalytic element that promotes crystallization of the amorphous silicon film 103 is formed on the amorphous silicon film 103, and the catalytic element is made amorphous by thermal diffusion from the thin film 106. Since it is introduced into the silicon film 103, there is an effect that it is possible to reduce variations in the addition amount of the catalyst element within the substrate surface.

Further, the amorphous silicon film 10 of the above catalyst element
3 is introduced through the diffusion preventive film 105, so that most of the catalytic elements are transferred from the thin film 106 to the amorphous silicon film 1.
On the way to 03, it is trapped by the diffusion prevention film 105, which makes it possible to introduce the catalyst element in a necessary minimum amount. In addition, the thin film 10
Even if there is a variation in the concentration of the catalyst element in 6, the variation is alleviated when the catalyst element diffuses in the diffusion prevention film 105.

[Embodiment 2] FIGS. 2 (a) and 2 (b) are plan views for explaining a thin film transistor according to a second embodiment of the present invention and a method for manufacturing the same, and FIG. 3 is a view of A in FIG. 2 (a). −
FIGS. 3A to 3F are cross-sectional views corresponding to the line A ′ portion, and FIGS. 3A to 3F show a method of manufacturing the TFT of this embodiment in the order of steps.

In the figure, reference numeral 200 denotes a semiconductor device having a P-type thin film transistor (TFT) 20.
Is an N-type TFT in the semiconductor device of the first embodiment.
It has exactly the same sectional structure as 10. 2 and 3, the constituent elements of the present embodiment denoted by reference numerals in the 200 series are the same as those in the 100 series in the first embodiment shown in FIG. 1 except for the mask 204 made of a silicon nitride film or the like. It corresponds to the components with reference numerals. However, in this embodiment, the crystalline silicon film 203i has a lateral crystal region 20 formed by crystal growth in the direction parallel to the substrate surface from the crystallized silicon region 203a in the vicinity thereof.
It is a part of 3b. The crystallized silicon region 203a and the lateral crystal region 203b contain a catalytic element (Ni) that promotes crystallization of the amorphous silicon film by heat treatment, and the crystal grains in the film are needle-like in a substantially single crystal state. It is composed of crystals or columnar crystals.

Next, the manufacturing method will be described. First, a base film 202 made of silicon oxide having a thickness of about 200 nm is formed on the glass substrate 201 by, for example, a sputtering method. Next, an intrinsic (I-type) amorphous silicon film (a-Si film) 203 having a thickness of 25 to 100 nm, for example, 50 nm is formed by a low pressure CVD method or a plasma CVD method.

Next, a mask layer 204 made of a silicon oxide film, a silicon nitride film or the like and having a mask opening 204a at a predetermined position is formed on the amorphous silicon film 203.
In the opening 204a of the mask 204, the a-Si film 203 is exposed in a slit shape. That is, when the state of FIG. 3A is viewed from above, the a-Si film 203 is exposed in a slit shape in the region 200a, and the other portions are masked. Here, as shown in FIG.
The TFT 20 is manufactured with the source and drain regions 212 and 213 arranged side by side in the lateral crystal growth direction 207. As shown in FIG. 2B, the source and drain regions 212 and 21 are formed.
Even if the 3's are arranged in the direction perpendicular to the above-mentioned direction 207, the TFT can be produced by the same method without any problem.

After forming the mask 204, as shown in FIG.
As shown in (b), an oxide film 205 is formed in the region 200a where the surface of the a-Si film 203 is exposed. Oxide film 2
As a method of forming No. 05, a mixed solution of sulfuric acid and hydrogen peroxide solution was used as in Example 1 and was performed under the same conditions. Subsequently, a nickel thin film 206 is formed. At this time, the thickness of nickel is set to be 1 nm to 10 nm. In this embodiment, the thickness is about 5 nm. Then, in an inert atmosphere, for example, the heating temperature is 550 ° C.
Amorphous silicon film 203 after annealing for 16 hours
Is crystallized.

At this time, in the region 200a, the nickel thin film 206 diffuses in the oxide film 205 and a part of the nickel thin film 206 reaches the surface of the a-Si film 203. Then, a-Si
Substrate 201 with nickel reaching the surface of film 203 as a nucleus
Crystallization of the silicon film 203 occurs in a direction perpendicular to
The crystalline silicon film 203a is formed. Simultaneously with this crystallization, nickel diffuses into the film. As a result, the nickel concentration in the crystalline silicon film 203a is 1 × 10 ¹⁸ ato.
It is about ms / cm ³ . At this time, nickel is in the area 2
The portions other than 00a are blocked by the mask film 204 and cannot reach the underlying a-Si film 203. And
In the peripheral region of the region 200a, as shown by an arrow 207 in FIG. 3C, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 200a, and the crystalline silicon film 203b crystallized in the lateral direction is grown. Is formed. The other regions of the amorphous silicon film 203 remain as the amorphous silicon film regions 203c. The concentration of nickel in the laterally grown crystalline silicon film 203b is 5 × 10 ¹⁶ at.
The crystalline silicon film 20 has a crystallinity of about 0 ms / cm ³ and can be said to be a seed region thereof by directly adding nickel for crystal growth.
Compared to 3a, the value is smaller by one digit or more. In the above crystal growth, the distance of crystal growth in the direction parallel to the substrate indicated by arrow 207 is about 80 μm.

After that, the mask 204 and the oxide film 205 are formed.
Are removed, and unnecessary portions of the silicon film 203 are removed to perform element isolation. Through the above steps, an island-shaped crystalline silicon film 203i to be an active region (source / drain region and channel region) of the TFT later is formed (FIG. 3).
(D)).

Next, a silicon oxide film having a thickness of 20 to 150 nm, here 100 nm, is formed as the gate insulating film 208 so as to cover the crystalline silicon film 203i to be the active region. In this embodiment, a sputtering method is used as a method for forming the gate insulating film 208. For sputtering, silicon oxide is used as a target, and the substrate temperature during sputtering is 200 to 400 ° C., for example 350.
The sputtering atmosphere is oxygen and argon, and argon / oxygen = 0 to 0.5, for example, 0.1 or less.

Subsequently, by the sputtering method,
An aluminum film having a thickness of 400 nm is formed. Then, after patterning the aluminum film to form the gate electrode 209, the gate electrode 2 is formed by an ion doping method.
Impurity (boron) is implanted into the active region using 09 as a mask. Diborane (B ₂ H ₆ ) is used as a doping gas, the acceleration voltage is set to 40 kV to 80 kV, for example, 65 kV, and the dose amount is set to 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , for example, 5 × 10 ¹⁵ cm ⁻² . To do. By this step, the regions 212 and 213, into which the impurities are implanted, are formed in the source of the TFT later.
The region 211 that becomes the drain region and is masked by the gate electrode 209 and is not implanted with impurities will later become the channel region of the TFT.

After that, as shown in FIG. 3E, annealing is performed by laser light irradiation to activate the ion-implanted impurities, and at the same time, the crystal of the portion where the crystallinity is deteriorated in the above-mentioned impurity introduction step is performed. Improve sex. On this occasion,
The laser used is a KrF excimer laser (wavelength 248 nm, pulse width 20 nsec), energy density 150 to 400 mj / cm ² , preferably 20.
Irradiation was performed at 0 to 250 mj / cm ² . The sheet resistance of the P-type impurity (boron) regions 212 and 213 thus formed was 500 to 900 Ω / □.

Subsequently, a silicon oxide film having a thickness of about 600 nm is formed as an interlayer insulating film 214. In the case of using a silicon oxide film, TEOS is used as a raw material and a plasma CVD method of this and oxygen or a reduced pressure C of this and ozone is used.
If it is formed by the VD method or the atmospheric pressure CVD method, a good interlayer insulating film having excellent step coverage can be obtained.

Next, a contact hole 214a is formed in the interlayer insulating film 214, and the electrode wiring 21 of the TFT is made of a metal material such as a two-layer film of titanium nitride and aluminum.
5, 216 are formed. Finally, annealing is performed in a hydrogen plasma atmosphere at 350 ° C. for 30 minutes, and then, as shown in FIG.
The TFT 20 shown in (f) is completed.

When this TFT is used as an element for switching the pixel electrode, the electrode 215 or 216 is set to I.
It is connected to a pixel electrode made of a transparent conductive film such as TO, and a signal is input from the other electrode. When the present TFT is used in a thin film integrated circuit, a contact hole may be formed also on the gate electrode 209 and a necessary wiring may be provided.

PTF produced according to the above examples
T showed good characteristics such as field effect mobility of 35 to 50 cm ² / Vs, S value of 0.9 to 1.2 V / digit, and threshold voltage of -5 to -6 V. The variation of TFT characteristics in the substrate is ± 10% in field effect mobility and approximately ± 5 in threshold voltage.
It was within%.

In this embodiment, in addition to the effects of the above-mentioned embodiment, the catalytic element in the thin film 206 is selectively diffused into the amorphous silicon film 203 through the diffusion prevention film 205 by heat treatment. , The amorphous silicon 203 is selectively crystallized, and by the subsequent heat treatment, crystal growth is performed from the crystallized portion 203a in a direction 207 substantially parallel to the substrate surface, and the amorphous silicon film 203 is formed. Since the lateral crystal growth region 203b is formed, there is an effect that the crystallized region 203b having significantly better crystallinity can be obtained as compared with the region 203a into which the catalytic element is introduced.

[Embodiment 3] FIG. 4 is a plan view for explaining a thin film transistor according to a third embodiment of the present invention and a method for manufacturing the same, and FIG. 5 is a cross-sectional view corresponding to a portion taken along line BB ′ of FIG. 5A to 5E show the method of manufacturing the TFT of this embodiment in the order of steps.

In the figure, reference numeral 300 denotes a semiconductor device of this embodiment, which has a peripheral drive circuit of an active matrix type liquid crystal display device and a CMOS circuit 30 which constitutes a general thin film integrated circuit. This CMOS circuit is
The N-type TFT 31 and the P-type TFT 32 are connected so that they perform complementary operations, and are formed on the glass substrate 301.

The N-type TFT 31 and the P-type TFT 32 are respectively formed on the glass substrate 301 via an insulating base film 302 such as a silicon oxide film. The insulating base film 3
On 02, island-shaped crystalline silicon films 303n and 303p forming the TFTs 31 and 32 are formed adjacent to each other. Central portions of the crystalline silicon films 303n and 303p are an N channel region 311 and a P channel region 312, respectively. Both sides of the crystalline silicon film 303n are N-type source / drain regions 31 of an N-type TFT.
3, 314, both sides of the crystalline silicon film 303p are P-type source / drain regions 315, 316 of a P-type TFT.
Has become.

Aluminum gate electrodes 309 and 310 are provided on the N channel region 311 and the P channel region 312 with a gate insulating film 308 interposed therebetween.
Further, the entire surface of the TFTs 31 and 32 is the interlayer insulating film 317.
And the N-type TF of the interlayer insulating film 317.
A contact hole 317n is formed in a portion corresponding to the source / drain regions 313 and 314 of T31, and a contact hole 317p is formed in a portion of the interlayer insulating film 317 corresponding to the source / drain regions 315 and 316 of the P-type TFT 32. Has been formed. And the N-type TFT 31
The source / drain regions 313 and 314 are connected to the electrode wirings 318 and 319 through the contact holes 317n. Further, the source / drain regions 315 and 316 of the P-type TFT 32 have the contact holes 317.
It is connected to the electrode wirings 319 and 320 via p.

In the present embodiment, the crystalline silicon films 303n and 303p have one catalytic element addition region 303.
It is a part of the laterally grown crystalline silicon film 303b on both sides of the laterally grown crystal from a.

Next, the manufacturing method will be described. First, a base film 302 made of silicon oxide and having a thickness of about 100 nm is formed on the glass substrate 301 by, for example, a sputtering method. Next, a thickness of 25 to 10
An intrinsic (I-type) amorphous silicon film (a-Si film) 303 having a thickness of 0 nm, for example, 50 nm is formed.

Next, a mask layer 304 made of a silicon oxide film or a silicon nitride film having a thickness of about 50 nm is formed on the amorphous silicon film 303. The mask layer 304 is selectively removed to form a catalyst element injection opening 304a.

Inside the opening 304a, a slit-like a
-Si film 303 is exposed. That is, when the state of FIG. 5A is viewed from above, the a-Si film 303 is exposed in a slit shape in the region 300a, and the other portions are masked.

After forming the mask 304, as shown in FIG.
As shown in (b), an oxide film 305 is formed in a region 300a where the surface of the a-Si film 303 is exposed. Oxide film 3
As a method for forming 05, a thermal oxidation method is used in which the substrate is held in a water vapor atmosphere and heat treatment is performed at a temperature of about 600 ° C. With this method, it takes about 3 minutes in about 30 minutes.
An oxide film of about nm is formed. Subsequently, a nickel thin film 306 is formed thereon. At this time, the thickness of the nickel thin film 306 is set to be 1 nm to 10 nm.
In this embodiment, it is set to about 5 nm, for example. Then, under an inert atmosphere, for example, a heating temperature of 550
Amorphous silicon film 30 after annealing at 16 ° C. for 16 hours
Crystallization of 3 is performed.

At this time, in the region 300a, nickel diffuses in the oxide film 305, and a part of it diffuses into a-Si.
Reach the surface of the membrane 303. Then, the silicon film 303 is crystallized in the direction perpendicular to the substrate 301 using nickel that has reached the surface of the a-Si film 303 as a nucleus, and a crystalline silicon film 303a is formed. Simultaneously with this crystallization, nickel diffuses into the film. As a result, the crystalline silicon film 30
The nickel concentration in 3a is 5 × 10 ¹⁷ atoms / cm ³
It will be about. At this time, nickel is blocked by the mask film 304 in a portion other than the region 300, and the lower a-Si film 30 is formed.
You can't reach 3. Then, in the peripheral region of the region 300a, crystal growth is performed in the lateral direction (direction parallel to the substrate) from the region 300a as indicated by an arrow 307 in FIG. 303b is formed. Other amorphous silicon film 30
The region 3 remains as the amorphous silicon film region 303c as it is.

This laterally grown crystalline silicon film 3
The nickel concentration in 03b is 1 × 10 ¹⁶ atoms / cm 3.
It is about ³ and can be said to be a seed region thereof, compared with the crystalline silicon film 303a crystallized by directly adding nickel.
After all, the value is smaller by one digit or more. In addition, in the above crystal growth, the distance that the crystal growth advances in the direction parallel to the substrate indicated by the arrow 307 is about 80 μm.

Subsequently, the mask 304 and the oxide film 3 are formed.
05 is removed and laser light is irradiated to promote the crystallinity of the crystalline silicon film 303b. The laser light used at this time is a XeCl excimer laser (wavelength 308n).
m, pulse width 40 nsec) is used. The substrate is irradiated with laser light at a temperature of 200 to 450 ° C., for example, 400 at the time of irradiation.
The energy density is kept at 200 to 4
It is performed at 00 mj / cm ² , for example, 300 mj / cm ² .

After that, as shown in FIG.
The crystalline silicon film to be the active regions (element regions) 303n and 303p of the FT is left, and the other regions are removed by etching to perform element isolation.

Next, a 100 nm-thickness is formed so as to cover the crystalline silicon films 303n and 303p which will be the active regions.
Is formed as the gate insulating film 308.
In this embodiment, T is used as a method for forming the gate insulating film 308.
Using EOS as a raw material, with oxygen at a substrate temperature of 350 ° C
It is decomposed and deposited by the RF plasma CVD method.

Subsequently, as shown in FIG. 5D, an aluminum film (containing silicon of 0.1 to 2%) having a thickness of 400 to 800 nm, for example, 500 nm is formed by a sputtering method, and the aluminum film is patterned. Then, the gate electrodes 309 and 310 are formed.

Then, impurities (phosphorus and boron) are implanted into the active regions 303n and 303p by ion doping using the gate electrodes 309 and 310 as masks. Phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) are used as the doping gas. In the former case, the acceleration voltage is 60 to 90 kV, for example, 80 kV, and in the latter case,
The dose is 1 × 10 ¹⁵ to 8 × 10 ¹⁵ cm ⁻² , and phosphorus is 2 × 10, for example.
¹⁵ cm ^-2 and boron is 5 x 10 ¹⁵ cm ^-2 . By this step, the regions which are masked by the gate electrodes 309 and 310 and into which impurities are not implanted are later formed in the channel region 31 of the TFT.
It becomes 1,312. At the time of doping, a region where doping is unnecessary is covered with a photoresist, thereby selectively doping each element. As a result,
N-type impurity regions 313 and 314, P-type impurity region 3
15 and 316 are formed. As shown in FIG. 5D, an N channel type TFT (NTFT) and a P channel type TFT (P
TFT) can be formed.

Thereafter, as shown in FIG. 5D, annealing is performed by irradiation with laser light to activate the ion-implanted impurities. As the laser light, an XeCl excimer laser (wavelength 308 nm, pulse width 40 nse
Using c), the laser beam was irradiated under the condition of energy density of 250 mj / cm ² for 2 shots at one place.

Subsequently, as shown in FIG. 5E, the thickness 6
A silicon oxide film having a thickness of 00 nm is formed as an interlayer insulating film 317 by a plasma CVD method, contact holes 317n and 317p are formed therein, and an electrode wiring 318 of a TFT is formed by a two-layer film of a metal material such as titanium nitride and aluminum. 319 and 320 are formed. Finally, annealing is performed at 350 ° C. for 30 minutes in a hydrogen atmosphere of 1 atm to complete the TFTs 31 and 32.

CMOs produced according to the above examples
In the S structure circuit, the field effect mobility of each TFT is 150 to 180 cm ² / Vs for NTFT and PTFT.
At 120 to 140 cm ² / Vs, the threshold voltage is NT
FT has a very good characteristic of 1.5 to 2V and PTFT has a very good characteristic of -2 to -3V.

The third embodiment having such a structure also has the same effect as that of the second embodiment.

Although the third embodiment according to the present invention has been specifically described above, the present invention is not limited to the above-mentioned embodiments, and various modifications based on the technical idea of the present invention are possible. is there.

For example, in the above three examples,
As a method of introducing nickel, a method of performing crystal growth by performing thin film oxidation on the surface of an amorphous silicon film and forming a nickel thin film on it by vapor deposition to add a small amount of nickel and perform crystal growth is adopted. However, the oxide film formed on the surface of the amorphous silicon film may be formed not only by the above-mentioned thin film oxidation method but also by a usual deposition method. In addition, not only the above vapor deposition method but also the method for forming the nickel thin film,
A plating method, a low power sputtering method, and a CVD method can be used depending on the kind of the catalytic element.
Alternatively, before forming the amorphous silicon film, a nickel thin film or a thin oxide film may be formed on the base film, and nickel may be diffused from the lower layer to perform crystal growth. That is, crystal growth may be performed from the upper surface side or the lower surface side of the amorphous silicon film.

Further, as the impurity metal element which promotes crystallization, cobalt, palladium, platinum, copper, silver, gold, indium, tin, aluminum, phosphorus, arsenic and antimony can be used in addition to nickel, and the same effect can be obtained. can get.

Further, in the present embodiment, as a means for promoting the crystallinity of the crystalline silicon film, the heating method by irradiation of excimer laser which is a pulse laser is used, but other lasers (for example, continuous wave Ar laser) are also used. Similar processing is possible. Further, infrared light or light emitted from a flash lamp (so-called strong light) is used instead of laser light to raise the temperature to 1000 to 1200 ° C. (temperature of silicon monitor) in a short time to heat the sample.
TA (Rapid Thermal Annealing) or RT
A heat treatment also called P (rapid thermal process) may be used.

Further, as an application of the present invention, in addition to the active matrix type substrate for liquid crystal display, for example, a contact type image sensor, a driver built-in thermal head, an organic EL (Electroluminescence) element, etc. are used as the light emitting element. A driver-incorporated optical writing element, a display element, a three-dimensional IC, or the like can be considered. Here, the organic EL element is an electroluminescent element using an organic material as a light emitting material.
Further, by using the present invention, high performance such as high speed and high resolution of these elements can be realized.

Furthermore, the present invention is not limited to the MOS type transistors described in the above-mentioned embodiments, but is widely applied to all semiconductor processes of devices including a bipolar transistor using a crystalline semiconductor as an element material and an electrostatic induction transistor. can do.

[0129]

As described above, according to the semiconductor device of the present invention, the active region formed on the insulating surface of the substrate is
Since it has a structure containing a catalytic element that promotes crystallization of the amorphous silicon film by heating, the crystalline silicon film constituting the active region obtained by crystallization of the amorphous silicon film,
There is an effect that crystallinity higher than that obtained by a normal solid phase growth method can be obtained.

Further, the crystallization of the amorphous silicon film by heating is promoted by the catalytic element, so that a high quality crystalline silicon film can be formed with high productivity. Moreover, at this time, since the heating temperature required for crystallization is suppressed to 600 ° C. or lower, there is an effect that an inexpensive glass substrate can be used.

The concentration of the catalytic element in the film in the active region is set to 1 × 10 ¹⁵ atoms / cm ³ to 1 × 10 ^19.
Since it is set to atoms / cm ³ , there is an effect that this catalytic element can effectively function when the amorphous silicon film is crystallized.

According to the method of manufacturing a semiconductor device of the present invention, a thin film containing a catalytic element that promotes crystallization of an amorphous silicon film is formed on the amorphous silicon film, and thermal diffusion is performed from the thin film. Since the above catalyst element is introduced into the amorphous silicon film, there is an effect that it is possible to reduce variations in the addition amount of the catalyst element within the surface of the substrate.

Since the catalyst element is introduced into the amorphous silicon film through the diffusion preventive film, most of the catalyst element is introduced into the amorphous silicon film from the thin film to the amorphous silicon film. Therefore, the catalyst element can be introduced in the minimum necessary amount. Further, even if the concentration of the catalytic element in the thin film varies, the variation is mitigated when the catalytic element diffuses in the diffusion prevention film.

According to the method of manufacturing a semiconductor device of the present invention, the catalyst element in the thin film is selectively diffused into the amorphous silicon film through the diffusion prevention film by heat treatment, and Silicon is selectively crystallized, and by subsequent heat treatment, crystal growth is performed from the crystallized portion in a direction substantially parallel to the substrate surface to form a lateral crystal growth region in the amorphous silicon film. Therefore, there is an effect that a crystallized region having significantly better crystallinity can be obtained as compared with the region into which the catalytic element is introduced.

As described above, by using the present invention,
A semiconductor device having a high-performance thin film transistor having uniform and stable characteristics over a large-area substrate can be obtained by a simple manufacturing process. Especially in a liquid crystal display device, pixel switching TF required for an active matrix substrate
It is possible to realize a driver monolithic type active matrix substrate having an active matrix portion and a peripheral driving circuit portion on the same substrate while simultaneously satisfying the uniformity of the characteristics of T and the high performance required for the TFT constituting the peripheral driving circuit portion. ,
This has the effect of making the module compact, improving the performance, and reducing the cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view illustrating a semiconductor device and a manufacturing method thereof according to a first embodiment of the present invention.

FIG. 2 is a plan view illustrating a semiconductor device and a manufacturing method thereof according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view showing the method of manufacturing the semiconductor device of the second embodiment in the order of steps.

FIG. 4 is a plan view illustrating a semiconductor device and a method for manufacturing the same according to a third embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the method of manufacturing the semiconductor device of the third embodiment in the order of steps.

FIG. 6 is a diagram showing the relationship between the diffusion coefficient of the diffusion barrier film and the amount of catalytic element introduced into the amorphous silicon film.

[Explanation of symbols]

10, 20, 31 N-type TFT 30 CMOS circuit 32 P-type TFT 100, 200, 300 Semiconductor device 200a, 300a Nickel trace addition region 101, 201, 301 Glass substrate 102, 202, 302 Base insulating film 103, 203, 303 Non Crystalline silicon film 103a, 203a, 303a Crystalline silicon film 103i, 203i, 303n, 303p Active region 105, 205, 305 Oxide film 106, 206, 306 Catalyst element thin film 207, 307 Crystal growth direction 108, 208, 308 Gate insulation Films 109, 209, 309, 310 Gate electrodes 110 Anodized layers 111, 211, 311, 312 Channel regions 112, 113, 212, 213, 313, 314, 3
15, 316 Source / drain regions 114, 214, 317 Interlayer insulators 114a, 214a, 317n, 317p Contact holes 115, 116, 215, 216, 318, 319, 3
20 electrode wiring 203b, 303b lateral crystal growth region 204, 304 mask

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁶ Identification code Internal reference number FI technical display location H01L 29/786 21/336

Claims (13)

[Claims] 1. A substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film, wherein the active region is subjected to heat treatment or heating. Treatment and irradiation with a laser beam or intense light, contains a catalytic element that promotes crystallization of the amorphous silicon film, and the catalytic element contained in the active region is a thermal diffusion from a thin film containing the catalytic element. A semiconductor device which is introduced into the amorphous silicon film through a diffusion prevention film for the catalytic element. 2. A substrate having an insulating surface, and an active region formed on the insulating surface of the substrate by crystallizing an amorphous silicon film, the active region being crystallized in the vicinity thereof. The crystal grains are part of a lateral crystal growth region in which crystal grains are substantially in a single crystal state, which is formed by crystal growth proceeding in a direction parallel to the substrate surface. Alternatively, it contains a catalyst element that promotes crystallization of the amorphous silicon film by heat treatment and laser light or intense light irradiation treatment, and the catalyst element contained in the crystallization region is a thin film containing the catalyst element. A semiconductor device which is introduced into the amorphous silicon film through a diffusion prevention film for the catalytic element by thermal diffusion. 3. The semiconductor device according to claim 1, wherein the diffusion barrier film for the catalytic element has a diffusion coefficient for the catalytic element of 1/10 or less as compared with the amorphous silicon. 4. The semiconductor device according to claim 1, wherein the diffusion prevention film for the catalytic element is a silicon oxide film or a silicon nitride film. 5. The semiconductor device according to claim 1, wherein the catalyst element is Ni, Co, Pd, Pt, Cu,
A semiconductor device using one or a plurality of kinds of elements selected from Ag, Au, In, Sn, Al, P, As, and Sb. 6. The semiconductor device according to claim 1, wherein the concentration of the catalytic element in the active region is 1 × 10 ^15.
A semiconductor device having atoms / cm ³ to 1 × 10 ¹⁹ atoms / cm ³ . 7. A step of forming an amorphous silicon film on a substrate, a step of forming a diffusion preventive film for a catalytic element that promotes crystallization of the amorphous silicon film, and a thin film containing the catalytic element. Manufacturing a semiconductor device including a step of forming and a step of diffusing the catalytic element in the thin film into the amorphous silicon film through the diffusion prevention film by heat treatment and crystallizing the amorphous silicon Method. 8. A step of forming an amorphous silicon film on a substrate, a step of forming a diffusion prevention film for a catalytic element that promotes crystallization of the amorphous silicon film, and a thin film containing the catalytic element. By the step of forming and the heat treatment, the catalytic element in the thin film is selectively diffused into the amorphous silicon film through the diffusion preventive film, and
By the step of selectively crystallizing the amorphous silicon film and the subsequent heat treatment, crystal growth is carried out in a direction substantially parallel to the substrate surface from the crystallized portion, and the amorphous silicon film is laterally oriented in the lateral direction. And a step of forming a crystal growth region. 9. The method for manufacturing a semiconductor device according to claim 7, wherein after the amorphous silicon film is crystallized by the heat treatment, laser light or strong light is applied to the amorphous silicon film. A method of manufacturing a semiconductor device, comprising the step of irradiating and processing the crystal. 10. The method of manufacturing a semiconductor device according to claim 7, wherein a silicon oxide film or a silicon nitride film is formed as the diffusion prevention film. 11. The method of manufacturing a semiconductor device according to claim 10, wherein the silicon oxide film or the silicon nitride film as the diffusion prevention film is formed by thin film oxidation or thin film nitriding on the surface of the amorphous silicon film. Manufacturing method of semiconductor device. 12. The method of manufacturing a semiconductor device according to claim 7, wherein the thin film containing the catalytic element is formed by a vapor deposition method. 13. The method of manufacturing a semiconductor device according to claim 7, wherein the catalyst element is Ni, Co, Pd, Pt, Cu,
A method for manufacturing a semiconductor device, which uses one or more elements selected from Ag, Au, In, Sn, Al, P, As, and Sb.