JPH0740289Y2 - Off-delay timer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to an off-delay timer for delaying the operation of an output contact in sequence control or the like.

In the circuit that starts and stops the load device that is generally used in sequence control, the load device remains powered even if the automatic reset pushbutton start switch is turned on and the power is turned on. The self-holding circuit is configured as described above. However, in such a circuit, if the power supply fails momentarily, the self-holding circuit will be released, so the load device will remain stopped even if the power supply is restored, and the restart switch must be turned on again to restart the load. I have to. An off-delay timer is used in such a circuit to enable self-holding in case of a power failure within a predetermined time.

[Conventional technology]

A wiring diagram of a conventional off-delay timer is shown in FIG. Here, the power supply 1 is connected via a switch 2 to power the timer. Latching relay 4 is set coil 4a
And a reset coil 4b and an output contact (not shown), and the set coil 4a is connected to the power supply 1 via the current suppressing resistor 3 and the switch 2. The capacitor 6 for exciting the reset coil 4b is connected in series with the diode 5, and is connected to the power source 1 through the resistor 3 and the switch 2. In parallel with this capacitor 6, the reset coil 4b and the collector / emitter series circuit of the transistor 7 are connected in series. Are connected. Time circuit 8
Is connected in parallel with a capacitor 9 for driving it, and is connected to a power source 1 via a diode 10, a resistor 3 and a switch 2. The voltage detection circuit 11 is connected to the connection point of the switch 2 and the resistor 3 and the negative end of the power supply 1, and its output end is connected so as to prohibit the operation of the time limit circuit 8 when the power supply voltage is a predetermined value. Is connected to the base of the transistor 7.

When the switch 2 is turned on, the capacitor 6 is charged via the resistor 3 and the diode 5, and the capacitor 9 is charged via the resistor 3 and the diode 10. When the charging of both capacitors 6 and 9 progresses and becomes equal to or higher than the operating voltage of the coil 4a, the latching relay 4 is set and the output contact operates. The voltage detection circuit 11 detects the power supply voltage at the same time when the switch 2 is turned on,
The time limit operation of the time limit circuit 8 is prohibited. After that, when the switch 2 is turned off, the voltage detection circuit 11 detects the interruption of the power supply 1 and releases the prohibition of the timed operation of the timed circuit 8. Time circuit 8
Starts a timed operation with the electric charge of the capacitor 9, and causes a base current to flow through the transistor 7 after a lapse of a predetermined time. In this way, the transistor 7 is turned on, an exciting current flows from the capacitor 6 to the reset coil 4b, the latching relay 4 is reset, and the timer ends its operation.

[Problems to be solved by the device]

In the conventional off-delay timer as described above, when a long-time timer is to be configured, the capacitance of the capacitor 9 becomes large, and the time constant determined by the sum of both capacitors 6 and 9 and the resistor 3 becomes large. Since the voltage rise of the capacitors 6 and 9 is slow, the energization of the set coil 4a is delayed, and it takes time until the latching relay 4 is set after the power source 1 is turned on. That is, there is a drawback that the output contact cannot be driven quickly after the power is turned on. It is also possible to perform only the setting operation of the latching relay in a short time and then charge both capacitors 6 and 9, but in this way the latching relay 4 is set, but the reset capacitor 6 is still charged. However, if the switch 2 is turned on for a short time, the situation in which it cannot be reset occurs, which is inconvenient.

An object of the present invention is to provide an off-delay timer that can be set in a short time after power-on and can be reset in a short time thereafter.

[Means for Solving the Problems]

In order to solve the above problems, the present invention provides a power supply device, a two-winding latching relay having a set coil and a reset coil connected in parallel to the power supply device, and driving an output contact, and The first switching element connected in series to the reset coil of the winding latching relay, the time-limit circuit that issues a signal after a predetermined time has passed from starting, and turns on the first switching element, and the voltage of the power supply device. A drive capacitor that is charged and drives the time limit circuit; a first voltage detection circuit that detects the voltage of the power supply device and that prohibits the start of the time limit circuit when this voltage is at a predetermined value; and charging with the voltage of the power supply device An exciting capacitor for exciting the reset coil, a second voltage detecting circuit for detecting a charging voltage of the exciting capacitor, and an output of the second voltage detecting circuit. Is made of a driving capacitor is more driven and a second switching element connected to the power supply.

[Action]

Paying attention to the fact that if the excitation capacitor that excites the reset coil and the driving capacitor that drives the time circuit are separately charged, the excitation capacitor with a small electrostatic capacity will be charged quickly.First, charge the excitation capacitor and set the latching relay. The second voltage detection circuit, which has a higher detection voltage than the voltage, detects the charging completion of the excitation capacitor and turns on the second switching element that controls the charging of the driving capacitor with this voltage detection output, and starts charging the driving capacitor. To do. Therefore, when the power is turned on, the charging current to the driving capacitor having a large capacity does not flow, so that the exciting capacitor is quickly charged and the latching relay is quickly set. Then the drive capacitor is charged. In addition, as before, the first voltage detection circuit prohibits the timed operation of the timed circuit when a predetermined voltage is detected, and releases the operation prohibition of the timed circuit when the power is cut off, so that the timed circuit outputs an output after a predetermined time. Then, the first switching element is turned on, the reset coil is energized, and the latching relay is reset.

〔Example〕

FIG. 1 shows an embodiment of an off-delay timer according to the present invention. The same parts as those in FIG. 2 are designated by the same reference numerals as those in FIG. In FIG. 1, a power supply 1 or a voltage detection circuit 11
Since the same members as the conventional one are connected so as to play the same role as the conventional one, this point will be omitted. Only the points different from the conventional one will be described. A PNP transistor 12 having a collector connected in series, and a voltage detection circuit 13 connected between the connection point of the resistor 3 and the transistor 12 and the negative terminal of the power supply 1 for detecting the voltage of the exciting capacitor 6 are provided. That is. The output terminal of this voltage detection circuit 13 is a transistor
Connected to 12 bases.

With such a configuration, when the switch 2 is turned on, the resistance 3,
The capacitor 6 is charged via the diode 5. As the capacitor 6 is charged, the terminal voltages of the set coil 4a and the voltage detection circuit 13 also rise, and when the set voltage of the latching relay 4 is reached, the latching relay 4 is set and the output contact (not shown) is turned on. When the voltage further rises and reaches the detection voltage of the voltage detection circuit 13, the voltage detection output turns on the transistor 12 and charges the capacitor 9. The voltage detection circuit 11 detects the voltage application to this timer at the same time when the switch 2 is turned on, and prohibits the timed operation of the timed circuit 8. Next, when the switch 2 is turned off, the voltage detection circuit 11 releases the prohibition of the timed operation of the timed circuit 12, so that the timed circuit 8 starts the timed operation by the voltage of the capacitor 9.
After a lapse of a predetermined time, the timing circuit 8 emits a signal and turns on the transistor 7, so that the voltage of the capacitor 6 is applied to the reset coil 4b and the latching relay 4 is reset.
The output contact turns off, and a series of off-delay operations is completed.

[Effect of device]

In the off-delay timer according to the present invention, especially when a long-timer timer is to be configured, the capacitor for driving the timed circuit has a significantly larger capacitance than the capacitor for exciting the reset coil, but the set operation of the latching relay and the reset coil Since the timed circuit driving capacitor is charged after the charging of the exciting capacitor is completed, the latching relay can be set quickly after the power is turned on.

[Brief description of drawings]

FIG. 1 is a wiring diagram showing an embodiment of an off-delay timer according to the present invention, and FIG. 2 is a wiring diagram showing an example of a conventional off-delay timer. 1: Power supply, 4: Latching relay, 4a: Set coil, 4b: Reset coil, 6,9: Capacitor, 7,12: Transistor,
8: Timed circuit, 11, 13: Voltage detection circuit.

Claims (1)

[Scope of utility model registration request] 1. A two-winding latching relay having a power supply device, a set coil and a reset coil respectively connected in parallel to the power supply device, and driving an output contact, and a reset of the two-winding latching relay. A first switching element connected in series to the coil; a time-limit circuit that emits a signal after a predetermined time has passed from starting and turns on the first switching element; and a time-limit circuit that is charged by the voltage of the power supply device. A drive capacitor to be driven, a first voltage detection circuit that detects the voltage of the power supply device and inhibits the start of the time limit circuit when this voltage is a predetermined value, and the reset coil that is charged with the voltage of the power supply device excites Excitation capacitor, a second voltage detection circuit for detecting the charging voltage of the excitation capacitor, and the drive driven by the output of the second voltage detection circuit. Ofuderetaima characterized by comprising a capacitor and a second switching element connected to the power supply.