JPH0444856B2 - - Google Patents
Info
- Publication number
- JPH0444856B2 JPH0444856B2 JP60122070A JP12207085A JPH0444856B2 JP H0444856 B2 JPH0444856 B2 JP H0444856B2 JP 60122070 A JP60122070 A JP 60122070A JP 12207085 A JP12207085 A JP 12207085A JP H0444856 B2 JPH0444856 B2 JP H0444856B2
- Authority
- JP
- Japan
- Prior art keywords
- flip
- signal
- flop
- gate
- series
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000001228 spectrum Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 4
- 101000622430 Homo sapiens Vang-like protein 2 Proteins 0.000 description 2
- 102100023520 Vang-like protein 2 Human genes 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 101000622427 Homo sapiens Vang-like protein 1 Proteins 0.000 description 1
- 102100023517 Vang-like protein 1 Human genes 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
Description
【発明の詳細な説明】
Ａ 産業上の利用分野
本発明は、送信側からのＭ系列符号と受信側で
発生させたＭ系列符号との相関出力により所要の
情報伝送を行なうスペクトラム拡散通信方式
（Spread Spectrum Communication方式、以下
本明細書においてはSS通信方式と称する）にお
いて使用される、秘話性を付与するためのＭ系列
発生装置に関する。DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention is directed to a spread spectrum communication system (which transmits required information by outputting a correlation between an M-sequence code from a transmitting side and an M-sequence code generated at a receiving side). The present invention relates to an M-sequence generation device for imparting privacy, which is used in the Spread Spectrum Communication method (hereinafter referred to as the SS communication method).
Ｂ 発明の概要
送信側からのＭ系列符号と当該受信側で発生さ
せたＭ系列符号との相関出力により所望の情報伝
送を行なうSS通信方式において、送信側および
受信側の両Ｍ系列符号出力の種類および位相が任
意に変えられるようなＭ系列発生器が備えられ
る。Ｍ系列発生器の基本構成は単純型で、つぎに
発生しなければならないＭ系列符号の種類および
初期位相情報を記憶するためのラツチ機能を有す
る。マイクロプロセツサがラツチ手段に必要な情
報をセツトし、コード切換えは１クロツクパルス
幅のストローブ信号により行なわれる。B. Summary of the Invention In the SS communication system, which performs desired information transmission by the correlation output between the M-sequence code from the transmitting side and the M-sequence code generated at the receiving side, the M-sequence code output from both the transmitting side and the receiving side is An M-sequence generator is provided whose type and phase can be changed arbitrarily. The basic structure of the M-sequence generator is simple and has a latch function for storing the type of M-sequence code to be generated next and initial phase information. A microprocessor sets the necessary information in the latch means and code switching is effected by a one clock pulse width strobe signal.
Ｃ 従来の技術
Ｍ系列符号はその生成回路構成が非常に簡単な
ため、実際のSS通信において広く用いられてお
り、第４図は、そのような従来の単純型Ｍ系列発
生装置の構成を示すブロツク図で、図中SR1〜
SR6はフリツプフロツプ、は排他的ORゲート
を表わす。C. Prior Art The M-sequence code has a very simple generation circuit configuration and is therefore widely used in actual SS communications. FIG. 4 shows the configuration of such a conventional simple M-sequence generator. In the block diagram, SR 1 ~
SR 6 represents a flip-flop, and SR 6 represents an exclusive OR gate.
Ｄ 発明が解決しようとする問題点
しかしながらＭ系列符号は線形符号であり、暗
号性という点では非線形符号よりも劣つている。
このため従来は、秘話性という点からはＭ系列符
号は重要視されなかつた。D Problems to be Solved by the Invention However, the M-sequence code is a linear code and is inferior to non-linear codes in terms of cryptographic performance.
For this reason, conventionally, M-sequence codes were not considered important from the viewpoint of confidentiality.
本発明の目的は高い秘話性を有するSS通信方
式におけるＭ系列発生装置を提供することであ
る。 An object of the present invention is to provide an M-sequence generation device for an SS communication system that has high confidentiality.
Ｅ 問題点を解決するための手段
上記目的を達成するために、本考案によるSS
通信方式におけるＭ系列発生装置は、ストローブ
パルスの制御信号により入力信号をゲート制御す
るスイツチング手段、及び該スイツチング手段に
直列に接続されクロツク信号のエツジで信号を出
力するフリツプフロツプからなる直列回路が複数
直列に接続され、更に、上記各直列回路のフリツ
プフロツプ夫々の出力段に一方の入力端子が接続
された複数個のANDゲートと、上記各フリツプ
フロツプ回路の初期状態を保持する第１のラツチ
手段と、上記複数個のANDゲートの出力信号を
上記直列に接続された複数個の回路の切段のスイ
ツチング手段へ帰還する手段と、上記各フリツプ
フロツプ回路の帰還状態信号を保持し、上記
ANDゲートの第２の入力端子に信号を出力する
第２のラツチ手段と、上記ストローブ信号による
割込みパルスによりコード発生のためのフリツプ
フロツプ回路の初期状態および帰還状態を上記２
つのラツチ手段に設定するマイクロプロセツサと
を含むことを要旨とする。E Means for solving the problem In order to achieve the above purpose, the SS according to the present invention
An M-sequence generator in a communication system includes a plurality of series circuits, each consisting of a switching means for gate-controlling an input signal using a strobe pulse control signal, and a flip-flop connected in series to the switching means and outputting a signal at the edge of a clock signal. a plurality of AND gates, each of which has one input terminal connected to the output stage of each of the flip-flops of each of the series circuits, and a first latch means for holding the initial state of each of the flip-flop circuits; means for feeding back the output signals of the plurality of AND gates to the switching means of the plurality of circuits connected in series, and holding the feedback state signals of each of the flip-flop circuits;
A second latch means outputs a signal to the second input terminal of the AND gate, and an interrupt pulse generated by the strobe signal sets the initial state and feedback state of the flip-flop circuit for code generation to the above two states.
The gist of the present invention is to include a microprocessor for setting two latching means.
Ｆ 作用
本発明によるSS通信方式におけるＭ系列発生
装置は、直列に接続されたフリツプフロツプの状
態をセツトするラツチ手段を含んでおり、その内
容を次々に変えることによつて、Ｍ系列符号出力
の種類および位相を次々に変え、Ｍ系列符号を用
いるにも拘らず高い秘話性の通信を可能にする。F Function The M-sequence generation device for the SS communication system according to the present invention includes latch means for setting the states of flip-flops connected in series, and by changing the contents one after another, the type of M-sequence code output can be changed. and phases are changed one after another, enabling highly confidential communication even though M-sequence codes are used.
Ｇ 実施例
第１図は本発明によるSS通信方式における単
純型Ｍ系列発生装置の構成を示すブロツク図で、
図中Ｇはスイツチングゲート回路で、例えば第２
図に示すようなNANDゲートを用いて構成する
ことができる。G. Embodiment FIG. 1 is a block diagram showing the configuration of a simple M-sequence generator in the SS communication system according to the present invention.
G in the figure is a switching gate circuit, for example, the second
It can be configured using a NAND gate as shown in the figure.
今、Ｍ系列出力端子からはコードが出力され
ているものとする。この時、ストローブパルス
STB１が入力されるとつぎのように動作する。 It is now assumed that a code is being output from the M-series output terminal. At this time, the strobe pulse
When STB1 is input, it operates as follows.
ラツチ１の内容がゲート回路Ｇを通してフリツ
プフロツプSR1〜SRoの入力段にセツトされる。
このデータはクロツクパルスの立上がりエツジ○イ
によりフリツプフロツプの出力段にあらわれる。
なおラツチ１の内容とはフリツプフロツプSR1〜
SRoの初期状態のことである。 The contents of latch 1 are set through gate circuit G to the input stages of flip-flops SR 1 to SR o .
This data appears at the output stage of the flip-flop on the rising edge of the clock pulse.
The contents of latch 1 are flip-flop SR 1 ~
This is the initial state of SR o .
ラツチ３の内容がラツチ２から出力されて
ANDゲートAND1〜ANDoの制御が行なわれ、
帰還線h1〜hoがコードを発生できるような状態
になる。 The contents of latch 3 are output from latch 2.
AND gate AND 1 ~ AND o is controlled,
The feedback lines h 1 to ho are in a state where they can generate codes.
その結果、○イ以降のクロツクパルスにより新た
にコードがＭ系列出力端子から出力される。す
なわちコード出力がからへ切り換えられる。 As a result, a new code is output from the M-series output terminal by the clock pulses after ◯i. In other words, the code output is switched from to .
一方、ストローブパルスSTB１はマイクロプ
ロセツサへの割込みパルスとしても用いられ、こ
の割込みパルスをトリガにしてマイクロプロセツ
サは次に発生しなければならないコードのため
の準備を行なう。すなわち、コード発生のため
のフリツプフロツプSR1〜SRoの初期状態および
帰還状態をそれぞれラツチ１、ラツチ３にセツト
する。 On the other hand, the strobe pulse STB1 is also used as an interrupt pulse to the microprocessor, and using this interrupt pulse as a trigger, the microprocessor prepares for the next code to be generated. That is, the initial state and feedback state of flip-flops SR 1 to SR o for code generation are set in latches 1 and 3, respectively.
ストローブパルスSTB２が入力された時も上
記と同様の動作によりコード出力がからへ切
り換えられる。 When the strobe pulse STB2 is input, the code output is switched from to to by the same operation as above.
Ｈ 発明の効果
以上説明した通り、本発明によれば、Ｍ系列符
号出力の種類および位相が次々に変えられるか
ら、Ｍ系列符号を用いているにも拘らず高い秘話
性の通信を可能にする。また帰還線の状態ばかり
でなくフリツプフロツプの初期状態も任意に設定
できるので、コードの種類および初期位相の組合
わせにより通信チヤンネル数も拡大できる。さら
に、回路構成が非常に簡単なため、モノリシツク
IC化が可能であり、安価で高信頼性を有するＭ
系列符号発生器を実現することができる。H. Effects of the Invention As explained above, according to the present invention, since the type and phase of the M-sequence code output are changed one after another, highly confidential communication is possible despite using the M-sequence code. . Furthermore, since not only the state of the feedback line but also the initial state of the flip-flop can be set arbitrarily, the number of communication channels can be expanded by combining the types of codes and initial phases. In addition, the circuit configuration is very simple, making it a monolithic
M that can be integrated into IC, is inexpensive and highly reliable
A sequence code generator can be implemented.
第１図は本発明によるSS通信方式における単
純型Ｍ系列発生装置の構成を示すブロツク図、第
２図はスイツチングゲート回路の構成の一例を示
す図、第３図は第１図に示す装置の動作を説明す
るためのタイミングチヤート、第４図は、従来の
単純型Ｍ系列発生装置の構成を示すブロツク図で
ある。
SR1〜SRo…フリツプフロツプ、Ｇ…スイツチ
ングゲート回路。
FIG. 1 is a block diagram showing the configuration of a simple M-sequence generator in the SS communication system according to the present invention, FIG. 2 is a diagram showing an example of the configuration of a switching gate circuit, and FIG. 3 is the device shown in FIG. 1. FIG. 4 is a timing chart for explaining the operation of the conventional M-sequence generator. SR 1 ~ SR o ...Flip-flop, G...Switching gate circuit.
Claims (1)
をゲート制御するスイツチング手段、及び該スイ
ツチング手段に直列に接続されクロツク信号のエ
ツジで信号を出力するフリツプフロツプからなる
直列回路が複数直列に接続され、更に、 上記各直列回路のフリツプフロツプ夫々の出力
段に一方の入力端子が接続された複数個のAND
ゲートと、 上記各フリツプフロツプの初期状態を保持する
第１のラツチ手段と、 上記複数個のANDゲートの出力信号を上記複
数の直列回路の初段のスイツチング手段へ帰還す
る手段と、 上記各フリツプフロツプの帰還状態信号を保持
し、上記ANDゲートの他方の入力端子に信号を
出力する第２のラツチ手段と、 上記ストローブ信号による割込みパルスにより
コード発生のためのフリツプフロツプの初期状態
及び帰還状態を上記２つのラツチ手段に設定する
マイクロプロセツサと、を含むことを特徴とする
スペクトラム拡散通信方式におけるＭ系列符号発
生装置。[Scope of Claims] 1. A plurality of series circuits are connected in series, each consisting of a switching means that gate-controls an input signal using a strobe pulse control signal, and a flip-flop that is connected in series to the switching means and outputs a signal at the edge of a clock signal. and furthermore, a plurality of ANDs in which one input terminal is connected to the output stage of each flip-flop in each of the above series circuits.
a gate, first latch means for holding the initial state of each of the flip-flops, means for feeding back the output signals of the plurality of AND gates to the first-stage switching means of the plurality of series circuits, and feedback of each of the flip-flops. a second latch means for holding a state signal and outputting the signal to the other input terminal of the AND gate; and an interrupt pulse generated by the strobe signal to set the initial state and feedback state of the flip-flop for code generation to the two latches. An M-sequence code generation device in a spread spectrum communication system, comprising: a microprocessor configured as a means for generating an M-sequence code.
Priority Applications (6)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60122070A JPS61280134A (en) | 1985-06-05 | 1985-06-05 | M series code generator in spread spectrum communication system |
| US06/870,204 US4785410A (en) | 1985-06-05 | 1986-06-02 | Maximum length shift register sequences generator |
| NL8601440A NL8601440A (en) | 1985-06-05 | 1986-06-04 | GENERATOR FOR SLIDE REGISTRATION SERIES WITH MAXIMUM LENGTH. |
| FR868608073A FR2583239B1 (en) | 1985-06-05 | 1986-06-04 | REGISTRY SEQUENCE GENERATOR WITH MAXIMUM LENGTH SHIFT |
| GB08613513A GB2178273B (en) | 1985-06-05 | 1986-06-04 | Maximum length shift register sequences generator |
| DE3618865A DE3618865C2 (en) | 1985-06-05 | 1986-06-05 | Maximum length shift register switching sequence generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60122070A JPS61280134A (en) | 1985-06-05 | 1985-06-05 | M series code generator in spread spectrum communication system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61280134A JPS61280134A (en) | 1986-12-10 |
| JPH0444856B2 true JPH0444856B2 (en) | 1992-07-23 |
Family
ID=14826893
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60122070A Granted JPS61280134A (en) | 1985-06-05 | 1985-06-05 | M series code generator in spread spectrum communication system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61280134A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07202754A (en) * | 1993-12-28 | 1995-08-04 | Nec Corp | Spread code generator |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60176322A (en) * | 1984-02-22 | 1985-09-10 | Omron Tateisi Electronics Co | M sequence code generator |
-
1985
- 1985-06-05 JP JP60122070A patent/JPS61280134A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60176322A (en) * | 1984-02-22 | 1985-09-10 | Omron Tateisi Electronics Co | M sequence code generator |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61280134A (en) | 1986-12-10 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |