JP7398242B2 - Substrate processing method and substrate processing system - Google Patents

Description

The present disclosure relates to a substrate processing method and a substrate processing system.

Patent Document 1 describes a process of irradiating a laser beam from one side of a wafer along the outer circumferential edge at a position inside the outer circumferential edge by a predetermined amount to remove the outer circumferential portion of the wafer, and a process of removing the outer circumferential portion of the wafer. A method for grinding a wafer is disclosed, which includes the step of grinding a surface to be ground to a predetermined finished thickness. According to the grinding method described in Patent Document 1, a wafer can be ground to a predetermined thickness without producing a knife edge on the outer peripheral edge of the wafer.

Japanese Patent Application Publication No. 2006-108532

The technology according to the present disclosure appropriately removes the peripheral edge of a first substrate in a polymerized substrate in which the substrates are joined together.

One aspect of the present disclosure is a method of processing a polymerized substrate in which a first substrate and a second substrate are bonded, the method comprising: a peripheral portion of the first substrate to be removed; and a central portion of the first substrate. forming a peripheral edge modified layer inside the first substrate by irradiating a laser beam along the boundary of the first substrate so as not to overlap the identification information engraved on the first substrate; removing the peripheral edge from the modified layer; measuring the position and size of the identification information on the first substrate; and removing the peripheral edge of the modified peripheral layer based on the measurement results of the identification information. and determining a forming position .

According to the present disclosure, in a polymerized substrate in which substrates are joined to each other, the peripheral edge portion of the first substrate can be appropriately removed.

FIG. 2 is an explanatory diagram showing an example of the configuration of a polymerized wafer processed in a wafer processing system. FIG. 1 is a plan view schematically showing an example of the configuration of a wafer processing system. FIG. 2 is a flow diagram showing an example of main steps of wafer processing. FIG. 2 is an explanatory diagram showing an example of main steps of wafer processing. FIG. 2 is an explanatory diagram showing an example of main steps of wafer processing. FIG. 2 is an explanatory diagram showing an example in which a peripheral modified layer and a divided modified layer are formed on a first wafer in this embodiment. FIG. 2 is an explanatory diagram showing an example in which a peripheral modified layer and a divided modified layer are formed on a first wafer in the related art. FIG. 2 is an explanatory diagram showing an example in which a peripheral modified layer and a divided modified layer are formed on a first wafer in this embodiment. FIG. 3 is an explanatory diagram of the influence of stress generated inside the first wafer. It is an explanatory view showing the effect of a crack in this embodiment. FIG. 7 is an explanatory diagram showing an example of another method of separating the first wafer.

In recent years, in the manufacturing process of semiconductor devices, a semiconductor substrate (hereinafter referred to as a "wafer") on which multiple devices such as electronic circuits are formed on the surface of a polymerized substrate in which substrates are bonded together, Wafers are thinned by grinding the backside.

Incidentally, the peripheral edge of the wafer is usually chamfered, but when the wafer is subjected to the grinding process as described above, the peripheral edge of the wafer becomes sharply pointed (so-called knife edge shape). In this case, chipping may occur at the periphery of the wafer, and the wafer may be damaged. Therefore, a so-called edge trim is performed in which the peripheral edge of the wafer is shaved in advance before the grinding process.

The grinding method described in Patent Document 1 mentioned above is a grinding method for suppressing the formation of this knife edge shape on the outer peripheral portion of the wafer. In this method, a laser beam is irradiated along the outer circumferential edge of the wafer at a predetermined distance inside the outer circumferential edge of the wafer to form a modified layer, and the outer circumferential portion of the wafer is removed.

Here, the outer circumferential portion is, for example, in a range of 0.5 mm to 3 mm in the radial direction from the outer circumferential edge of the wafer, and a wafer ID is usually stamped on the outer circumferential portion as identification information for identifying the wafer. The wafer ID is processed using a laser marker, for example, and is recessed from the wafer surface. As a result of extensive studies, the inventor found that if the wafer ID is engraved on the incident surface of the laser beam when performing edge trim, the incident surface will become rough when the laser beam passes through the wafer ID, and the It was found that the light was not focused at a certain position and the light focusing degree deteriorated. As a result, the processing accuracy (modification accuracy) of the wafer by the laser beam deteriorates, and the cracks that grow from the modified layer meander, resulting in a deterioration in trim accuracy and the quality of the wafer after edge trimming. Getting worse.

However, the grinding method described in Patent Document 1 does not take into account the influence of the wafer ID on edge trim at all, and as a result, the outer peripheral portion of the wafer may not be appropriately removed. Therefore, there is room for improvement in conventional edge trim.

Therefore, the technology according to the present disclosure appropriately removes the peripheral portion of the first substrate in a polymerized substrate in which the substrates are joined together. Hereinafter, a wafer processing system as a substrate processing system and a wafer processing method as a substrate processing method according to the present embodiment will be described with reference to the drawings. Note that in this specification and the drawings, elements having substantially the same functional configuration are designated by the same reference numerals and redundant explanation will be omitted.

In a wafer processing system 1 according to the present embodiment, which will be described later, as shown in FIG. The process is performed on the polymerized wafer T. Then, in the wafer processing system 1, the first wafer W1 is thinned while removing the peripheral edge We of the first wafer W1. Hereinafter, in the first wafer W1, the surface joined to the second wafer W2 will be referred to as the front surface W1a, and the surface opposite to the front surface W1a will be referred to as the back surface W1b. Similarly, in the second wafer W2, the surface joined to the first wafer W1 is referred to as a front surface W2a, and the surface opposite to the front surface W2a is referred to as a back surface W2b.

The first wafer W1 is a semiconductor wafer such as a silicon substrate, and has a device layer D including a plurality of devices formed on its surface W1a. A surface film F is further formed on the device layer D, and is bonded to the second wafer W2 via the surface film F. Examples of the surface film F include an oxide film (SiO ₂ film, TEOS film), SiC film, SiCN film, adhesive, and the like. Note that the peripheral edge We of the first wafer W1 is chamfered, and the cross section of the peripheral edge We becomes thinner toward its tip. Further, the peripheral edge We is a portion to be removed in edge trim, which will be described later, and ranges from 0.5 mm to 3 mm in the radial direction from the outer end of the first wafer W1, for example.

The second wafer W2 has, for example, the same configuration as the first wafer W1, and a device layer D and a surface film F are formed on the front surface W2a, and the peripheral edge is chamfered. Note that the second wafer W2 does not need to be a device wafer on which the device layer D is formed, and may be a support wafer that supports the first wafer W1, for example. In such a case, the second wafer W2 functions as a protective material that protects the device layer D on the front surface W1a of the first wafer W1.

In the wafer processing system 1 of this embodiment, the first wafer W1 in the stacked wafer T is thinned by separating it into a front surface W1a side and a back surface W1b side. In the following description, the separated first wafer W1 on the front surface W1a side will be referred to as a first separated wafer Wd1, and the separated first wafer W1 on the back surface W1b side will be referred to as a second separated wafer Wd2. The first separated wafer Wd1 has a device layer D and is manufactured into a product. The second separated wafer Wd2 is reused. Note that the first separated wafer Wd1 refers to the first wafer W1 bonded to the second wafer W2, and the second wafer W2 may also be referred to as the first separated wafer Wd1. Further, the separated surfaces of the first separated wafer Wd1 and the second separated wafer Wd2 may be respectively referred to as separated surfaces.

As shown in FIG. 2, the wafer processing system 1 has a configuration in which a loading/unloading station 2 and a processing station 3 are integrally connected. For example, the loading/unloading station 2 is configured to load/unload cassettes Ct, Cw1, and Cw2 each capable of accommodating a plurality of stacked wafers T, a plurality of first separated wafers Wd1, and a plurality of second separated wafers Wd2. It will be done. The processing station 3 is equipped with various processing devices that perform desired processing on the polymerized wafer T.

In this embodiment, the cassette Ct and the cassette Cw1 are provided separately, but they may be the same cassette. That is, the cassette that accommodates the unprocessed superimposed wafers T and the cassette that accommodates the processed first separated wafers Wd1 may be used in common.

The loading/unloading station 2 is provided with a cassette mounting table 10. In the illustrated example, a plurality of cassettes, for example, three cassettes Ct, Cw1, and Cw2, can be placed on the cassette mounting table 10 in a line in the Y-axis direction. Note that the number of cassettes Ct, Cw1, and Cw2 placed on the cassette mounting table 10 is not limited to this embodiment, and can be arbitrarily determined.

In the loading/unloading station 2, a wafer transfer device 20 is provided adjacent to the cassette mounting table 10 on the X-axis negative direction side of the cassette mounting table 10. The wafer transport device 20 is configured to be movable on a transport path 21 extending in the Y-axis direction. Further, the wafer transport device 20 includes, for example, two transport arms 22, 22 that hold and transport the stacked wafers T. Each transport arm 22 is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. Note that the configuration of the transport arm 22 is not limited to this embodiment, and may have any configuration. The wafer transport device 20 is configured to be able to transport the stacked wafers T to the cassettes Ct, Cw1, Cw2 of the cassette mounting table 10, and a transition device 30 to be described later.

The loading/unloading station 2 is provided with a transition device 30 for transferring the stacked wafers T adjacent to the wafer conveying device 20 on the X-axis negative direction side of the wafer conveying device 20 .

The processing station 3 is provided with, for example, three processing blocks G1 to G3. The first processing block G1, the second processing block G2, and the third processing block G3 are arranged in this order from the X-axis positive direction side (carry-in/out station 2 side) to the negative direction side.

The first processing block G1 is provided with an etching device 40, a cleaning device 41, and a wafer transfer device 50. The etching device 40 and the cleaning device 41 are arranged in a stacked manner. Note that the number and arrangement of the etching device 40 and the cleaning device 41 are not limited to these. For example, the etching device 40 and the cleaning device 41 may be placed side by side in the X-axis direction. Further, the etching device 40 and the cleaning device 41 may be stacked.

The etching device 40 performs an etching process on the ground surface of the first wafer W1 that has been ground by a processing device 80, which will be described later. For example, a chemical solution (etching solution) is supplied to the ground surface to perform wet etching on the ground surface. For example, HF, HNO ₃ , H ₃ PO ₄ , TMAH, Choline, KOH, etc. are used as the chemical solution.

The cleaning device 41 cleans the ground surface of the first wafer W1 that has been ground by a processing device 80, which will be described later. For example, a brush is brought into contact with the ground surface to scrub and clean the ground surface. Note that a pressurized cleaning liquid may be used to clean the grinding surface. Further, the cleaning device 41 may be configured to clean the back surface W2b of the second wafer W2 as well as the ground surface of the first wafer W1.

The wafer transport device 50 is arranged, for example, on the Y-axis negative direction side of the etching device 40 and the cleaning device 41. The wafer transport device 50 has, for example, two transport arms 51 and 51 that hold and transport the stacked wafer T. Each transport arm 51 is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. Note that the configuration of the transport arm 51 is not limited to this embodiment, and may have any configuration. The wafer transfer device 50 transfers the polymerized wafer T to a transition device 30, an etching device 40, a cleaning device 41, an interface modification device 60 (described later), an internal modification device 61 (described later), and a peripheral edge removal device 62 (described later). It is configured to be transportable.

The second processing block G2 is provided with an interface modification device 60, an internal modification device 61 as a modification section and another modification section, a peripheral edge removal device 62 as a removal section, and a wafer transfer device 70. . The interface modification device 60, the internal modification device 61, and the peripheral edge removal device 62 are arranged in a stacked manner. Note that the number and arrangement of the interface reforming device 60, internal reforming device 61, and peripheral edge removing device 62 are not limited to these. For example, the interface reforming device 60, the internal reforming device 61, and the peripheral edge removing device 62 may be placed side by side in the X-axis direction. Furthermore, the interface reforming device 60, the internal reforming device 61, and the peripheral edge removing device 62 may be stacked.

The interface modification device 60 modifies the outer periphery of the device layer D by, for example, irradiating the outer periphery of the device layer D of the first wafer W1 with laser light (interface laser light, for example, CO ₂ laser). More specifically, the interface between the first wafer W1 and the device layer D at the peripheral edge We of the first wafer W1 to be removed is modified. As a result, an unbonded region Ae in which the bonding strength between the first wafer W1 and the second wafer W2 is reduced is formed in the peripheral portion We of the first wafer W1.

The internal modification device 61 irradiates the inside of the first wafer W1 with laser light (laser light for internal use, for example, YAG laser) to form a peripheral modified layer M1, a divided modified layer M2, and an internal surface modified layer M3. form. The peripheral edge modified layer M1 serves as a base point when the peripheral edge We is peeled off in edge trim, which will be described later. The divided modified layer M2 serves as a base point for dividing the peripheral edge We to be removed into small pieces. The internal surface modified layer M3 serves as a base point when separating the first wafer W1 into a first separated wafer Wd1 and a second separated wafer Wd2.

The peripheral edge removing device 62 removes the peripheral edge We of the first wafer W1, that is, performs edge trim, using the peripheral modified layer M1 and divided modified layer M2 formed in the internal reforming device 61 as base points. The edge trimming method can be arbitrarily selected.

The wafer transport device 70 is arranged, for example, on the Y-axis positive direction side of the interface modification device 60, the internal modification device 61, and the peripheral edge removal device 62. The wafer transport device 70 has, for example, two transport arms 71, 71, which transport the superposed wafer T by suctioning and holding it with a suction and holding surface (not shown). Each transport arm 71 is supported by a multi-jointed arm member 72 and is configured to be movable in the horizontal direction, vertical direction, around the horizontal axis, and around the vertical axis. Note that the configuration of the transport arm 71 is not limited to this embodiment, and may have any configuration. The wafer transport device 70 is configured to be able to transport the polymerized wafer T to the etching device 40, the cleaning device 41, the interface modification device 60, the internal modification device 61, the peripheral edge removal device 62, and the processing device 80 described later. has been done.

A processing device 80 is provided in the third processing block G3. Note that the number and arrangement of processing devices 80 are not limited to the illustrated example, and a plurality of processing devices 80 may be arbitrarily arranged.

The processing device 80 has a rotary table 81. The rotary table 81 is configured to be rotatable about a vertical rotation center line 82 by a rotation mechanism (not shown). Two chucks 83 are provided on the rotary table 81 to hold the stacked wafers T by suction. The chucks 83 and the rotary table 81 are equally arranged on the same circumference. The two chucks 83 are movable to the delivery position A0 and the processing position A1 as the rotary table 81 rotates. Further, each of the two chucks 83 is configured to be rotatable around a vertical axis by a rotation mechanism (not shown).

At the delivery position A0, the stacked wafers T are delivered. A grinding unit 84 is arranged at the processing position A1, and grinds the first wafer W1. The grinding unit 84 has a grinding section 85 that includes an annular and rotatable grinding wheel (not shown). Further, the grinding section 85 is configured to be movable in the vertical direction along the support column 86. Then, with the overlapping wafer T held by the chuck 83 in contact with the grinding wheel, the chuck 83 and the grinding wheel are rotated, respectively.

The wafer processing system 1 described above is provided with a control device 90 as a control section. The control device 90 is, for example, a computer and has a program storage section (not shown). The program storage unit stores a program for controlling the processing of the stacked wafers T in the wafer processing system 1. The program storage unit also stores programs for controlling the operations of drive systems such as the various processing devices and transport devices described above to realize wafer processing in the wafer processing system 1, which will be described later. Note that the program may be one that has been recorded on a computer-readable storage medium H, and may have been installed in the control device 90 from the storage medium H.

Next, wafer processing performed using the wafer processing system 1 configured as above will be described. Note that in this embodiment, the first wafer W1 and the second wafer W2 are bonded in a bonding device (not shown) outside the wafer processing system 1 to form a superposed wafer T in advance.

First, a cassette Ct containing a plurality of stacked wafers T shown in FIG. 4A is placed on the cassette mounting table 10 of the loading/unloading station 2.

Next, the superposed wafer T in the cassette Ct is taken out by the wafer transport device 20 and transported to the transition device 30.

Subsequently, the wafer transport device 50 takes out the superposed wafer T from the transition device 30 and transports it to the internal reforming device 61 . In the internal reforming device 61, as shown in FIG. 4(b), the inside of the first wafer W1 is irradiated with laser beams L1 and L2 to sequentially form a peripheral modified layer M1 and a divided modified layer M2 ( 3 step S1). In addition, in order to avoid the complexity of illustration, illustration of the divided|segmentation modified layer M2 is abbreviate|omitted in the drawing of FIG.4(c), (d), and FIG.5.

In forming the peripheral modified layer M1, while rotating the polymerized wafer T (first wafer W1), the inside of the first wafer W1 is periodically irradiated with laser light L1 from a laser head (not shown). . Thereby, the peripheral edge modified layer M1 is formed in an annular shape substantially concentric with the bonded area Ac (unbonded area Ae) along the boundary between the peripheral edge We and the center Wc of the first wafer W. Note that the number of peripheral modified layers M1 formed in the thickness direction of the first wafer W1 is not limited to the illustrated example, and can be arbitrarily determined.

Here, the formation position of the peripheral edge modification layer M1 is determined based on, for example, the edge or center position of the first wafer W1, and is slightly smaller than the inner end of the unbonded area Ae that will be formed later in the interface modification device 60. Formed radially inward. Ideally, the peripheral modified layer M1 is formed at a position that overlaps the boundary between the bonded area Ac and the unbonded area Ae (hereinafter simply referred to as the "boundary"), but due to processing errors, for example, the peripheral modified layer M1 Layer M1 may be formed out of alignment. As a result, when the peripheral edge modified layer M1 is formed at a position radially outward from the boundary, that is, in the unbonded area Ae, the first The wafer W1 may end up floating. If the first wafer W1 is in a floating state in this way, the edge of the first wafer W1 may be chipped during subsequent wafer processing or wafer transportation, which may cause contamination.

In this respect, by controlling the peripheral modified layer M1 to be formed radially inward from the boundary, even if the formation position is shifted due to processing errors, for example, it can be formed at a position overlapping the boundary or radially inward from the boundary. Even if there is, the peripheral modified layer M1 can be formed at a position close to the boundary, and formation of the peripheral modified layer M1 at a position away from the boundary in the radial direction can be suppressed.

Further, as shown in FIG. 6, a wafer ID is stamped on the back surface W1b of the first wafer W1 near the notch Wn as identification information of the first wafer W1. The wafer ID is processed using a laser marker, for example, and is recessed from the back surface W1b.

Here, as in the conventional case, when the inside of the first wafer W1 is irradiated with a laser beam and the peripheral modified layer M1 is formed in a circular shape as shown in FIG. It may take some time. In such a case, when the laser beam passes through the wafer ID, the incident surface of the laser beam becomes rough, and after the laser beam is incident, the laser beam is not focused at an appropriate position, resulting in a worsening of the light focusing degree. As a result, the processing quality of the peripheral modified layer M1 by the laser beam deteriorates.

Therefore, in this embodiment, as shown in FIGS. 6 and 8, the laser beam L1 is irradiated so as not to overlap the wafer ID to form the peripheral modified layer M1. The position and size of the wafer ID on the first wafer W1 are known in advance when the stacked wafer T is transferred to the wafer processing system 1, and the laser beam L1 is irradiated so as to avoid the wafer ID. Then, the peripheral edge modification layer M1 is formed on the radially inner side of the wafer ID. As a result, it is possible to form a peripheral modified layer M1 with appropriate processing quality. Note that the shape of the peripheral modified layer M1 around the wafer ID is arbitrary. The peripheral modified layer M1 may be formed substantially linearly on the wafer ID side as in the illustrated example, or the peripheral modified layer M1 may be formed so as to avoid only the wafer ID. Further, even if the peripheral edge modification layer M1 is formed radially inside the wafer ID in this way, there is no effect on the device layer D, that is, there is no effect on the active die.

Note that inside the first wafer W1, there is a direction from the peripheral modified layer M1 in the thickness direction (hereinafter sometimes referred to as the "up-down direction"), with the back surface W1b side of the first wafer W1 being "upward" and the front surface W1a side being the "upward" direction. The crack C1 extends in the "downward" direction. The crack C1 extending upward from the peripheral edge modified layer M1 reaches, for example, the back surface W1b of the first wafer W1. Further, the crack C1 extending downward is formed so that the lower end of the crack C1 is located below at least the inner end (hereinafter referred to as "inner end") of the unbonded area Ae that will be formed later. Controls extension of C1. The crack C1 can be extended by, for example, adjusting the formation position of the peripheral modified layer M1 in the thickness direction of the first wafer W1, or by adjusting the output or blurring of the laser beam L1 when forming the peripheral modified layer M1, for example. controlled by adjusting the

When the peripheral modified layer M1 is formed, while moving a laser head (not shown) radially outward of the peripheral modified layer M1, a laser beam L2 is irradiated from the laser head to the inside of the first wafer W1. do. Thereby, a plurality of divided modified layers M2 extending in the radial direction of the first wafer W1 are formed. In the examples of FIGS. 4(b) and 6, the divided modified layers M2 are formed at eight locations in the circumferential direction and three locations in the thickness direction of the first wafer W1; The number can be determined arbitrarily.

Further, in this embodiment, as shown in FIGS. 6 and 8, the laser beam L2 is irradiated so as not to overlap the wafer ID to form the divided modified layer M2. As a result, similarly to the peripheral modified layer M1, it is possible to form the divided modified layer M2 with appropriate processing quality.

Note that inside the first wafer W1, a crack C2 extends in the plane direction from the divided modified layer M2.

The polymerized wafer T on which the peripheral modified layer M1 and the divided modified layer M2 have been formed is then transported to the interface modification device 60 by the wafer transport device 70. In the interface modification apparatus 60, as shown in FIG. 4C, the interface between the first wafer W1 and the device layer D is irradiated with laser light L3 to modify the interface (step S2 in FIG. 3).

When the interface between the first wafer W1 and the device layer D is modified in step S2, the bonding strength between the first wafer W1 and the second wafer W2 is reduced. As a result, at the interface between the first wafer W1 and the device layer D, the bonding strength decreased at the bonding area Ac where the first wafer W1 and the second wafer W2 were bonded, and at the radially outer side of the bonding area Ac. An unbonded region Ae is formed. In the edge trim described later, the peripheral edge We of the first wafer W1 to be removed is removed, and the presence of the unbonded region Ae allows the peripheral edge We to be appropriately removed. Note that in forming the unbonded region Ae, the laser beam L3 is irradiated while rotating the overlapping wafer T (first wafer W1) about its central axis as a rotation axis. Thereby, the unbonded region Ae is formed concentrically with the overlapping wafer T (first wafer W1).

Here, in forming the unbonded region Ae, since processing is performed on the interface between the first wafer W1 and the device layer D, stress σ due to processing is accumulated inside the wafer. When the stress σ is accumulated inside the wafer in this way, as shown in FIG. The peeling of the wafer may progress to the radially inner side of the peripheral edge We. When the peeling progresses to the radially inner side of the peripheral edge We, that is, to the bonding area Ac, the first wafer W1 is separated from the second wafer W2 after the peripheral edge We is removed as described above. You may end up floating.

In this regard, in the present embodiment, the crack C1 that extends due to the formation of the peripheral edge modified layer M1 is extended at least to a position below the formation position of the unbonded region Ae. More specifically, the peripheral edge We is cut off from the first wafer W1 at the crack C1. As a result, even if peeling between the first wafer W1 and the second wafer W2 progresses due to internal stress when forming the unbonded region Ae, the peripheral edge We is cut off by the crack C1, as shown in FIG. Therefore, peeling does not progress across the crack C1. That is, the peripheral edge part We can be appropriately removed, and it is appropriately suppressed that the first wafer W1 is in a floating state with respect to the second wafer W2 after the peripheral edge part We is removed.

In addition, at this time, by positioning the radially inner end (inner end) of the unbonded region Ae to be radially outer than the crack C1, it is possible to further appropriately suppress the peeling from progressing across the crack C1. can.

In the illustrated example, the unbonded region Ae was formed at the interface between the first wafer W1 and the device layer D, but the formation position of the unbonded region Ae is at the junction between the first wafer W1 and the second wafer W2. It is not limited to this as long as it can reduce the strength. For example, the unbonded region Ae may be formed at the interface between the second wafer W2 and the device layer D, or, for example, in each surface film F where the first wafer W1 and the second wafer W2 are actually bonded. may be formed at the interface. Further, when the unbonded region Ae is formed, for example, at the interface between the second wafer W2 and the device layer D, the laser beam L3 is irradiated from above the inverted overlapping wafer T, that is, from the second wafer W2 side. It may also be formed by Even in such a case, by growing the crack C1 below the unbonded region Ae, in other words, the crack C1 is formed at the formation height of the unbonded region Ae in the thickness direction of the polymerized wafer T. By doing so, it is possible to appropriately suppress peeling due to internal stress from progressing to the radially inner side of the peripheral edge portion We.

The polymerized wafer T on which the unbonded region Ae has been formed is again transported to the internal reforming device 61 by the wafer transport device 70. In the internal modification device 61, as shown in FIG. 4(d), the inside of the first wafer W1 is irradiated with a laser beam L4 to form an internal surface modified layer M3 (step S3 in FIG. 3).

In forming the internal surface modified layer M3, while rotating the polymerized wafer T (first wafer W1), a laser head (not shown) periodically irradiates the inside of the first wafer W1 with laser light L4. At the same time, the laser head is moved relatively inward in the radial direction of the first wafer W1. As a result, an internal surface modified layer M3 is formed on the entire surface of the first wafer W1 along the surface direction.

The internal surface modified layer M3 is formed on the radially inner side of the peripheral modified layer M1 in the first wafer W1. That is, the laser beam L4 is irradiated so as not to overlap the wafer ID, and the internal surface modified layer M3 is also formed so as not to overlap the wafer ID. As a result, like the peripheral modified layer M1 and the divided modified layer M2, an internal surface modified layer M3 with appropriate processing quality can be formed. Note that, inside the first wafer W1, a crack C3 extends in the planar direction from the internal surface modified layer M3. As described above, since the peripheral edge portion We is cut off from the first wafer W1 by the crack C1, the crack C3 extends only inward in the radial direction of the peripheral edge modified layer M1.

Further, the lower end of the formed internal surface modified layer M3 is located above the surface of the first separated wafer Wd1 after the final finishing process. That is, the formation position is adjusted so that the internal surface modified layer M3 does not remain on the first separated wafer Wd1 after separation.

Moreover, here, it is desirable that the lower end of the peripheral edge modified layer M1 formed in step S1 is located above the inner surface modified layer M3. If the lower end of the peripheral edge modified layer M1 is located below the inner surface modified layer M3, the quality of the edge trim may deteriorate. Specifically, for example, the peripheral modified layer M1 may remain on the surface or side surface of the first separated wafer Wd1 after the final finishing treatment, resulting in a rough finished surface. From this point of view, in order to prevent the peripheral modified layer M1 from remaining on the final finished surface of the first separated wafer Wd1, the lower end of the peripheral modified layer M1 is located above the internal surface modified layer M3. It is preferable.

Furthermore, if the peeling of the first wafer W1 that progresses radially inward due to internal stress reaches the peripheral modified layer M1 instead of the crack C1, in other words, the formation height of the unbonded region Ae If the peripheral edge modified layer M1 is formed at the same time, the peripheral edge We may not be appropriately removed. Specifically, when the crack C1 extends to the formation height of the unbonded region Ae as described above, the peripheral edge We is appropriately cut off from the first wafer W1 by the crack C1. However, if the peripheral modified layer M1 is formed at the formation height of the unbonded region Ae, the first wafer W1 and the peripheral edge We are in a state of being connected via the peripheral modified layer M1. Therefore, there is a possibility that the peeling of the first wafer W1 due to internal stress may progress to the radially inner side via the peripheral modified layer M1, and from this point of view, the lower end of the peripheral modified layer M1 is It is located above the bonding region Ae, more preferably above the internal surface modified layer M3.

After the internal surface modification layer M3 is formed inside the first wafer W1, the wafer transport device 70 transports the polymerized wafer T from the internal modification device 61 to the peripheral edge removal device 62.

In the peripheral edge removal device 62, as shown in FIG. 3 step S4).

In removing the peripheral portion We, a blade serving as an insertion member having a wedge shape, for example, may be inserted into the interface between the first wafer W1 and the second wafer W2 forming the overlapping wafer T. Thereby, when removing the peripheral edge We, the peripheral edge We is appropriately peeled off from the peripheral edge modified layer M1 by the impact when inserting the blade. At this time, as described above, an unbonded region Ae is formed at the interface between the first wafer W1 and the device layer D, and the bonding strength with the second wafer W2 is reduced. will be removed.

Further, as described above, the peripheral edge modification layer M1 is appropriately formed without overlapping the wafer ID, so the peripheral edge We can be appropriately removed without being influenced by the wafer ID.

Furthermore, as described above, the peripheral edge We is cut off from the first wafer W1 by the crack C1. Therefore, the removal range of the peripheral edge We is appropriately controlled without the peeling progressing to the radially inner side of the peripheral edge We, so that the first wafer W1 is transferred to the second wafer W2 in the first separated wafer Wd1. On the other hand, it does not float, and the quality after trimming can be maintained appropriately.

The stacked wafer T from which the peripheral edge We of the first wafer W1 has been removed is then transported by the wafer transport device 70 from the peripheral edge removing device 62 to the processing device 80. In the processing device 80, first, as shown in FIG. 5(b), the first wafer W1 is separated into the first separated wafer Wd1 and the second separated wafer Wd2 based on the internal surface modified layer M3 (crack C3). (Step S5 in FIG. 3). At this time, since the internal surface modified layer M3 is appropriately formed without overlapping the wafer ID as described above, the first wafer W1 can be appropriately separated.

When separating the first wafer W1, the back side W1b of the first wafer W1 is held by the transfer arm 71, and the back side W2b of the second wafer W2 is held by the chuck 83, and the transfer arm 71 is raise. As a result, the first wafer W1 is separated into a first separated wafer Wd1 and a second separated wafer Wd2 based on the internal surface modified layer M3, and the second separated wafer Wd2 is held by the transfer arm 71. be lifted upwards.

Note that the second separated wafer Wd2 is placed, for example, on the transfer position A0 and is suctioned by the suction holding surface of the transfer arm 71, and then collected outside the wafer processing system 1. Further, for example, a collecting section (not shown) is provided within the movable range of the transfer arm 71, and by releasing the adsorption and holding of the second separated wafer Wd2 in the collecting section, the separated second separated wafer Wd2 is removed. May be collected.

Further, in the present embodiment, the first wafer W1 is separated by raising the transfer arm 71, but after the second separated wafer Wd2 is separated by rotating the transfer arm 71 with the inner surface modified layer M3 as a boundary. , the transport arm 71 may be raised. Further, for example, by providing a pressure sensor (not shown) on the transfer arm 71 and measuring the pressure to suck the second separated wafer Wd2, the presence or absence of the second separated wafer Wd2 can be detected, and the first wafer You may also check whether W1 has been separated.

Subsequently, the chuck 83 is moved to the processing position A1. Then, as shown in FIG. 5C, the separated surface of the separated stacked wafer T held by the chuck 83, that is, the first separated wafer Wd1, is ground by the grinding unit 84, and the peripheral edge modification remaining on the separated surface is ground. The quality layer M1 and the inner surface modified layer M3 are removed (step S6 in FIG. 3). In step S6, with the grinding wheel in contact with the separated surface, the overlapping wafer T (first separated wafer Wd1) and the grinding wheel are rotated to grind the separated surface. Note that after that, the ground surface of the first separated wafer Wd1 may be cleaned with a cleaning liquid using a cleaning liquid nozzle (not shown).

Next, the superposed wafer T is transported to the cleaning device 41 by the wafer transport device 70. In the cleaning device 41, the ground surface of the first separated wafer Wd1 is scrub-cleaned (step S7 in FIG. 3). Note that in the cleaning device 41, the back surface W2b of the second wafer W2 may be cleaned together with the ground surface of the first separated wafer Wd1.

Next, the superposed wafer T is transported to the etching device 40 by the wafer transport device 50. In the etching apparatus 40, the ground surface of the first separated wafer Wd1 is wet-etched using a chemical solution (step S8 in FIG. 3). Grinding marks may be formed on the ground surface ground by the processing device 80 described above. In this step S8, the grinding marks can be removed by wet etching, and the ground surface can be smoothed.

Thereafter, the superposed wafer T that has been subjected to all the processes is transported to the transition device 30 by the wafer transport device 50, and further transported to the cassette Cw1 of the cassette mounting table 10 by the wafer transport device 20. In this way, a series of wafer processing in the wafer processing system 1 is completed.

According to the above embodiment, the peripheral edge modified layer M1 is formed in step S1 so as not to overlap with the wafer ID of the first wafer W1, so that the influence of the wafer ID is avoided and the peripheral edge We is removed in step S4. (edge trim) can be performed appropriately. Therefore, the quality of the first wafer W1 after edge trimming can be maintained.

Furthermore, since the laser beam L1 is irradiated in an annular manner in areas other than the portion where the wafer ID is formed, the peripheral modified layer M1 can be formed on the first wafer W1 with a desired trim width. Therefore, the peripheral portion We can be appropriately removed.

Further, in step S3, the internal surface modified layer M3 is formed so as not to overlap the wafer ID of the first wafer W1, so the first wafer W1 is separated into the first separated wafer Wd1 and the second separated wafer Wd2. can be properly separated.

In the above embodiment, when forming the peripheral modified layer M1 in step S1, based on the position and size of the wafer ID that is known in advance, the laser beam L1 is directed to the first direction so as to avoid the wafer ID. The inside of the wafer W1 was irradiated. In this regard, when the wafer processing system 1 processes the wafer, the position and size of the wafer ID may be measured.

The position and size of the wafer ID can be measured by any device in the wafer processing system 1, for example, by the internal reforming device 61. Note that in this embodiment, the internal reformer 61 functions as a measurement unit in the present disclosure.

In this case, in step S1, the position and size of the wafer ID are measured before the internal reforming device 61 irradiates the inside of the first wafer W1 with the laser beam L1. Thereafter, based on the measurement result of the wafer ID, the position of the peripheral modified layer M1, that is, the irradiation position of the laser beam L1 is determined so as to avoid the wafer ID.

According to this embodiment, since the position and size of the wafer ID are measured for each wafer, the wafer ID can be accurately determined. Therefore, it is possible to irradiate the first wafer W1 with the laser light L1 at a more appropriate position, and the processing quality of the peripheral modified layer M1 can be maintained.

In the above embodiment, if it is confirmed that the peripheral modified layer M1 to be formed on the first wafer W1 does not overlap with the wafer ID, the peripheral modified layer M1 may be formed in a circular shape (annular shape). good.

In the above embodiment, after forming the peripheral modified layer M1 inside the first wafer W1 (step S1 in FIG. 3), an unbonded region Ae is formed at the interface between the first wafer W1 and the device layer D. (step S2 in FIG. 3), the order of the wafer processing steps is not limited thereto. That is, for example, after forming an unbonded region Ae at the interface between the first wafer W1 and the device layer D, a peripheral modified layer M1 is formed radially inward from the inner end of the unbonded region Ae. Good too.

In the above embodiment, the unbonded region Ae is formed in the interface modification device 60 provided in the wafer processing system 1, but the unbonded region Ae may be formed outside the wafer processing system 1. Further, an unbonded region Ae may be formed in the first wafer W1 before being bonded to the second wafer W2. Here, when forming an unbonded area Ae on the surface of the surface film F on the first wafer W1 before bonding, stress may be accumulated inside the first wafer W1 when forming the unbonded area Ae. is suppressed, it is possible to suppress the progress of peeling to the radially inner side of the peripheral edge We due to internal stress.

In the above embodiment, the crack C1 extending upward from the peripheral edge modified layer M1 was made to reach the back surface W1b of the first wafer W1, but as shown in FIG. Alternatively, the crack C3 may be connected to the crack C3 extending in the surface direction from the internal surface modified layer M3. In such a case, in separating the first wafer W1, the second separated wafer Wd2 is separated integrally with the peripheral edge We, as shown in FIG. 11(b). That is, the removal of the peripheral portion We and the separation of the first wafer W1 are performed simultaneously. Note that in the case of integrally separating the second separated wafer Wd2 and the peripheral edge We in this way, it is not necessary to form the divided modified layer M2 in step S1 of FIG. 3 in the above-described embodiment.

Further, in the above embodiment, by forming the internal surface modified layer M3 inside the first wafer W1, the first wafer W1 is separated (thinned) using the internal surface modified layer M3 as a base point. However, the method for thinning the first wafer W1 is not limited to this. For example, after forming the unbonded region Ae, the peripheral modified layer M1, and the divided modified layer M2 on the polymerized wafer T, and removing the peripheral part We of the first wafer W1, the first The wafer W1 may be thinned.

In the above embodiment, after forming the unbonded region Ae at the interface between the first wafer W1 and the device layer D, the internal reforming device 61 in which the peripheral modified layer M1 and the divided modified layer M2 were formed is again heated. Although the polymerized wafer T was carried in and the internal surface modified layer M3 was formed, the internal surface modified layer M3 may be formed in another apparatus. That is, the wafer processing system 1 may further be provided with a second internal modification device (not shown) for forming the internal surface modification layer M3. The second internal reforming device can be stacked with, for example, the interface reforming device 60 and the internal reforming device 61 for forming the peripheral modified layer M1. In such a case, the second internal reformer corresponds to another reforming section of the present disclosure.

The embodiments disclosed this time should be considered to be illustrative in all respects and not restrictive. The embodiments described above may be omitted, replaced, or modified in various forms without departing from the scope and spirit of the appended claims.

1 Wafer processing system 61 Internal modification device 62 Periphery removal device 90 Control device M1 Peripheral modification layer T Polymerized wafer W1 First wafer W2 Second wafer Wc Center part We Peripheral part

Claims (14)

A method of processing a polymerized substrate in which a first substrate and a second substrate are bonded, the method comprising:
A laser beam is irradiated along the boundary between the peripheral portion of the first substrate to be removed and the center portion of the first substrate, and so as not to overlap the identification information engraved on the first substrate. forming a peripheral modified layer inside the first substrate;
Removing the peripheral edge portion starting from the peripheral edge modified layer ;
Measuring the position and size of the identification information on the first substrate;
A substrate processing method comprising : determining a formation position of the peripheral edge modified layer based on a measurement result of the identification information . A base point for separating the first substrate into a first separation substrate and a second separation substrate by irradiating a laser beam along the inner surface direction of the first substrate so as not to overlap the identification information; 2. The substrate processing method according to claim 1 , comprising forming an internal surface modified layer. 3. The substrate processing method according to claim 2 , wherein the peripheral edge portion is removed integrally when separating the first substrate. A method of processing a polymerized substrate in which a first substrate and a second substrate are bonded, the method comprising:
A laser beam is irradiated along the boundary between the peripheral portion of the first substrate to be removed and the center portion of the first substrate, and so as not to overlap the identification information engraved on the first substrate. forming a peripheral modified layer inside the first substrate;
Removing the peripheral edge portion starting from the peripheral edge modified layer ;
irradiating a laser beam inside the peripheral portion and not overlapping the identification information to form a plurality of divided modified layers extending in the radial direction of the first substrate; Substrate processing method. A base point for separating the first substrate into a first separation substrate and a second separation substrate by irradiating a laser beam along the inner surface direction of the first substrate so as not to overlap the identification information; 5. The substrate processing method according to claim 4 , comprising forming an internal surface modified layer. 5. The substrate processing method according to claim 1 , comprising thinning the first substrate by grinding a surface of the first substrate that is not bonded to the second substrate . 7. The substrate processing method according to claim 1, wherein the peripheral modified layer is formed on the first substrate radially inside the identification information. A system for processing a polymerized substrate in which a first substrate and a second substrate are bonded, the system comprising:
a modification section that irradiates the inside of the first substrate with laser light to form a peripheral modification layer;
a removal section that removes the peripheral edge from the peripheral edge modified layer as a starting point;
a measurement unit that measures the position and size of identification information on the first substrate;
a control unit that controls operations of the reforming unit and the removing unit,
The control unit is configured to apply a laser beam along a boundary between the peripheral portion of the first substrate to be removed and the center portion of the first substrate, and so as not to overlap identification information engraved on the first substrate. controlling the operation of the modification section so as to irradiate light and form the peripheral modification layer ;
The control unit is a substrate processing system that determines a formation position of the peripheral edge modified layer based on a measurement result of the identification information by the measurement unit . Another modified portion that irradiates the inside of the first substrate with a laser beam to form an internal surface modified layer that serves as a base point for separating the first substrate into a first separation substrate and a second separation substrate. Equipped with
The control unit irradiates the other modified portion with a laser beam along the surface direction of the first substrate so as not to overlap the identification information, and forms the internal surface modified layer. 9. The substrate processing system according to claim 8 , wherein the substrate processing system controls the operation of the substrate processing system. According to claim 9 , the control unit controls the operations of the modification unit, the other modification unit, and the removal unit so that the peripheral portion is removed together when separating the first substrate. The substrate processing system described. A system for processing a polymerized substrate in which a first substrate and a second substrate are bonded, the system comprising:
a modification section that irradiates the inside of the first substrate with laser light to form a peripheral modification layer;
a removal section that removes the peripheral edge from the peripheral edge modified layer as a starting point;
a control unit that controls operations of the reforming unit and the removing unit,
The control unit is configured to apply a laser beam along a boundary between the peripheral portion of the first substrate to be removed and the center portion of the first substrate, and so as not to overlap identification information engraved on the first substrate. controlling the operation of the modification section so as to irradiate light and form the peripheral modification layer ;
The control unit is configured to irradiate the inside of the peripheral portion with laser light so as not to overlap the identification information, and to form a plurality of divided modified layers extending in the radial direction of the first substrate. A substrate processing system for forming the modified portion . Another modified portion that irradiates the inside of the first substrate with a laser beam to form an internal surface modified layer that serves as a base point for separating the first substrate into a first separation substrate and a second separation substrate. Equipped with
The control unit irradiates the other modified portion with a laser beam along the surface direction of the first substrate so as not to overlap the identification information, and forms the internal surface modified layer. The substrate processing system according to claim 11 , wherein the substrate processing system controls the operation of the substrate processing system. 12. The method according to claim 8 or 11 , further comprising a grinding portion that thins the first substrate by grinding a surface of the first substrate that is not joined to the second substrate with a grinding wheel. Substrate processing system. Any one of claims 8 to 13 , wherein the control unit controls the operation of the modification unit so as to form the peripheral modified layer on the first substrate in the radial direction of the identification information. The substrate processing system described in .

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