JP6992797B2 - Through Silicon Via Substrate - Google Patents

Description

The present invention relates to a through electrode substrate provided with a through electrode penetrating the front surface and the back surface of the substrate, and more particularly to a through electrode substrate used as an interposer substrate for connecting a plurality of elements. Further, the present invention relates to a semiconductor device using a through electrode substrate.

In recent years, as an interposer between LSI chips, a through electrode substrate having a conductive portion that conducts the front surface and the back surface of the substrate has been developed. In such a through electrode substrate, a through electrode is formed by filling the inside of the through hole with a conductive material by electrolytic plating or the like.

The LSI chip having narrow pitch and short dimensional wiring is arranged on the upper surface of the through silicon via substrate. Further, the semiconductor mounting substrate having wide pitch and long dimension wiring is arranged on the lower surface of the through electrode substrate. The following documents are available as conventional techniques for through silicon via substrates.

Japanese Patent Application No. 2005-514387 Japanese Patent Application No. 2010-548586 Japanese Patent Application No. 2003-513307 Japanese Patent Application No. 2011-528851 International Publication No. 2010/087483 International Publication No. 2005/034594 International Publication No. 2003/007370 International Publication No. 2011/024921 Patent No. 4241202 Patent No. 4203277 Patent No. 4319831 Patent No. 4022180 Patent No. 4564342 Patent No. 4835141 Patent No. 5119623 Japanese Unexamined Patent Publication No. 2009-23341 Patent No. 2976955 Japanese Patent Application Laid-Open No. 2003-243396 Japanese Patent Application Laid-Open No. 2003-198069 Patent No. 401327

In the through electrode, the through hole is filled with a conductive material as a filler as described above, or a conductive film is formed along the side wall of the through hole, and the remaining portion in the through hole is filled with an insulating resin. May be filled as. For through silicon vias, there is a known technique for providing a taper inside the through hole and forming a large number of crater-like irregularities inside the through hole in order to prevent the filling filled in the through hole from falling off. (Patent Document 3, Patent Document 4).

However, even if an attempt is made to prevent the filling from falling off by such a technique, a gap may be formed between the filling and the side wall of the through hole, and a gas pool may be formed there. If heat is applied to the substrate in this state, in the conventional technology, the gas accumulated in the gas pool expands, the through holes and the filling may be destroyed, and the filling may fall off. There is.

Therefore, the present invention has been made in view of such a problem, and it is possible to solve the problem caused by the gas accumulated in the gas pool in the through hole and prevent the filling material in the through hole from falling off. And provide semiconductor devices.

According to one embodiment of the invention
A substrate having a through hole penetrating the first opening on the first surface and the second opening on the second surface,
With a filler disposed in the through hole,
The second opening is larger than the first opening, and there is a minimum opening having the smallest area in a plan view between the first opening and the second opening.
Provided is a through silicon via substrate having a gas discharge portion arranged so as to be in contact with the filler exposed on either one of the first surface and the second surface.

Further, according to one embodiment of the present invention.
It penetrates the first opening of the first surface and the second opening of the second surface, and is seen in a plan view from the first portion and the first portion and the first opening between the first opening and the second opening. A substrate having a through hole having a second portion having a large area,
With a filler disposed in the through hole,
Provided is a through silicon via substrate having a gas discharge portion arranged so as to be in contact with the filler exposed on either one of the first surface and the second surface.

Further, in cross-sectional view, at least a part of the side wall of the through hole may include a curve having an inflection point.

The gas discharging portion may be an insulating resin that releases the gas in the through hole to the outside.

At least a part of the gas release part may be arranged between the side wall of the through hole and the filling.

The gas discharging portion may have an opening, and the opening of the gas discharging portion may have an area in a plan view increasing as the distance from the substrate side increases.

A conductive film may be arranged between the side wall of the through hole and the filling.

An insulating film and a conductive film may be arranged in order from the side wall side of the through hole between the side wall of the through hole and the filling.

The conductive film may also be arranged on the first surface and the second surface.

The filling may be a conductive material.

The filling may be an insulating material.

The substrate may be an insulating substrate.

The substrate may be a conductive substrate.

The gas emitting part has an opening and has an opening.
The opening of the gas discharge portion may be overlapped with the first opening and the second opening.

The gas emitting part has an opening and has an opening.
The opening of the gas discharge portion may not overlap with the first opening and the second opening.

The gas release unit is arranged on the first surface and the second surface, and is arranged on the first surface and the second surface.
The area where the gas discharging portion on the second surface side contacts the filling may be larger than the area where the gas discharging portion on the first surface side contacts the filling.

Further, according to one embodiment of the present invention, a semiconductor device including an LSI substrate, a semiconductor chip, and a through silicon via substrate of the present invention is provided.

According to the present invention, it is possible to solve a problem caused by gas accumulated in a gas pool in a through hole, prevent the filler in the through hole from falling off, and provide a highly reliable through electrode substrate and a semiconductor device. ..

It is a figure which shows the structure of the through silicon via substrate 100 of this invention which concerns on 1st Embodiment. It is a figure which shows the structure of the through silicon via substrate 200 of this invention which concerns on 2nd Embodiment. It is a figure which shows the structure of the through silicon via substrate 300 of this invention which concerns on 3rd Embodiment. It is a figure which shows the structure of the through silicon via substrate 400 of this invention which concerns on 4th Embodiment. It is a figure which shows the structure of the through silicon via substrate 100 of this invention which concerns on 5th Embodiment. It is a figure which shows the structure of the through silicon via substrate 100 of this invention which concerns on 6th Embodiment. It is a figure which shows the structure of the through silicon via substrate 100 of this invention which concerns on 7th Embodiment. An example in which the opening (via) 110 on the filler 105 in the through silicon via substrate 100 of the present invention according to the seventh embodiment is misaligned is shown. It is a figure which shows the structure of the through silicon via substrate 200 of this invention which concerns on 7th Embodiment. It is a figure which shows the structure of the through silicon via substrate 300 of this invention which concerns on 7th Embodiment. It is a figure which shows the structure of the through silicon via substrate 400 of this invention which concerns on 7th Embodiment. It is a figure which shows the structure of the semiconductor device 1000 of this invention which concerns on 8th Embodiment. It is a figure which shows the structure of the semiconductor device 1000 of this invention which concerns on 8th Embodiment. It is a figure which shows the structure of the semiconductor device 1000 of this invention which concerns on 8th Embodiment.

Hereinafter, the through silicon via substrate of the present invention will be described in detail with reference to the drawings. The through silicon via substrate of the present invention is not limited to the following embodiments, and can be modified in various ways. In all embodiments, the same components will be described with the same reference numerals.

(First Embodiment)
The configuration of the through silicon via substrate 100 of the present invention according to the first embodiment will be described with reference to FIG. FIG. 1A is a plan view of the through silicon via substrate 100 of the present invention according to the present embodiment as viewed from above. 1 (B) is a cross-sectional view taken along the line AA'of FIG. 1 (A). Both FIGS. 1A and 1B show a part of the through silicon via 100 of the present invention according to the present embodiment for convenience of explanation.

The through silicon via substrate 100 of the present invention according to the present embodiment includes a substrate 102, a through hole 104, a filler 105, insulating layers 106 and 108, vias 110 and 112. A wiring structure, electronic components, and the like may be further mounted on the first surface 102a and the second surface 102b of the substrate 102, respectively.

In the present embodiment, the substrate 102 has an insulating property, and for example, glass, sapphire, resin, or the like can be used. The thickness of the substrate 102 is not particularly limited, but can be appropriately set in the range of, for example, 10 μm to 1 mm.

The through hole 104 is a through hole that penetrates the first opening 104a arranged on the first surface 102a of the substrate 102 and the second opening 104b arranged on the second surface 102b which is the opposite surface of the first surface 102a. be. The shape of the through hole 104 is not constant and changes from the first opening 104a to the second opening 104b. In other words, the shape of the side wall of the through hole 104 changes from the first opening 104a toward the second opening 104b. The through hole 104 typically has a second opening 104b larger than the first opening 104a and has a constriction (neck) between the first opening 104a and the second opening 104b. More specifically, the through hole 104 is a minimum opening 104c having a minimum area M in a plan view (that is, when viewed from above), and a side wall of the through hole 104 in a cross section (that is, when viewed in an AA'cross section). Has an inflection point 104d (a curve having an inflection point 104d) which is varied by a curve, and a maximum opening 104e having a maximum area L in plan view (ie, viewed from above). In the present embodiment, the inflection point 104d of the through hole 104 is arranged closer to the second opening 104b than the center of the through hole 104, but the present invention is not limited to this, and the inflection point of the through hole 104 is not limited to this. The 104d may be arranged closer to the first opening 104a than the center of the through hole 104. The through hole 104 can be formed by subjecting the substrate 102 to etching, laser, sandblasting, or the like. The size of the through hole 104 is not particularly limited, but it is preferable that the size of the maximum opening 104e is 200 μm or less in order to realize a narrow pitch.

A filling 105 is arranged inside the through hole 104. In the present embodiment, the filler 105 is a conductive material, and for example, a metal precipitate such as Cu, a conductive paste containing Cu or the like, or a conductive material such as a conductive resin is used. When a metal such as Cu is used as the filler 105, the electrolytic plating filling method is used. When a conductive paste or a conductive resin having fluidity is used as the filler, the through holes 104 are filled with the conductive paste or the conductive resin using a spatula or a scraper, and then heat treatment or the like is performed. Can form the filler 105.

The insulating layers 106 and 108 are arranged on the first surface 102a and the second surface 102b of the substrate 102 either directly or via an intermediate layer (not shown), respectively. The insulating layers 106 and 108 may be an insulating material which is formed of, for example, an insulating resin material such as polyimide or benzocyclobutene and has an outgassing function. The insulating layers 106 and 108 act as a gas discharging portion that discharges (permeates the gas) the gas generated and released in the through hole 104 to the outside. At least one of the insulating layers (gas release portions) 106 and 108 is arranged so as to be in contact with the filler 105 exposed on the first surface 102a and the second surface 102b of the substrate 102. When there is a gap between the side wall of the through hole 104 and the filling 105, a part of the insulating layers (gas release portions) 106 and 108 is arranged between the side wall of the through hole 104 and the filling 105. That is, the insulating layers 106 and 108 may be inserted between the side wall of the through hole 104 and the filling 105. The insulating layers 106 and 108 are formed by photolithography, for example, using a photosensitive insulating material with the desired patterning.

In the through electrode substrate 100 of the present invention according to the present embodiment, as described above, the through hole 104 has a minimum opening 104c, an inflection point 104d, and a maximum opening 104e. The through hole 104 is filled with the filler 105. In the case shown in FIG. 1, the portion of the through hole 104 on the second surface 102b side has a larger amount of the filling 105 than the portion of the through hole 104 on the first surface 102a side, and the amount of the filling 105 is increased accordingly. The amount of gas produced also increases. The area where the gas discharge portion 106 on the second surface 102b side contacts the filling 105 is larger than the area where the gas discharging portion 108 on the first surface 102a side contacts the filling 105, so that the area on the second surface side The amount of gas released from the gas discharging unit 108 of the above may be increased. Further, since the second opening 104b is larger than the first opening 104a, the above-mentioned contact area relationship can be easily obtained by making the diameters of the via 110 and the via 112 substantially the same.

The vias 110 and 112, which are openings, are holes formed in the insulating layers (gas release portions) 106 and 108, respectively. Although not shown for convenience of explanation, wiring is formed in the vias 110 and 112 by plating or sputtering. These wirings come into contact with the filler 105 arranged in the through hole 104, and the wirings are electrically connected to each other. As shown in FIG. 1 (b), the vias 110 and 112, which are the openings of the insulating layers (gas release portions) 106 and 108, are formed so as to overlap with the first opening and the second opening of the substrate 102, respectively. .. In other words, the vias 110 and 112, which are the openings of the insulating layers (gas release portions) 106 and 108, are arranged directly above the first opening and the second opening of the substrate 102, respectively. Further, a part of the via 110 and / or 112 which is an opening of the insulating layers (gas emission portions) 106 and 108 is formed so as to overlap the first opening 104a and the second opening 104b of the substrate 102, respectively. You may do it.

In the through electrode substrate 100 of the present invention according to the present embodiment, as described above, the through hole 104 has a minimum opening 104c, an inflection point 104d, and a maximum opening 104e. The through hole 104 is filled with the filler 105. By making a difference in size between the first opening 104a and the second opening 104b, the filling property of the filling can be ensured. When a force acts on the packing 105 in the direction of the first surface 102a, the presence of the inflection point 104d can prevent the filling 105 from falling off from the substrate 100. Further, when a force acts on the filling 105 in the direction of the second surface 102b, the presence of the minimum opening 104c can prevent the filling 105 from falling off from the substrate 100. The through silicon via substrate 100 according to the present embodiment may have only one of the minimum opening 104c and the maximum opening 104d. Therefore, in the through silicon via 100 of the present invention according to the present embodiment, the filling property of the filling material 105 can be ensured, and the filling material 105 can be prevented from falling off in either the vertical direction.

Further, in the through silicon via substrate 100 of the present invention according to the present embodiment, as described above, at least one of the insulating layers (gas emission portions) 106 and 108 is exposed on the first surface 102a and the second surface 102b of the substrate 102. It is arranged so as to be in contact with the filling material 105 to be used. Therefore, the insulating layer (gas release portion) 106 and / or 108 can release the gas generated and released in the through hole 104 to the outside, and the gas accumulated in the gas pool in the through hole 104 causes a problem. This can be eliminated, the filling 105 in the through hole 104 can be prevented from falling off, and a highly reliable through electrode substrate can be provided.

It is preferable that there is no space between the side wall of the through hole 104 and the filling 105, but there may be some space or a gap between the side wall of the through hole 104 and the filling 105. Even when such a space or a gap is generated, the through silicon via 100 of the present invention according to the present embodiment can prevent the filling portion 105 from falling off.

(Second Embodiment)
The configuration of the through silicon via 200 of the present invention according to the second embodiment will be described with reference to FIG. FIG. 2A is a plan view of the through silicon via substrate 200 of the present invention according to the present embodiment as viewed from above. FIG. 2B is a cross-sectional view taken along the line AA'of FIG. 2A. Both FIGS. 2A and 2B show a part of the through silicon via 200 of the present invention according to the present embodiment for convenience of explanation.

The through electrode substrate 200 of the present invention according to the present embodiment includes a substrate 202, a through hole 204, a filler 205, insulating layers 206 and 208, a conductive film 207, vias 210 and 212. A wiring structure, electronic components, and the like may be further mounted on the first surface 202a and the second surface 202b of the substrate 202, respectively.

In the present embodiment, the substrate 202 has an insulating property, and for example, glass, sapphire, resin, or the like can be used. The thickness of the substrate 202 is not particularly limited, but can be appropriately set in the range of, for example, 10 μm to 1 mm.

The through hole 204 is a through hole that penetrates the first opening 204a arranged on the first surface of the substrate 202 and the second opening 204b arranged on the second surface 202b which is the opposite surface of the first surface 202a. .. Similar to the first embodiment described above, the shape of the through hole 204 is not constant and changes from the first opening 204a to the second opening 204b. In other words, the shape of the side wall of the through hole 204 changes from the first opening 204a toward the second opening 204b. The through hole 204 typically has a second opening 204b larger than the first opening 204a and has a constriction (neck) between the first opening 204a and the second opening 204b. More specifically, the through hole 204 is a minimum opening 204c having a minimum area M in a plan view (that is, when viewed from above), and a side wall of the through hole 204 in a cross section (that is, when viewed in an AA'cross section). Has an inflection point 204d (a curve having an inflection point 204d) varying by a curve, and a maximum opening 204e having a maximum area L in plan view (ie, viewed from above). In the present embodiment, the inflection point 204d of the through hole 204 is arranged closer to the second opening 204b than the center of the through hole 204, but the present invention is not limited to this, and the inflection point of the through hole 204 is not limited to this. The 204d may be arranged closer to the first opening 204a than the center of the through hole 204. The through hole 104 can be formed by subjecting the substrate 102 to etching, laser, sandblasting, or the like. The size of the through hole 104 is not particularly limited, but it is preferable that the size of the maximum opening 104e is 200 μm or less in order to realize a narrow pitch.

A conductive film 207 and a filler 205 are arranged inside the through hole 204. The conductive film 207 is arranged on the side wall side of the through hole 204, and a part of the conductive film 207 is arranged on the upper part of the first surface 202a and the second surface 202b of the substrate 202. In the present embodiment, the filler 205 is an insulating material, and for example, an organic material such as polyimide or benzocyclobutene or an inorganic material such as silicon oxide or silicon nitride is used. The conductive film 207 can be formed by, for example, a plating method, a CVD method, or the like. The filler 205 can be formed by, for example, a method such as suction or thrusting.

The insulating layers 206 and 208 are arranged on the first surface 202a and the second surface 202b of the substrate 202 directly or via an intermediate layer (not shown), respectively. The insulating layers 206 and 208 may be made of an insulating resin material such as polyimide or benzocyclobutene, and may be an insulating material having an outgassing function. The insulating layers 206 and 208 act as a gas discharging portion that discharges (permeates the gas) the gas generated and released in the through hole 204 to the outside. In the present embodiment, the insulating layers (gas release portions) 206 and 208 are arranged so as to cover and contact the filler 205 exposed on the first surface 202a and the second surface 202b of the substrate 202. At least one of the insulating layers (gas release portions) 206 and 208 may be arranged so as to be in contact with the filler 205 exposed on the first surface 202a and the second surface 202b of the substrate 202. Further, when there is a gap between the side wall of the through hole 204 and the filling 205, a part of the insulating layers (gas discharge portions) 206 and 208 is arranged between the side wall of the through hole 204 and the filling 205. That is, the insulating layers 206 and 208 may be inserted between the side wall of the through hole 204 and the filling 205. The insulating layers 206 and 208 are formed by photolithography, for example, using a photosensitive insulating material with the desired patterning.

In the through electrode substrate 200 of the present invention according to the present embodiment, as described above, the through hole 204 has a minimum opening 204c, an inflection point 204d, and a maximum opening 204e. The through hole 204 is filled with the filling 205. In the case shown in FIG. 2, the portion of the through hole 204 on the second surface 202b side has a larger amount of the filler 205 than the portion of the through hole 204 on the first surface 202a side, and the amount of gas released. Will also increase. Therefore, the area where the gas discharging portion 206 on the second surface 202b side contacts the filling 205 is made larger than the area where the gas discharging portion 208 on the first surface side contacts the filling 205 so that the second surface becomes larger. The amount of gas released from the gas discharge unit 208 on the side may be increased.

The vias 210 and 212 that are openings are holes formed in the 207 insulating layers (gas release portions) 206 and 208 on the conductive film 207 on the first surface 202a and the second surface 202b, respectively. Although not shown for convenience of explanation, wiring is formed on the vias 210 and 212 by plating or sputtering. These wirings come into contact with the conductive film 207 on the first surface 202a and the second surface 202b, and these wirings are conductive with each other. Further, a part of the via 210 and / or 212 which is the opening of the insulating layers (gas emission portions) 206 and 208 is formed so as to overlap the first opening 204a and the second opening 204b of the substrate 202, respectively. You may do it.

In the through electrode substrate 200 of the present invention according to the present embodiment, as described above, the through hole 204 has a minimum opening 204c, an inflection point 204d, and a maximum opening 204e. The through hole 204 is filled with the filling 205. By making a difference in size between the first opening 204a and the second opening 204b, the filling property of the filling can be ensured. When a force acts on the filling 205 in the direction of the first surface 202a, the presence of the inflection point 204d can prevent the filling 205 from falling off from the substrate 200. Further, when a force acts on the filling 205 in the direction of the second surface 202b, the presence of the minimum opening 204c can prevent the filling 205 from falling off from the substrate 200. The through silicon via substrate 200 according to the present embodiment may have only one of the minimum opening 204c and the maximum opening 204d. Therefore, in the through silicon via 200 of the present invention according to the present embodiment, the filling property of the filling 205 can be ensured, and the filling 205 can be prevented from falling off in either the vertical direction.

Further, in the through silicon via substrate 200 of the present invention according to the present embodiment, as described above, at least one of the insulating layers (gas emission portions) 206 and 208 is exposed on the first surface 202a and the second surface 202b of the substrate 202. It is arranged so as to be in contact with the filling 205. Therefore, the insulating layer (gas release portion) 206 and / or 208 can release the gas generated and released in the through hole 204 to the outside, and the gas accumulated in the gas pool in the through hole 204 causes a problem. This can be eliminated, the filler 205 in the through hole 204 can be prevented from falling off, and a highly reliable through electrode substrate can be provided.

It is preferable that there is no space between the conductive film 207 and the filling 205 arranged on the side wall side of the through hole 204, but some space or a gap is generated between the conductive film 207 and the filling 205. In some cases, it will end up. Even when such a space or a gap is generated, the through silicon via 200 of the present invention according to the present embodiment can prevent the filling portion 205 from falling off.

(Third Embodiment)
The configuration of the through silicon via substrate 300 of the present invention according to the third embodiment will be described with reference to FIG. FIG. 3A is a plan view of the through silicon via substrate 300 of the present invention according to the present embodiment as viewed from above. FIG. 3B is a cross-sectional view taken along the line AA'of FIG. 3A. Both FIGS. 3A and 3B show a part of the through silicon via 300 of the present invention according to the present embodiment for convenience of explanation.

The through silicon via substrate 300 of the present invention according to the present embodiment includes a substrate 302, a through hole 304, a filler 305, insulating layers 306 and 308, insulating layers 307, vias 310 and 312. A wiring structure, electronic components, and the like may be further mounted on the first surface 302a and the second surface 302b of the substrate 302, respectively.

In the present embodiment, the substrate 302 has conductivity, and for example, a semiconductor such as silicon, a metal such as stainless steel, or the like can be used. The thickness of the substrate 302 is not particularly limited, but can be appropriately set in the range of, for example, 10 μm to 1 mm.

The through hole 304 is arranged in the first opening 304a arranged in the first surface 302a of the substrate 302 and the second surface 302b which is the opposite surface of the first surface 302a, as in the above-described first and second embodiments. It is a through hole that penetrates the second opening 304b. The shape of the through hole 304 is not constant and changes from the first opening 304a to the second opening 304b. In other words, the shape of the side wall of the through hole 304 changes from the first opening 304a toward the second opening 304b. The through hole 304 typically has a second opening 304b larger than the first opening 304a and has a constriction (neck) between the first opening 304a and the second opening 304b. More specifically, the through hole 304 is a minimum opening 304c having a minimum area M in a plan view (that is, when viewed from above), and a side wall of the through hole 304 in a cross section (that is, when viewed in an AA'cross section). Has an inflection point 304d (a curve having an inflection point 304d) varying by a curve, and a maximum opening 304e having a maximum area L in plan view (ie, viewed from above). In the present embodiment, the inflection point 304d of the through hole 304 is arranged closer to the second opening 304b than the center of the through hole 304, but the present invention is not limited to this, and the inflection point of the through hole 304 is not limited to this. The 304d may be arranged closer to the first opening 304a than the center of the through hole 304. The through hole 304 can be formed by subjecting the substrate 302 to etching, laser, sandblasting, or the like. The size of the through hole 304 is not particularly limited, but it is preferable that the size of the maximum opening 304e is 200 μm or less in order to realize a narrow pitch.

An insulating layer 307 and a filler 305 are arranged inside the through hole 304. The insulating film 307 is arranged on the side wall side of the through hole 304, and a part of the insulating film 307 is arranged on the first surface and the upper part of the second surface of the substrate 302. In the present embodiment, the filler 305 is a conductive material, and for example, a metal precipitate such as Cu, a conductive paste containing Cu or the like, or a conductive material such as a conductive resin is used. When a metal such as Cu is used as the filler 305, the electrolytic plating filling method is used. When a conductive paste or a conductive resin having fluidity is used as the filler, the through holes 304 are filled with the conductive paste or the conductive resin using a spatula or a scraper, and then heat treatment or the like is performed. The filling 305 can be formed by.

The insulating layers 306 and 308 are arranged on the first surface 302a and the second surface 302b of the substrate 302 either directly or via an intermediate layer (not shown), respectively. The insulating layers 306 and 308 may be an insulating material which is formed of, for example, an insulating resin material such as polyimide or benzocyclobutene and has an outgassing function. The insulating layers 306 and 308 act as a gas discharging portion that discharges (permeates the gas) the gas generated and released in the through hole 304 to the outside. At least one of the insulating layers (gas release portions) 306 and 308 is arranged so as to be in contact with the filler 305 exposed on the first surface and the second surface of the substrate 302. Further, when there is a gap between the side wall of the through hole 304 and the filling 305, a part of the insulating layers (gas discharge portions) 306 and 308 is arranged between the side wall of the through hole 304 and the filling 305. That is, the insulating layers 306 and 308 may be inserted between the side wall of the through hole 304 and the filling 305. The insulating layers 306 and 308 are formed by photolithography, for example, using a photosensitive insulating material with the desired patterning.

In the through electrode substrate 300 of the present invention according to the present embodiment, as described above, the through hole 304 has a minimum opening 304c, an inflection point 304d, and a maximum opening 304e. The through hole 304 is filled with the filler 305. In the case shown in FIG. 3, the portion of the through hole 304 on the second surface 302b side has a larger amount of the filling 305 than the portion of the through hole 304 on the first surface 302a side, and is released accordingly. The amount of gas also increases. Therefore, the area where the gas discharge unit 306 on the second surface side contacts the filling 305 is larger than the area where the gas discharge unit 308 on the first surface 302a side contacts the filling material 305. The amount of gas released from the gas discharge unit 308 on the 302b side may be increased. Further, since the second opening 304b is larger than the first opening 304a, the above-mentioned contact area relationship can be easily obtained by making the diameters of the via 310 and the via 312 substantially the same.

The vias 310 and 312, which are openings, are holes formed in the insulating layers (gas release portions) 306 and 308, respectively. Although not shown for convenience of explanation, wiring is formed on the vias 310 and 312 by plating or sputtering. These wirings come into contact with the filler 305 arranged in the through hole 304, and these wirings conduct with each other. As shown in FIG. 3B, the vias 310 and 312, which are the openings of the insulating layers (gas release portions) 306 and 308, are formed so as to overlap the first opening 304a and the second opening 304b of the substrate 302, respectively. Will be done. In other words, the vias 310 and 312, which are the openings of the insulating layers (gas release portions) 306 and 308, are arranged directly above the first opening 304a and the second opening 304b of the substrate 302, respectively. Further, a part of the via 310 and / or 312 which is an opening of the insulating layers (gas discharge portions) 306 and 308 is formed so as to overlap with the first opening 304a and the second opening 304b of the substrate 302, respectively. You may do it.

In the through electrode substrate 300 of the present invention according to the present embodiment, as described above, the through hole 304 has a minimum opening 304c, an inflection point 304d, and a maximum opening 304e. The through hole 304 is filled with the filler 305. By making a difference in size between the first opening 304a and the second opening 304b, the filling property of the filling can be ensured. When a force acts on the filling material 305 in the direction of the first surface 302a, the presence of the inflection point 304d can prevent the filling material 305 from falling off from the substrate 300. Further, when a force acts on the filling material 305 in the direction of the second surface 302a, the presence of the minimum opening 304c can prevent the filling material 305 from falling off from the substrate 300. The through silicon via substrate 300 according to the present embodiment may have only one of the minimum opening 304c and the maximum opening 304d. Therefore, in the through silicon via 300 of the present invention according to the present embodiment, the filling property of the filling material 305 can be ensured, and the filling material 305 can be prevented from falling off in either the vertical direction.

Further, in the through silicon via substrate 300 of the present invention according to the present embodiment, as described above, at least one of the insulating layers (gas emission portions) 306 and 308 is exposed on the first surface 302a and the second surface 302b of the substrate 302. It is arranged so as to be in contact with the filling material 305. Therefore, the insulating layer (gas release portion) 306 and / or 308 can release the gas generated and released in the through hole 304 to the outside, and the gas accumulated in the gas pool in the through hole 304 causes a problem. This can be eliminated, the filler 305 in the through hole 304 can be prevented from falling off, and a highly reliable through electrode substrate can be provided.

It is preferable that there is no space between the insulating layer 307 arranged on the side wall of the through hole 304 and the filling 305, but some space or a gap is generated between the insulating layer 307 and the filling 305. In some cases, it will end up. Even when such a space or a gap is generated, the through silicon via 300 of the present invention according to the present embodiment can prevent the filling portion 305 from falling off.

(Fourth Embodiment)
The configuration of the through silicon via substrate 400 of the present invention according to the fourth embodiment will be described with reference to FIG. FIG. 4A is a plan view of the through silicon via substrate 400 of the present invention according to the present embodiment as viewed from above. FIG. 4B is a cross-sectional view taken along the line AA'of FIG. 4A. Both FIGS. 4A and 4B show a part of the through silicon via 400 of the present invention according to the present embodiment for convenience of explanation.

The through electrode substrate 400 of the present invention according to the present embodiment includes a substrate 402, a through hole 404, a filler 405, insulating layers 406 and 408, an insulating layer 407, a conductive film 409, vias 410 and 412. A wiring structure, electronic components, and the like may be further mounted on the first surface 402a and the second surface 402b of the substrate 402, respectively.

In the present embodiment, the substrate 402 has conductivity, and for example, a semiconductor such as silicon, a metal such as stainless steel, or the like can be used. The thickness of the substrate 402 is not particularly limited, but can be appropriately set in the range of, for example, 10 μm to 1 mm.

The through hole 404 is a through hole that penetrates the first opening 404a arranged on the first surface 402a of the substrate 402 and the second opening 404b arranged on the second surface 402b which is the opposite surface of the first surface 402a. be. The shape of the through hole 404 is not constant and changes from the first opening 404a to the second opening 404b, as in the above-described first to third embodiments. In other words, the shape of the side wall of the through hole 404 is not constant and changes from the first opening 404a to the second opening 404b. The through hole 404 typically has a second opening 404b larger than the first opening 404a and has a constriction (neck) between the first opening 404a and the second opening 404b. More specifically, the through hole 404 is a minimum opening 404c having a minimum area M in a plan view (ie, viewed from above), and a side wall of the through hole 404 in a cross section (ie, viewed in the AA'cross section). Has an inflection point 404d (a curve having an inflection point 404d) varying by a curve, and a maximum opening 404e having a maximum area L in plan view (ie, viewed from above). In the present embodiment, the inflection point 404d of the through hole 404 is arranged closer to the second opening 404b than the center of the through hole 404, but the present invention is not limited to this, and the inflection point of the through hole 404 is not limited to this. The 404d may be arranged closer to the first opening 404a than the center of the through hole 404. The through hole 404 can be formed by subjecting the substrate 402 to etching, laser, sandblasting, or the like. The size of the through hole 404 is not particularly limited, but it is preferable that the size of the maximum opening 404e is 200 μm or less in order to realize a narrow pitch.

An insulating layer 407, a conductive film 409, and a filler 405 are arranged inside the through hole 404. The insulating layer 407 is arranged on the side wall side of the through hole 404, and a part of the insulating layer 407 is arranged on the first surface and the upper part of the second surface of the substrate 402. The conductive film 409 is arranged on the insulating layer 407 side of the through hole 404, and a part of the conductive film 409 is arranged on the first surface and the upper part of the second surface of the substrate 402. In the present embodiment, the filler 405 is an insulating material, and for example, an organic material such as polyimide or benzocyclobutene or an inorganic material such as silicon oxide or silicon nitride is used. The conductive film 407 can be formed by, for example, a plating method, a CVD method, or the like. The filler 405 can be formed by, for example, a method such as suction or thrusting.

The insulating layers 406 and 408 are arranged on the first surface 402a and the second surface 402b of the substrate 402 directly or via an intermediate layer (not shown), respectively. The insulating layers 406 and 408 may be any insulating material which is formed of an insulating resin material such as polyimide and has an outgassing function. The insulating layers 406 and 408 act as a gas discharging portion that discharges (permeates the gas) the gas generated and released in the through hole 404 to the outside. In the present embodiment, the insulating layers (gas release portions) 406 and 408 are arranged so as to cover and contact the filler 405 exposed on the first surface and the second surface of the substrate 202. At least one of the insulating layers (gas release portions) 406 and 408 may be arranged so as to be in contact with the filler 405 exposed on the first surface 402a and the second surface 402b of the substrate 402. Further, when there is a gap between the side wall of the through hole 404 and the filling 405, a part of the insulating layers (gas discharge portions) 406 and 408 is partially covered with the side wall and / or the insulating layer 407 of the through hole 404 and the filling 405. In other words, the insulating layers 406 and 408 may be inserted between the side wall of the through hole 404 and the filler 405. The insulating layers 406 and 408 are formed by photolithography, for example, using a photosensitive insulating material with the desired patterning.

In the through electrode substrate 400 of the present invention according to the present embodiment, as described above, the through hole 404 has a minimum opening 404c, an inflection point 404d, and a maximum opening 404e. The through hole 404 is filled with the filler 405. In the case shown in FIG. 4, the portion of the through hole 404 on the second surface 402b side has a larger amount of the filler 405 than the portion of the through hole 404 on the first surface 402a side, and the gas released. The amount of is also large. Therefore, the area where the gas discharging portion 406 on the second surface 402b side contacts the filling 405 is larger than the area where the gas discharging portion 408 on the first surface 402a side contacts the filling 405. The amount of gas released from the gas discharge unit 408 on the surface 402b side may be increased. Further, since the second opening 404b is larger than the first opening 404a, the above-mentioned contact area relationship can be easily obtained by making the diameters of the via 410 and the via 412 substantially the same.

The openings, vias 410 and 412, are holes formed in the 207 insulating layers (gas release portions) 406 and 408 on the conductive film 409 on the first surface and the second surface, respectively. Although not shown for convenience of explanation, wiring is formed on the vias 410 and 412 by plating or sputtering. These wirings come into contact with the conductive film 409 on the first surface 402a and the second surface 402b, and these wirings are conductive with each other. Further, a part of the via 410 and / or 412 which is the opening of the insulating layers (gas emission portions) 406 and 408 is formed so as to overlap the first opening 404a and the second opening 404b of the substrate 402, respectively. You may do it.

In the through electrode substrate 400 of the present invention according to the present embodiment, as described above, the through hole 404 has a minimum opening 404c, an inflection point 404d, and a maximum opening 404e. The through hole 404 is filled with the filler 405. By making a difference in size between the first opening 404a and the second opening 404b, the filling property of the filling can be ensured. When a force acts on the filling material 405 in the direction of the first surface 402a, the presence of the inflection point 404d can prevent the filling material 405 from falling off from the substrate 400. Further, when a force acts on the filling material 405 in the direction of the second surface, the presence of the minimum opening 404c can prevent the filling material 405 from falling off from the substrate 400. The through silicon via substrate 400 according to the present embodiment may have only one of the minimum opening portion 404c and the maximum opening portion 404d. Therefore, in the through silicon via substrate 400 of the present invention according to the present embodiment, the filling property of the filling material 405 can be ensured, and the filling material 405 can be prevented from falling off in either the vertical direction.

Further, in the through silicon via substrate 400 of the present invention according to the present embodiment, as described above, at least one of the insulating layers (gas emission portions) 406 and 408 is exposed on the first surface 402a and the second surface 402b of the substrate 402. It is arranged so as to be in contact with the filling material 405. Therefore, the insulating layer (gas release portion) 406 and / or 408 can release the gas generated and released in the through hole 404 to the outside, and the gas accumulated in the gas pool in the through hole 404 causes a problem. This can be eliminated, the filler 405 in the through hole 404 can be prevented from falling off, and a highly reliable through electrode substrate can be provided.

It is preferable that there is no space between the conductive film 409 arranged in the through hole 404 and the filling 205, but there may be some space or a gap between the conductive film 209 and the filling 405. There is also. Even when such a space or a gap is generated, the through silicon via 400 of the present invention according to the present embodiment can prevent the filling portion 405 from falling off.

(Fifth Embodiment)
FIG. 5A is a cross-sectional view of the through silicon via substrate 100 of the present invention according to the present embodiment. Further, FIG. 5B is an enlarged view of a portion of 104f in FIG. 5A. Both FIGS. 4A and 4B show a part of the through silicon via 100 of the present invention according to the present embodiment for convenience of explanation.

The through silicon via 100 of the present invention according to the present embodiment is the through electrode substrate 100 of the present invention according to the first embodiment, as shown in FIG. 5A, with the first surface of the first opening 104a of the through hole 104. The connecting portion 104f of the above has a curved surface. Further, the connecting portion 104g of the through hole 104 with the second surface of the second opening 104b has a curved surface. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

In the through electrode substrate 100 of the present invention according to the present embodiment, since the connecting portions 104f and 104g of the through holes 104 each have curved surfaces, it is possible to easily fill the filling 405.

Further, also in the other embodiments 2 to 4 described above, the connection portion of the through hole with the first surface of the first opening is made to have a curved surface, and the connection portion of the through hole with the first surface of the second opening is connected. By making the portion have a curved surface, the same configuration as that of the present embodiment can be adopted.

(Sixth Embodiment)
The configuration of the through silicon via substrate 100 of the present invention according to the sixth embodiment will be described with reference to FIG. FIG. 6A is a plan view of the through silicon via substrate 400 of the present invention according to the present embodiment as viewed from above. 6 (B) is a cross-sectional view taken along the line AA'of FIG. 4 (A). Both FIGS. 6A and 6B show a part of the through silicon via 100 of the present invention according to the present embodiment for convenience of explanation.

In the through electrode substrate 100 of the present invention according to the present embodiment, in the through electrode substrate 100 of the present invention according to the first embodiment, as shown in FIG. 5A, the variation point 104d of the through hole 104 is the through hole 104. It is arranged closer to the first opening 104a than the center. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted.

Further, also in the other embodiments 2 to 5 described above, the same configuration as that of the present embodiment can be adopted by arranging the inflection point of the through hole closer to the first opening than the center of the through hole. ..

(7th Embodiment)
The configuration of the through silicon via substrate 100 of the present invention according to the seventh embodiment will be described with reference to FIG. 7. FIG. 7A is a plan view of the through silicon via substrate 100 of the present invention according to the present embodiment as viewed from above. 7 (B) is a cross-sectional view taken along the line AA'of FIG. 7 (A). Note that both FIGS. 7A and 7B show a part of the through silicon via 100 of the present invention according to the present embodiment for convenience of explanation.

The through silicon via substrate 100 of the present invention according to the present embodiment is the through silicon via substrate 100 of the present invention according to the first embodiment, as shown in FIG. The 112 is provided so that the area increases in a plan view (that is, when viewed from the upper surface) as the distance from the substrate 102 side increases. In other words, in the cross-sectional view (that is, when viewed in the A-A'cross-section), the angle α formed by the gas discharge portions 106 and 108 and the packing 105 has an angle of about 45 degrees to about 89 degrees. Since other configurations are the same as those in the first embodiment, the description thereof will be omitted. The insulating layers 106 and 108 are formed by, for example, using a photosensitive insulating material and having a desired patterning by photolithography. By adjusting the exposure conditions, the openings of the gas emission portions 106 and 108 ( Vias) 110 and 112 can be formed so that the area increases in a plan view as the distance from the substrate 102 side increases.

The through silicon via 100 of the present invention according to the present embodiment has the above-mentioned configuration, so that it is possible to prevent the wiring arranged in the opening (via) from being cut off.

Further, schematic plan views of the through silicon via substrate 100 of the present invention according to the present embodiment are shown in FIGS. 8A and 8B. In the present embodiment, the openings (vias) 110 and 112 of the gas discharge portions 106 and 108 are provided so that the area increases in a plan view (that is, when viewed from the upper surface) as the distance from the substrate 102 side increases. Since the area of the openings (vias) 110 and 112 on the filling 105 can be reduced and the contact between the openings (vias) 110 and 112 and the filling 105 can be secured, the openings (vias) 110 and 112 are formed. It is possible to reduce the possibility of contact failure due to misalignment.

For example, FIG. 8A shows a case where the opening (via) 110 on the filling 105 is displaced to the right. Further, FIG. 8B shows a case where the opening (via) 110 on the filling 105 is displaced to the right and a part of the opening (via) 110 is displaced from the filling 105. Even in the cases shown in FIGS. 8A and 8B, since the contact between the openings (vias) 110 and 112 and the filling 105 can be secured, there is a possibility of contact failure due to misalignment of the openings (vias) 110 and 112. Can be made smaller.

Further, in the other embodiments 2 to 4 described above, the same configuration as that of the present embodiment can be adopted as shown in FIGS. 9 to 11. This will be described below.

The through silicon via substrate 200 of the present invention according to the present embodiment is the through silicon via substrate 200 of the present invention according to the second embodiment, as shown in FIG. The 212 is provided so that the area increases in a plan view (that is, when viewed from the upper surface) as the distance from the substrate 202 side increases. In other words, in the cross-sectional view (that is, when viewed in the A-A'cross-section), the angle α formed by the gas discharge portions 206 and 208 and the filling 205 has an angle of about 45 degrees to about 89 degrees. Since other configurations are the same as those in the second embodiment, the description thereof will be omitted.

The through silicon via substrate 300 of the present invention according to the present embodiment is the through silicon via substrate 300 of the present invention according to the third embodiment, as shown in FIG. The 312 is provided so that the area increases in plan view (that is, when viewed from the upper surface) as the distance from the substrate 302 side increases. In other words, in the cross-sectional view (that is, when viewed in the A-A'cross-section), the angle α formed by the gas discharge portions 306 and 308 and the filling material 305 has an angle of about 45 degrees to about 89 degrees. Since other configurations are the same as those in the third embodiment, the description thereof will be omitted.

The through silicon via substrate 400 of the present invention according to the present embodiment is the through silicon via substrate 400 of the present invention according to the fourth embodiment, as shown in FIG. The 412 is provided so that the area increases in plan view (that is, when viewed from the upper surface) as the distance from the substrate 402 side increases. In other words, in the cross-sectional view (that is, when viewed in the A-A'cross-section), the angle α formed by the gas discharge portions 406 and 408 and the filling material 405 has an angle of about 45 degrees to about 89 degrees. Since other configurations are the same as those in the fourth embodiment, the description thereof will be omitted.

As described above, in any of the configurations of the present embodiment, the area of the opening (via) on the filling can be reduced, and the contact between the opening (via) and the filling can be secured, so that the opening (via) can be secured. ) Can be reduced due to misalignment.

(8th Embodiment)
The configuration of the semiconductor device 1000 of the present invention according to the eighth embodiment will be described with reference to FIGS. 12 to 14. In this embodiment, the semiconductor device 1000 using the through silicon via substrate in the above-mentioned first to seventh embodiments will be described.

FIG. 12 is a diagram showing a semiconductor device 1000 according to the present embodiment. In the semiconductor device 1000, three through electrode substrates 100 according to the present invention are laminated and connected to an LSI substrate (semiconductor substrate) 500. The LSI board 500 is provided with a wiring layer 502. A semiconductor element such as a DRAM is arranged on the through silicon via substrate 100, for example. The through silicon via substrate 100 is provided with a wiring layer 120. As shown in FIG. 12, the wiring layer 502 of the LSI substrate 500 and the wiring layer 120 of the through silicon via substrate 100 are connected via the bump 1002. For the bump 1002, for example, a metal such as indium, copper, or gold is used. Further, as shown in FIG. 12, the wiring layer 120 of the through electrode substrate 100 and the wiring layer 120 of another through electrode substrate 100 are connected via the bump 1002.

When the through silicon via substrates 100 are laminated, the number of layers is not limited to three, and may be two layers or four or more layers. Further, in the connection between the through electrode substrate 100 and another substrate, not only the one using bumps but also other bonding techniques such as eutectic bonding may be used. Further, a polyimide, an epoxy resin or the like may be applied and fired to bond the through silicon via substrate 100 to another substrate.

FIG. 13 is a diagram showing another example of the semiconductor device 1000 of the present invention according to the present embodiment. In the semiconductor device 1000 shown in FIG. 13, semiconductor chips (LSI chips) 600 and 602 such as a MEMS device, a CPU, a memory, and an IC, and a through electrode substrate 100 are laminated and connected to the LSI substrate 500.

A through electrode substrate 100 is arranged between the semiconductor chip 6000 and the semiconductor chip 602, and both are connected by bumps 1002. The semiconductor chip 600 is placed on the LSI substrate 500, and the LSI substrate 500 and the semiconductor chip 602 are connected by a wire 604. In this example, the through silicon via substrate 100 is used as an interposer for stacking a plurality of semiconductor chips and mounting them three-dimensionally, and by stacking a plurality of semiconductor chips having different functions, a multifunctional semiconductor device is obtained. be able to. For example, by using the semiconductor chip 600 as a 3-axis acceleration sensor and the semiconductor chip 602 as a 2-axis magnetic sensor, it is possible to realize a semiconductor device in which a 5-axis motion sensor is realized by one module.

When the semiconductor chip is a sensor formed by a MEMS device or the like, the sensing result may be output by an analog signal. In this case, the low-pass filter, amplifier, and the like may also be formed on the semiconductor chip 600, 602, or the through silicon via substrate 100.

FIG. 14 is a diagram showing another example of the semiconductor device 1000 according to the present embodiment. The above-mentioned two examples (FIGS. 12 and 13) were three-dimensional mounting, but in this example, the through silicon via substrate 100 is applied to the combined mounting of two dimensions and three dimensions. In the example shown in FIG. 14, six through electrode substrates 100 are laminated and connected to the LSI substrate 500. However, not only are all the through silicon via boards 100 stacked and arranged, but they are also arranged side by side in the in-plane direction of the board.

In the example of FIG. 14, two through electrode substrates 100 are connected on the LSI substrate 500, the through electrode substrate 100 is further connected on the through electrode substrates 100, and the through electrode substrate 100 is further connected on the through electrode substrate 10. It is connected. Even if the through silicon via substrate 100 is used as an interposer for connecting a plurality of semiconductor chips as in the example shown in FIG. 13, the two-dimensional and three-dimensional mounting can be performed in combination. For example, some through silicon via boards 100 may be replaced with semiconductor chips.

Further, in the examples of FIGS. 12 to 14, an example in which the through silicon via substrate 100 of the present invention according to the first embodiment is used as the through silicon via substrate is shown, but the present invention is not limited to this, and other embodiments are shown. The through silicon via substrate 200, 300 and / or 400 according to the present invention may be used.

The semiconductor device 1000 of the present invention according to the present embodiment includes, for example, mobile terminals (mobile phones, smartphones, notebook personal computers, etc.), information processing devices (desktop personal computers, servers, car navigation, etc.), home appliances, and the like. It is installed in various electrical equipment.

100, 200, 300, 400 Through Silicon Via Substrate 102, 202, 302, 402 Substrate 104, 204, 304, 404 Through Hole 105, 205, 305, 405 Filling 106, 108, 206, 208, 306, 308, 406, 408 Insulation layer 207, 409 Conductive film 307, 407 Insulation layer 110, 112, 210, 212, 310, 312, 410, 412 Via (opening)

Claims (8)

A substrate having a through hole penetrating the first opening on the first surface and the second opening on the second surface,
The conductive film provided on the inner wall of the through hole and
With the insulating first member arranged inside the through hole from the conductive film,
An insulating resin layer that overlaps with the through hole in a plan view and is in contact with the first member exposed on at least one of the first surface and the second surface.
Equipped with
The second opening is larger than the first opening, and there is a minimum opening having the smallest area in a plan view between the first opening and the second opening.
A through silicon via substrate in which a space is provided between the conductive films facing each other in the minimum opening. The through silicon via according to claim 1, wherein the insulating resin layer has a function of allowing gas to pass through. The through electrode substrate according to claim 1 or 2, wherein the insulating resin layer has vias that overlap the through holes in a plan view. The through electrode substrate according to claim 1 or 2, wherein the insulating resin layer has vias that do not overlap with the through holes in a plan view. The through silicon via according to claim 3 or 4, wherein the via has a tapered shape. The through electrode substrate according to any one of claims 3 to 5, wherein the angle formed by the side wall of the via and the upper surface of the first member is 45 ° or more and 89 ° or less. The through electrode substrate according to any one of claims 1 to 6, wherein the side wall of the through hole is a continuous curve from the first opening to the second opening. The through electrode substrate according to any one of claims 1 to 6, wherein the side wall of the through hole has an inflection point.

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