JP6888668B2 - 配線基板および電子モジュール - Google Patents
配線基板および電子モジュール Download PDFInfo
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- JP6888668B2 JP6888668B2 JP2019509747A JP2019509747A JP6888668B2 JP 6888668 B2 JP6888668 B2 JP 6888668B2 JP 2019509747 A JP2019509747 A JP 2019509747A JP 2019509747 A JP2019509747 A JP 2019509747A JP 6888668 B2 JP6888668 B2 JP 6888668B2
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- 239000012212 insulator Substances 0.000 claims description 67
- 239000003990 capacitor Substances 0.000 claims description 51
- 239000000919 ceramic Substances 0.000 claims description 31
- 239000010410 layer Substances 0.000 description 82
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 8
- 239000004020 conductor Substances 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 5
- 238000010304 firing Methods 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 229910052709 silver Inorganic materials 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 238000000576 coating method Methods 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000003247 decreasing effect Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 238000005422 blasting Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000005672 electromagnetic field Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 239000002002 slurry Substances 0.000 description 2
- 229910052718 tin Inorganic materials 0.000 description 2
- 238000005520 cutting process Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 210000002615 epidermis Anatomy 0.000 description 1
- 239000002241 glass-ceramic Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Description
図1、図2(A)、(B)に、第1実施形態にかかる配線基板100を示す。ただし、図1は、配線基板100の斜視図である。図2(A)は、配線基板100の断面図であり、図1の一点鎖線A-A部分を示している。図2(B)は、うねりRが発生した場合における配線基板100の断面図であり、図1の一点鎖線A-A部分を示している。
図6に、第2実施形態にかかる配線基板200を示す。ただし、図6は、は、第1電極13および第2電極14のみを示した配線基板200の要部分解斜視図である。
図7に、第3実施形態にかかる配線基板300を示す。ただし、図7は、は、第1電極23および第2電極24のみを示した配線基板300の要部分解斜視図である。
図8に、第4実施形態にかかる配線基板400を示す。ただし、図8は、は、第1電極33および第2電極34のみを示した配線基板400の要部分解斜視図である。
図9に、第5実施形態にかかる配線基板500を示す。ただし、図9は、は、第1電極43および第2電極44のみを示した配線基板500の要部分解斜視図である。
図10に、第6実施形態にかかる配線基板600を示す。ただし、図10は、第1電極53および第2電極54のみを示した配線基板600の要部分解斜視図である。
図11に、第7実施形態にかかる配線基板700を示す。ただし、図11は、配線基板700の断面図である。
図13に、第8実施形態にかかる電子モジュール800を示す。ただし、図13は、電子モジュール800の斜視図である。
2・・・ランド電極
3、13、23、33、43、53、63・・・第1電極
4、14、24、34、44、54、64・・・第2電極
76・・・半導体装置
77・・・受動部品(キャパシタ、インダクタ、抵抗など)
100、200、300、400、500、600・・・配線基板
800・・・電子モジュール
Claims (6)
- 複数の絶縁体層が積層され、前記絶縁体層の層間に電極が形成された配線基板であって、
同一の前記層間に、間隔を開けて、第1電極と第2電極とが形成され、
前記第1電極の厚みは、前記第2電極の厚みよりも大きく、
前記絶縁体層の積層方向に対して垂直な方向から透視したとき、前記絶縁体層の積層方向において、前記第1電極の下側主面は前記第2電極の下側主面よりも低く、前記第1電極の上側主面は前記第2電極の上側主面よりも高い位置にあり、
前記絶縁体層がセラミックである、配線基板。 - 前記第1電極が、インダクタ電極、キャパシタ電極、配線電極、グランド電極から選ばれる1種であり、
前記第2電極も、インダクタ電極、キャパシタ電極、配線電極、グランド電極から選ばれる1種である、請求項1に記載された配線基板。 - 前記絶縁体層の積層方向に透視したとき、
前記第1電極の面積が、前記第2電極の面積よりも大きい、請求項1または2に記載された配線基板。 - 前記絶縁体層の積層方向に透視したとき、
前記第2電極の面積が、前記第1電極の面積よりも大きい、請求項1または2に記載された配線基板。 - 前記絶縁体層の積層方向に対して垂直な方向から透視したとき、
前記第1電極および前記第2電極の少なくとも一方は、断面が複数の角部を有する多角形であり、
全ての前記角部が鈍角である、請求項1ないし4のいずれか1項に記載された配線基板。 - 請求項1ないし5のいずれか1項に記載された配線基板に、電子部品が実装された電子モジュール。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2017061949 | 2017-03-27 | ||
JP2017061949 | 2017-03-27 | ||
PCT/JP2018/011943 WO2018181076A1 (ja) | 2017-03-27 | 2018-03-24 | 配線基板および電子モジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2018181076A1 JPWO2018181076A1 (ja) | 2020-01-23 |
JP6888668B2 true JP6888668B2 (ja) | 2021-06-16 |
Family
ID=63676095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019509747A Active JP6888668B2 (ja) | 2017-03-27 | 2018-03-24 | 配線基板および電子モジュール |
Country Status (4)
Country | Link |
---|---|
US (1) | US11923284B2 (ja) |
JP (1) | JP6888668B2 (ja) |
CN (1) | CN110463358B (ja) |
WO (1) | WO2018181076A1 (ja) |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4490690A (en) * | 1982-04-22 | 1984-12-25 | Junkosha Company, Ltd. | Strip line cable |
JPH0662570A (ja) | 1992-08-03 | 1994-03-04 | Toyota Autom Loom Works Ltd | 共振形dc−dcコンバータ |
JPH09237955A (ja) * | 1995-12-28 | 1997-09-09 | Fuji Elelctrochem Co Ltd | 積層部品の導体膜パターン形成方法 |
JP4032577B2 (ja) * | 1999-09-10 | 2008-01-16 | 松下電器産業株式会社 | 高電流・高電圧用回路基板及びその製造方法 |
JP4557386B2 (ja) * | 2000-07-10 | 2010-10-06 | キヤノン株式会社 | 記録ヘッド用基板の製造方法 |
SG99360A1 (en) * | 2001-04-19 | 2003-10-27 | Gul Technologies Singapore Ltd | A method for forming a printed circuit board and a printed circuit board formed thereby |
JP2005347354A (ja) * | 2004-05-31 | 2005-12-15 | Sanyo Electric Co Ltd | 回路装置およびその製造方法 |
JPWO2006040941A1 (ja) | 2004-10-08 | 2008-05-15 | 松下電器産業株式会社 | 積層セラミック部品とその製造方法 |
JP4551730B2 (ja) * | 2004-10-15 | 2010-09-29 | イビデン株式会社 | 多層コア基板及びその製造方法 |
TWI286916B (en) * | 2004-10-18 | 2007-09-11 | Via Tech Inc | Circuit structure |
US7450396B2 (en) * | 2006-09-28 | 2008-11-11 | Intel Corporation | Skew compensation by changing ground parasitic for traces |
JP5139169B2 (ja) * | 2008-06-20 | 2013-02-06 | 日東電工株式会社 | 配線回路基板およびその製造方法 |
JP2013062293A (ja) * | 2011-09-12 | 2013-04-04 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
JP2015159240A (ja) * | 2014-02-25 | 2015-09-03 | 矢崎総業株式会社 | フレキシブルフラット回路体 |
-
2018
- 2018-03-24 JP JP2019509747A patent/JP6888668B2/ja active Active
- 2018-03-24 CN CN201880019434.2A patent/CN110463358B/zh active Active
- 2018-03-24 WO PCT/JP2018/011943 patent/WO2018181076A1/ja active Application Filing
-
2019
- 2019-09-27 US US16/585,180 patent/US11923284B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
WO2018181076A1 (ja) | 2018-10-04 |
JPWO2018181076A1 (ja) | 2020-01-23 |
CN110463358B (zh) | 2022-05-10 |
US11923284B2 (en) | 2024-03-05 |
US20200027825A1 (en) | 2020-01-23 |
CN110463358A (zh) | 2019-11-15 |
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