JP6586352B2 - Manufacturing method of semiconductor device - Google Patents

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  With the recent increase in environmental and resource awareness, thermoelectric modules that convert thermal energy into electrical energy and, conversely, convert electrical energy into thermal energy are being developed. In general, a thermoelectric module has a structure in which two substrates on which electrodes are formed face each other, and p-type semiconductor elements and n-type semiconductor elements are alternately connected between the electrodes. It is a DC circuit. Further, the semiconductor element and each electrode are joined by solder or the like. When a temperature difference is given to the two upper and lower substrates, current (electric power) can be generated by the Seebeck effect. When a current is passed through the thermoelectric module, a temperature difference occurs between the substrates due to the movement of thermal energy due to the Peltier effect.

  As a method for manufacturing a thermoelectric module, after the step of joining the electrode formed on the lower substrate and one end of the semiconductor element via solder, the electrode formed on the upper substrate and the other end of the semiconductor element are soldered. There has been proposed a technique that undergoes a step of joining via a wire (Patent Document 1).

Japanese Patent No. 2583142

  However, when the solder joint between the upper and lower electrodes and the semiconductor element is sequentially performed in a reflow furnace as in the above technique, the previous solder joint is melted again during the reflow for the subsequent solder joint, and the previous solder joint is performed. In some cases, defects such as voids due to misalignment or peeling occur in the portion, and reliability may be reduced. On the other hand, although it is possible to adopt a method using solder having different melting points at the upper and lower joints, it is necessary to prepare two types of solder having different melting points and to set different reflow temperatures. This leads to a decrease in the manufacturing yield of semiconductor devices.

  An object of the present invention is to provide a method for manufacturing a semiconductor device capable of manufacturing a highly reliable semiconductor device with a high yield even if the bonding between the opposing electrode and the semiconductor element is sequential.

  As a result of intensive studies, the present inventors have found that the object can be achieved by adopting the following configuration, and have completed the present invention.

That is, the present invention provides a first substrate and a second substrate that are arranged to face each other,
A first electrode and a second electrode formed on the opposing surfaces of the first substrate and the second substrate, respectively, and a first solder on the first electrode side between the first electrode and the second electrode; A method of manufacturing a semiconductor device comprising a semiconductor element erected via a junction and a second solder junction on the second electrode side,
Forming the first electrode formed on the first substrate and one end of the semiconductor element on the second substrate after the step A by heating and joining the first element through the first solder joint. Step B of heat bonding the second electrode thus formed and the other end of the semiconductor element via the second solder joint portion.
Including
In the step B, a first jig is disposed on the surface of the first substrate opposite to the facing surface, and the second substrate is heated on the surface opposite to the facing surface from the first jig. The present invention relates to a method for manufacturing a semiconductor device which is performed by arranging a second jig having high conductivity.

  In the manufacturing method, the process A for solder-bonding the first electrode and one end of the semiconductor element and the process B for solder-bonding the second electrode and the other end of the semiconductor element are sequentially performed. During the process B, which is bonding, the first jig is disposed on the surface opposite to the facing surface of the first substrate, and heat conduction from the first jig is performed on the surface opposite to the facing surface of the second substrate. The 2nd jig | tool with a high rate is arrange | positioned. Thereby, the heat at the time of heat bonding is more easily transmitted to the second solder joint portion to be joined from the first solder joint portion joined first. In other words, there is a temperature difference between the first solder joint and the second solder joint at the time of heat joining in step B, and the temperature at the second solder joint becomes sufficiently high to perform solder joining. However, the temperature of the first solder joint can be kept low. As a result, even if the first solder joint and the second solder joint have the same melting point, melting of the first solder joint joined first can be prevented, and the first solder joint can be prevented. It is possible to manufacture a highly reliable semiconductor device by suppressing voids resulting from positional displacement and peeling of the portion. In addition, since the same material can be used for the first solder joint and the second solder joint, it is possible to save labor and cost for preparing different materials and to prevent mistakes in the material mix. Furthermore, the process A and the process B can be performed under the same heat-bonding condition due to the temperature difference between the first solder joint and the second solder joint generated at the time of the heat-bonding in the process B. Since no setting or additional reflow furnace is required, the manufacturing yield of the semiconductor device can be improved.

  It is preferable that the thermal conductivity of the second jig is 1.5 times or more the thermal conductivity of the first jig. The difference between the thermal conductivity of the second jig and the thermal conductivity of the first jig is preferably 50 W / m · K or more. It is preferable that the thermal conductivity of the first jig is 0.1 to 5 W / m · k, and the thermal conductivity of the second jig is 60 W / m · K or more. When the thermal conductivity of each of the first jig and the second jig used in the process B satisfies the relationship or range as described above, a temperature difference is generated between the first solder joint and the second solder joint. A semiconductor device that can be generated efficiently and has higher reliability can be manufactured. In addition, the range of material selection for the first solder joint portion and the second solder joint portion can be widened, and the process design can be made more efficient.

The semiconductor device includes a plurality of the first electrode and the second electrode,
A plurality of the semiconductor elements are alternately installed between the plurality of first electrodes and the second electrode through the corresponding first solder joint portions and second solder joint portions, respectively.
The plurality of semiconductor elements may have a configuration electrically connected in series.

  With the above structure, the functions of the semiconductor elements can be integrated, and the functionality of the semiconductor device can be enhanced.

  The semiconductor element may be a thermoelectric conversion element. Thereby, a semiconductor device can be used conveniently as a thermoelectric module.

It is a cross-sectional schematic diagram which shows the semiconductor device which concerns on one Embodiment of this invention. It is a mimetic diagram showing the 1st substrate and the 1st electrode concerning one embodiment of the present invention. It is a plane schematic diagram which shows the 2nd board | substrate and 2nd electrode which concern on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention. It is a cross-sectional schematic diagram which shows 1 process of the manufacturing process of the semiconductor device which concerns on one Embodiment of this invention.

  Embodiments of the present invention will be described below with reference to the drawings. A semiconductor device as a finished product will be briefly described, and then a method for manufacturing the semiconductor device will be described in detail. However, in some or all of the drawings, parts unnecessary for the description are omitted, and there are parts shown enlarged or reduced for easy explanation. The terms indicating the positional relationship such as up and down are merely used for ease of explanation, and are not intended to limit the configuration of the present invention.

<Semiconductor device>
FIG. 1A is a schematic cross-sectional view showing a semiconductor device according to an embodiment of the present invention. FIG. 1B is a schematic plan view showing a first substrate and a first electrode according to an embodiment of the present invention. FIG. 1C is a schematic plan view showing a second substrate and a second electrode according to an embodiment of the present invention. The semiconductor device 10 includes a first substrate 21 and a second substrate 12 that are arranged to face each other, a first electrode 21 that is formed on the opposing surfaces 11a and 12a of the first substrate 11 and the second substrate 12, respectively, and Between the second electrode 22 and the first electrode 21 and the second electrode 22, a first solder joint 31 on the first electrode 21 side and a second solder joint 32 on the second electrode 22 side are respectively installed. Semiconductor elements 4a and 4b (hereinafter sometimes referred to as "semiconductor element 4" without distinction).

  In the present embodiment, a plurality of first electrodes 21 and a plurality of second electrodes 22 are formed, and corresponding first solder joints 31 and second solder joints are provided between the plurality of first electrodes 21 and the second electrodes 22. A plurality of semiconductor elements 4 a and 4 b are alternately arranged via 32, and the plurality of semiconductor elements 4 a and 4 b are electrically connected in series. When this configuration is regarded as a series circuit, the electrode 5a located at the upstream end and the electrode 5b located at the downstream end are each connected to an external electric circuit (not shown). .

  The semiconductor elements 4a and 4b may be a p-type thermoelectric conversion element and an n-type thermoelectric conversion element, respectively. Since the p-type thermoelectric conversion element and the n-type thermoelectric conversion element are connected in series, when a temperature difference occurs between the first substrate 11 and the second substrate 12, a current can be generated by the Seebeck effect. Thereby, the semiconductor device 10 can function as a thermoelectric module.

<Method for Manufacturing Semiconductor Device>
Hereinafter, the manufacturing method of the semiconductor device of this embodiment will be described with reference to FIGS. 2A to 2F. 2A to 2F are cross-sectional schematic views showing one process of a manufacturing process of a semiconductor device according to one embodiment of the present invention.

(Process A)
In step A, the first electrode 21 formed on the first substrate 11 and one end of the semiconductor element 4 are heat-bonded via the first solder bonding portion 31 (see FIGS. 2A to 2D).

  First, as shown in FIGS. 1B and 2A, a first substrate 11 on which a plurality of first electrodes 21 are formed is prepared. The first electrode 21 is formed corresponding to the second electrode 22 formed on the second substrate 12 so that the semiconductor elements 4a, 4b installed between the electrodes are alternately and electrically connected in series. Yes.

  The first substrate 11 can be appropriately selected according to the application, and may be any of a metal substrate, a ceramic substrate, a resin substrate, and a combination thereof. In the form shown in FIG. 1B, a substrate made of a polyimide film having flexibility and heat resistance is used. When the first substrate 11 has flexibility, a reinforcing material such as an aluminum metal plate is provided on the surface of the first substrate 11 opposite to the surface on which the first electrode 21 is formed in order to improve handling. You may arrange.

  The material of the first electrode 21 is not particularly limited as long as it has electrical conductivity. For example, platinum, aluminum, nickel, tungsten, iron, gold, silver, copper, palladium, chromium, or an alloy thereof is used. Although it can mention, copper which is cheap and excellent in electrical conductivity is preferred. Moreover, it is preferable that nickel or gold is plated on the copper first electrode 21 for ease of solder bonding. The thickness of the first electrode 21 is preferably about 1 μm to 100 μm, more preferably 5 to 50 μm, including copper and nickel or gold plating formed thereon. The first electrode 21 can be formed by, for example, a plating method, a direct bonding method, a brazing method, or the like.

  Next, as shown in FIG. 2B, a solder paste 31 ′ for forming a first solder joint is applied on the first electrode 21 so as to correspond to the planned placement positions of the semiconductor elements 4 a and 4 b. The material for forming the solder paste 31 ′ is not particularly limited. For example, Sn—Ag—Cu, Sn—Pb, Pb—Sn—Sb, Sn—Sb, Sn—Pb—Bi, and Bi—Sn are used. Sn-Cu system, Sn-Pb-Cu system, Sn-In system, Sn-Ag system, Sn-Pb-Ag system, Pb-Ag system and the like.

  The solder paste 31 'can be applied by a printing method (screen mask, metal mask), a dispensing method, or the like. What is necessary is just to set the coating thickness of solder paste 31 'according to the thickness of the 1st solder junction part 31 formed after that, it is preferable that it is 5 micrometers-1000 micrometers, and it is more preferable that it is 10-100 micrometers. preferable.

  Subsequently, as shown in FIG. 2C, a plurality of semiconductor elements 4 are disposed on the solder paste 31 'and temporarily fixed. The semiconductor element 4 can be disposed mechanically using a die bonder, a chip mounter, or the like, or manually. In order to position the semiconductor element 4 and prevent the temporarily fixed semiconductor element 4 from falling, a lattice-shaped jig having an opening corresponding to the position where the semiconductor element is arranged may be used in combination.

The semiconductor element 4 may be a known semiconductor. For example, in the case of a thermoelectric conversion element, Bi ₂ Te ₃ series, oxide semiconductor series, silicide series, skutterudite series, Heusler series, carbon / polymer material series, etc. These semiconductor elements can be used. The number of the semiconductor elements 4 can be appropriately set according to the use of the semiconductor device 10. For example, when the semiconductor element 10 is used as a thermoelectric module, the semiconductor element 10 may be appropriately selected according to the generated voltage and the amount of heat absorption required for the thermoelectric module.

  After temporarily fixing the semiconductor element 4, the first substrate 11, the first electrode 21, the solder paste 31 ′, and the stacked body of the semiconductor elements 4 are put into a reflow furnace, and the solder paste 31 ′ is heated and melted, whereby the first A first substrate side block is formed in which the first electrode 21 formed on the substrate 11 and one end of the semiconductor element 4 are heat-bonded via the first solder joint (see FIG. 2D).

  The heat bonding conditions may be set according to the melting point of the solder material, the size of the first solder bonding portion 31, and the like. As suitable conditions, it is in the range of 100-320 degreeC (more preferably 120-300 degreeC) as the temperature in a reflow furnace, and is 1-20 minutes (more preferably 3-15 minutes) as a heating time.

  At the time of heat bonding, in order to improve the adhesion between the semiconductor element 4 and the first solder bonding portion 31 and the adhesion between the first solder bonding portion 31 and the first electrode 21, an end of the semiconductor element 4 on the bonding side. A weight W may be placed on the end surface opposite to the portion (see FIG. 2D). The weight of the weight W can be appropriately set in consideration of the fluidity of the solder paste 31 ', the load applied to each semiconductor element, and the like. As the material of the weight W, a material having high thermal conductivity is preferable so as not to prevent heat bonding, and aluminum is preferable.

(Process B)
Next, after the step A, a step B is performed in which the second electrode 22 formed on the second substrate 12 and the other end of the semiconductor element 4 are heat-bonded via the second solder bonding portion 32 (FIG. 2E). And FIG. 2F).

  Prior to heat bonding, as shown in FIGS. 1C and 2E, a second substrate 12 having a plurality of second electrodes 22 formed thereon is prepared, and solder for forming a second solder bonding portion 32 on the second electrode 22 is prepared. Apply paste 32 '. The same specifications and forming methods for the second substrate 12, the second electrode 22 and the solder paste 32 'as those for the first electrode 11 can be preferably used.

  The formation position of the second electrode 22 is different from that of the semiconductor element 4a on the first electrode 12 so that the semiconductor elements 4 are electrically connected in series as shown in FIGS. 1A to 1C. It is preferably formed so as to straddle the semiconductor element 4b on the first electrode 12.

  Subsequently, the second substrate 12 is placed on the semiconductor element 4 and temporarily fixed so that the other end (free end) of the semiconductor element 4 and the corresponding solder paste 32 ′ are connected.

  In the present embodiment, as shown in FIGS. 2E and 2F, the first jig J1 is disposed on the surface 11b opposite to the facing surface 11a of the first substrate 11 during the heat bonding in the step B, and the second substrate A second jig J2 having a thermal conductivity higher than that of the first jig J1 is arranged on the surface 12b opposite to the facing surface 12a. Thereby, the heat at the time of heat joining in the reflow furnace is more easily transmitted to the second solder joint portion 32 (or solder paste 32 ') to be joined from the first solder joint portion 31 joined first. Become. In other words, a temperature difference can be generated between the first solder joint portion 31 and the second solder joint portion 32 during the heat joining in the process B. As a result, even if the first solder joint portion 31 and the second solder joint portion 32 are formed of the same material or have the same melting point, the first solder joint portion 31 joined first. It is possible to prevent melting of the first solder joint portion 31, and it is possible to manufacture a highly reliable semiconductor device by suppressing voids resulting from positional deviation and peeling of the first solder joint portion 31.

  The thermal conductivity of the second jig J2 is preferably 1.5 times or more, more preferably 2 times or more, and more preferably 3 times or more that of the first jig J1. It is preferably 5 times or more, more preferably 10 times or more.

  Further, the difference between the thermal conductivity of the second jig J2 and the thermal conductivity of the first jig J1 is preferably 50 W / m · K or more, more preferably 100 W / m · K or more, More preferably, it is 200 W / m · K or more.

  Furthermore, the thermal conductivity of the first jig J1 is preferably 0.1 to 5 W / m · k, and the thermal conductivity of the second jig J2 is preferably 60 W / m · K or more.

  When each thermal conductivity of the 1st jig | tool J1 and the 2nd jig | tool J2 used in process B satisfy | fills the above relations or ranges, it is between the 1st solder joint part 31 and the 2nd solder joint part 32. Thus, a temperature difference can be generated efficiently, and a more reliable semiconductor device can be manufactured. Further, the range of material selection for the first solder joint portion 31 and the second solder joint portion 32 can be widened, and the process design can be made more efficient.

  The temperature difference between the first solder joint portion 31 and the second solder joint portion 32 at the time of heat joining is preferably 10 ° C. or more, and more preferably 15 ° C. or more.

  A known material can be used as a material for forming the first jig J1 and the second jig J2. Examples of the material for forming the first jig J1 include zirconia (3 W / m · K), glass epoxy composite (0.4 W / m · K), and the like. .) Moreover, as a forming material of the second jig J2, for example, copper (400 W / m · K), aluminum (230 to 235 W / m · K), stainless steel (16 to 26 W / m · K), silica (10 W / m · K), alumina (20 to 40 W / m · K), zinc oxide (54 W / m · K), silicon carbide (270 W / m · K), aluminum nitride (70 to 270 W / m · K), and the like. (All figures in parentheses are typical thermal conductivities.) A material may be appropriately selected from these so as to satisfy the relationship of the thermal conductivity.

  The temporary fixing body is put into a reflow furnace in a state where the first jig J1 and the second jig J2 are arranged, and the second substrate 12 is subjected to heat bonding under the same heat bonding conditions as the first solder bonding portion 31. The second electrode 22 formed above and the other end of the semiconductor element 4 are heat-bonded via the second solder joint portion 32, and the semiconductor device 10 can be obtained. In the present embodiment, since the first solder joint portion 31 and the second solder joint portion 32 can be formed of the same forming material or the same melting point material, it is not necessary to set different heat bonding conditions or to add an additional reflow furnace. The production yield can be improved.

  Hereinafter, preferred embodiments of the present invention will be described in detail by way of example. However, the materials, blending amounts, and the like described in this example are not intended to limit the scope of the present invention only to those unless otherwise specified.

<Example 1>
A polyimide film having a thickness of 12 μm in which a copper foil having a thickness of 12.5 μm was bonded via an adhesive layer was prepared as a first substrate. The copper foil was etched through the photolithography process, and a plurality of first copper electrodes having a substantially rectangular shape (3 mm × 7 mm) in plan view as shown in FIG. 1B were formed in an array (interelectrode distance 1 mm). An aluminum plate having a thickness of 500 μm was bonded as a reinforcing material to the surface of the polyimide film opposite to the first copper electrode side through an adhesive film. Sn-Ag-Cu solder paste (manufactured by Nippon Filler Metals Co., Ltd., “CS / PBF111-WA11-EPS90”, melting point 217 ° C.) is thick by a printing method using a mask at a semiconductor element placement planned position on the first copper electrode. The coating was performed at a thickness of 125 μm. Next, 118 semiconductor elements (p-type thermoelectric conversion elements and n-type thermoelectric conversion elements) having a rectangular parallelepiped shape (2 mm × 2 mm × height 3 mm) are alternately disposed manually on the solder paste using tweezers. Fixed. At this time, a grid-like jig (thickness 2 mm) having an opening corresponding to the position where the semiconductor device is arranged was installed, and the semiconductor element was inserted into the opening. An aluminum plate and a weight were placed on the temporarily fixed semiconductor element, and this was put into a reflow furnace to perform primary soldering between one end of the semiconductor element and the first copper electrode. The set temperature of the reflow furnace was 294 ° C., and the temperature of the solder joint was about 235 ° C.

  Separately, in the same procedure as described above, a second copper electrode was formed on a polyimide film as a second substrate (see FIG. 1C), and a laminate A in which a solder paste was applied on the second copper electrode was formed. . The second copper electrode straddles the semiconductor element on the first copper electrode of one of the first substrates and the semiconductor element on another first copper electrode when the first substrate and the second substrate are opposed to each other. The semiconductor elements are connected in series. The back surface of the polyimide film was reinforced with an aluminum plate having a thickness of 500 μm.

  The polyimide film on which the first solder bonding of the semiconductor element has been performed first is placed on a first jig made of a plate-like glass epoxy composite material (thermal conductivity: 0.4 W / m · K) having a thickness of 6 mm. did. On top of this, the laminate A was placed so that the upper end of the semiconductor element and the solder paste of the laminate A overlapped. Furthermore, the 2nd jig | tool which consists of a 2 mm-thick aluminum plate (thermal conductivity: 230 W / m * K) was mounted on the polyimide film of a 2nd board | substrate. An aluminum plate having a thickness of 500 μm is provided between the polyimide film on the first substrate and the first jig and between the polyimide film on the second substrate and the second jig for reinforcement and pressure equalization, respectively. Was inserted. This was put into a reflow furnace, and a second solder joint between the upper end of the semiconductor element and the second copper electrode was performed to manufacture a semiconductor device. The set temperature of the reflow furnace was 294 ° C., whereas the temperature of the first solder joint was about 205 ° C. and the temperature of the second solder joint was about 220 ° C.

<Example 2>
A semiconductor device was fabricated in the same manner as in Example 1 except that a zirconia plate having a thickness of 3 mm (thermal conductivity: 3 W / m · K) was used as the first jig during the second solder bonding.

<Comparative Example 1>
During the second solder bonding, a 2 mm thick aluminum plate (thermal conductivity: 230 W / m · K) is used as the first jig, and a 6 mm thick plate-shaped glass epoxy composite (as the second jig) A semiconductor device was fabricated in the same manner as in Example 1 except that thermal conductivity: 0.4 W / m · K) was used.

<Comparative example 2>
The semiconductor device is the same as in Example 1 except that a 2 mm thick aluminum plate (thermal conductivity: 230 W / m · K) is used as the first jig and the second jig during the second solder bonding. Was made.

<Evaluation>
The following evaluations were performed on the semiconductor devices manufactured in Examples and Comparative Examples.

(Position deviation evaluation)
It was visually confirmed whether or not the semiconductor element was misaligned. The case where it was determined that there was no or almost no displacement of the semiconductor element was evaluated as “◯”, and the case where it was in contact with an adjacent semiconductor element or separated from the electrode was evaluated as “x”. The results are shown in Table 1.

(Solder joint evaluation)
It was visually confirmed whether or not the solder bonding of the semiconductor element was appropriately performed. The case where the semiconductor element was bonded to the predetermined electrode was evaluated as “◯”, and the case where the semiconductor element was not bonded to the predetermined electrode was evaluated as “x”. The results are shown in Table 1.

(Conductivity evaluation)
A continuity test was performed as to whether or not the semiconductor device could function as an electric circuit. A lead wire is soldered to the electrode located at the upstream end and the electrode located at the downstream end of the semiconductor device as shown in FIG. ) ADVANTEST "R6552 DIGITAL MULTITIMER") was connected, and in the 4-terminal resistance mode, the presence or absence of conduction was confirmed based on the resistance value of the digital multimeter. When there is continuity, some numerical value (numerical value) is displayed on the liquid crystal display unit of the digital multimeter. On the other hand, when there is no continuity, “.OL” (overload) is displayed on the liquid crystal display unit of the digital multimeter. The case where continuity was confirmed was evaluated as “◯”, and the case where continuity was not confirmed was evaluated as “x”. The results are shown in Table 1.

(Evaluation of peak temperature and solder melting point excess time)
In Example 1 and Comparative Example 2, the temperature history from the time when the soldering is completed to the time when the soldering is completed for the first soldering joint and the second soldering joint is shown for each of the first solder joint and the second solder joint. Was measured over time. The peak temperature (° C.) at that time and the time during which the melting point of the solder was exceeded were determined. The results are shown in Table 2.

  As shown in Table 1, in Examples 1 and 2, there was no misalignment of the semiconductor elements, appropriate solder bonding was performed, and conductivity was good. On the other hand, in Comparative Examples 1 and 2, there was a misalignment of the semiconductor element, no solder bonding was performed at a predetermined position, and no conductivity was obtained. This is because the thermal conductivity of the first jig on the first substrate side is the same as or higher than the thermal conductivity of the second jig on the second substrate side. At this time, it is assumed that the first solder joint is heated and melted until the solder melting point is exceeded.

  From Table 2, in Example 1, the peak temperature on the second jig side made of an aluminum plate was about 220 ° C., whereas the peak temperature on the first jig side made of a plate-like glass epoxy composite material. Was about 205 ° C., and a temperature difference of about 15 ° C. occurred. Also, the solder melting point (217 ° C.) was exceeded on the second jig side and good solder bonding was obtained, whereas the soldering temperature was lower than the solder melting point on the first jig side. It can be seen that melting was suppressed. On the other hand, in Comparative Example 2, since the aluminum plate was used for both the first jig and the second jig, the solder melting point was exceeded on either side, and in particular, it was found that the melting of the first solder joint was induced. .

4, 4a, 4b Semiconductor element 10 Semiconductor device 11 First substrate 11a Opposing surface 11b of the first substrate 11b Opposite surface of the first substrate 12 Second substrate 12a Opposing surface of the second substrate 12b Surface opposite to the facing surface 21 First electrode 22 Second electrode 31 First solder joint 31 'Solder paste 32 Second solder joint 32' Solder paste J1 First jig J2 Second jig
W Weight

Claims (6)

A first substrate and a second substrate disposed opposite to each other;
A first electrode and a second electrode formed on the opposing surfaces of the first substrate and the second substrate, respectively, and a first solder on the first electrode side between the first electrode and the second electrode; A method of manufacturing a semiconductor device comprising a semiconductor element erected via a junction and a second solder junction on the second electrode side,
Forming the first electrode formed on the first substrate and one end of the semiconductor element on the second substrate after the step A by heating and joining the first element through the first solder joint. Step B of heat bonding the second electrode thus formed and the other end of the semiconductor element via the second solder joint portion.
Including
In the step B, a first jig is disposed on the surface of the first substrate opposite to the facing surface, and the second substrate is heated on the surface opposite to the facing surface from the first jig. A method for manufacturing a semiconductor device, wherein a second jig having high conductivity is disposed.   The method for manufacturing a semiconductor device according to claim 1, wherein the thermal conductivity of the second jig is 1.5 times or more of the thermal conductivity of the first jig.   The method for manufacturing a semiconductor device according to claim 1, wherein a difference between the thermal conductivity of the second jig and the thermal conductivity of the first jig is 50 W / m · K or more.   The thermal conductivity of the first jig is 0.1 to 5 W / m · k, and the thermal conductivity of the second jig is 60 W / m · K or more. The manufacturing method of the semiconductor device as described in any one of. A plurality of the first electrode and the second electrode are formed,
A plurality of the semiconductor elements are alternately installed between the plurality of first electrodes and the second electrode through the corresponding first solder joint portions and second solder joint portions, respectively.
The method for manufacturing a semiconductor device according to claim 1, wherein the plurality of semiconductor elements are electrically connected in series. The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor element is a thermoelectric conversion element.

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