JP6255187B2 - シリコン酸化膜をエッチングする方法 - Google Patents
シリコン酸化膜をエッチングする方法 Download PDFInfo
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- JP6255187B2 JP6255187B2 JP2013170218A JP2013170218A JP6255187B2 JP 6255187 B2 JP6255187 B2 JP 6255187B2 JP 2013170218 A JP2013170218 A JP 2013170218A JP 2013170218 A JP2013170218 A JP 2013170218A JP 6255187 B2 JP6255187 B2 JP 6255187B2
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- silicon oxide
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- 238000005530 etching Methods 0.000 title claims description 104
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 title claims description 83
- 229910052814 silicon oxide Inorganic materials 0.000 title claims description 82
- 238000000034 method Methods 0.000 title claims description 43
- 238000012545 processing Methods 0.000 claims description 65
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 11
- 229920005591 polysilicon Polymers 0.000 claims description 11
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 7
- 229910052721 tungsten Inorganic materials 0.000 claims description 7
- 239000010937 tungsten Substances 0.000 claims description 7
- 239000007789 gas Substances 0.000 description 67
- 239000000463 material Substances 0.000 description 15
- 230000007423 decrease Effects 0.000 description 6
- 239000010410 layer Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000004020 conductor Substances 0.000 description 5
- NBVXSUQYWXRMNV-UHFFFAOYSA-N fluoromethane Chemical compound FC NBVXSUQYWXRMNV-UHFFFAOYSA-N 0.000 description 5
- 150000002500 ions Chemical class 0.000 description 5
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 4
- 229910052799 carbon Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 239000012528 membrane Substances 0.000 description 4
- 230000001681 protective effect Effects 0.000 description 4
- 239000003507 refrigerant Substances 0.000 description 4
- 230000008021 deposition Effects 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910003481 amorphous carbon Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000014509 gene expression Effects 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000006227 byproduct Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 239000000498 cooling water Substances 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- RVTZCBVAJQQJTK-UHFFFAOYSA-N oxygen(2-);zirconium(4+) Chemical compound [O-2].[O-2].[Zr+4] RVTZCBVAJQQJTK-UHFFFAOYSA-N 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 229910001928 zirconium oxide Inorganic materials 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
- H01L21/31111—Etching inorganic layers by chemical means
- H01L21/31116—Etching inorganic layers by chemical means by dry-etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Drying Of Semiconductors (AREA)
- Plasma Technology (AREA)
- Plasma & Fusion (AREA)
Description
・エッチング時間tの経過後に第2の膜L2が残る場合(t≦D2/E2の場合)
Dr=D1+D2−E2×t …(1)
・エッチング時間tの経過後に第2の膜L2が残されない場合(t≧D2/E2の場合)
Dr=D1+(E1/E2)×D2−E1×t …(2)
・エッチング時間t1の経過後に第2の膜L2が残る場合(t1<D2/E2の場合)
D1+D2−E2×t1≧T1 …(3)
・エッチング時間t1の経過後に第2の膜L2が残されない場合(t1≧D2/E2の場合)
D1+(E1/E2)×D2−E1×t1≧T1 …(4)
Claims (3)
- シリコン酸化膜をエッチングする方法であって、
前記シリコン酸化膜及び該シリコン酸化膜上に設けられたマスクを有する被処理体を処理ガスのプラズマに晒して、該シリコン酸化膜をエッチングする工程を含み、
前記マスクは、前記シリコン酸化膜上に設けられた第1の膜、及び、該第1の膜上に設けられた第2の膜を含み、
前記第1の膜はポリシリコン膜であり、前記第2の膜はタングステン膜である、
方法。 - 前記シリコン酸化膜のエッチングに必要な時間をt1、前記シリコン酸化膜をエッチングする前記工程の終了時における前記マスクの残膜の所望の膜厚をT1、前記シリコン酸化膜をエッチングする前記工程の実行前の前記第1の膜の膜厚をD1、前記シリコン酸化膜をエッチングする前記工程の実行前の前記第2の膜の膜厚をD2、前記第1の膜のエッチングレートをE1、前記第2の膜のエッチングレートをE2とすると、
t1<D2/E2の場合に、D1+D2−E2×t1≧T1が満たされ、
t1≧D2/E2の場合に、D1+(E1/E2)×D2−E1×t1≧T1が満たされる、
請求項1に記載の方法。 - 前記第2の膜の膜厚は前記第1の膜の膜厚よりも小さい、請求項1又は2に記載の方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013170218A JP6255187B2 (ja) | 2013-08-20 | 2013-08-20 | シリコン酸化膜をエッチングする方法 |
KR1020140107884A KR102175860B1 (ko) | 2013-08-20 | 2014-08-19 | 실리콘 산화막을 에칭하는 방법 |
US14/462,658 US9257301B2 (en) | 2013-08-20 | 2014-08-19 | Method of etching silicon oxide film |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013170218A JP6255187B2 (ja) | 2013-08-20 | 2013-08-20 | シリコン酸化膜をエッチングする方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2015041624A JP2015041624A (ja) | 2015-03-02 |
JP2015041624A5 JP2015041624A5 (ja) | 2016-07-07 |
JP6255187B2 true JP6255187B2 (ja) | 2017-12-27 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2013170218A Expired - Fee Related JP6255187B2 (ja) | 2013-08-20 | 2013-08-20 | シリコン酸化膜をエッチングする方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US9257301B2 (ja) |
JP (1) | JP6255187B2 (ja) |
KR (1) | KR102175860B1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6449674B2 (ja) * | 2015-02-23 | 2019-01-09 | 東京エレクトロン株式会社 | プラズマ処理方法及びプラズマ処理装置 |
JP2016157793A (ja) * | 2015-02-24 | 2016-09-01 | 東京エレクトロン株式会社 | エッチング方法 |
KR20160116915A (ko) * | 2015-03-31 | 2016-10-10 | 삼성전자주식회사 | 반도체 소자 제조 방법 |
JP6604738B2 (ja) * | 2015-04-10 | 2019-11-13 | 東京エレクトロン株式会社 | プラズマエッチング方法、パターン形成方法及びクリーニング方法 |
US9865471B2 (en) * | 2015-04-30 | 2018-01-09 | Tokyo Electron Limited | Etching method and etching apparatus |
JP6494424B2 (ja) * | 2015-05-29 | 2019-04-03 | 東京エレクトロン株式会社 | エッチング方法 |
KR102623767B1 (ko) * | 2017-09-01 | 2024-01-10 | 도쿄엘렉트론가부시키가이샤 | 에칭 방법 |
JP7190940B2 (ja) | 2019-03-01 | 2022-12-16 | 東京エレクトロン株式会社 | 基板処理方法及び基板処理装置 |
JP7402715B2 (ja) * | 2020-03-06 | 2023-12-21 | 東京エレクトロン株式会社 | ウエハを処理する方法 |
KR20220005994A (ko) | 2020-07-07 | 2022-01-14 | 도쿄엘렉트론가부시키가이샤 | 엣지 링 및 에칭 장치 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
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US5240554A (en) * | 1991-01-22 | 1993-08-31 | Kabushiki Kaisha Toshiba | Method of manufacturing semiconductor device |
US5314576A (en) * | 1992-06-09 | 1994-05-24 | Sony Corporation | Dry etching method using (SN)x protective layer |
JPH06237136A (ja) * | 1993-02-09 | 1994-08-23 | Murata Mfg Co Ltd | 電子部品素子の製造方法 |
JP2984539B2 (ja) * | 1994-04-19 | 1999-11-29 | 日本電気株式会社 | 酸化シリコン膜のドライエッチング方法 |
JP3524763B2 (ja) * | 1998-05-12 | 2004-05-10 | 株式会社日立製作所 | エッチング方法 |
JP3742243B2 (ja) * | 1999-03-16 | 2006-02-01 | 株式会社東芝 | ドライエッチング方法および半導体装置の製造方法 |
JP2001015479A (ja) * | 1999-06-29 | 2001-01-19 | Toshiba Corp | 半導体装置の製造方法 |
TWI276153B (en) * | 2001-11-12 | 2007-03-11 | Hynix Semiconductor Inc | Method for fabricating semiconductor device |
US7977390B2 (en) | 2002-10-11 | 2011-07-12 | Lam Research Corporation | Method for plasma etching performance enhancement |
TWI250558B (en) * | 2003-10-23 | 2006-03-01 | Hynix Semiconductor Inc | Method for fabricating semiconductor device with fine patterns |
KR100704470B1 (ko) * | 2004-07-29 | 2007-04-10 | 주식회사 하이닉스반도체 | 비결정성 탄소막을 희생 하드마스크로 이용하는반도체소자 제조 방법 |
KR100699865B1 (ko) * | 2005-09-28 | 2007-03-28 | 삼성전자주식회사 | 화학기계적 연마를 이용한 자기 정렬 콘택 패드 형성 방법 |
JP5461759B2 (ja) | 2006-03-22 | 2014-04-02 | 東京エレクトロン株式会社 | プラズマ処理装置、プラズマ処理方法及び記憶媒体 |
JP2009267432A (ja) * | 2009-06-29 | 2009-11-12 | Elpida Memory Inc | 半導体集積回路装置の製造方法 |
JP5568340B2 (ja) * | 2010-03-12 | 2014-08-06 | 東京エレクトロン株式会社 | プラズマエッチング方法及びプラズマエッチング装置 |
-
2013
- 2013-08-20 JP JP2013170218A patent/JP6255187B2/ja not_active Expired - Fee Related
-
2014
- 2014-08-19 US US14/462,658 patent/US9257301B2/en not_active Expired - Fee Related
- 2014-08-19 KR KR1020140107884A patent/KR102175860B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
US20150056808A1 (en) | 2015-02-26 |
KR102175860B1 (ko) | 2020-11-06 |
KR20150021475A (ko) | 2015-03-02 |
US9257301B2 (en) | 2016-02-09 |
JP2015041624A (ja) | 2015-03-02 |
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