JP6107922B2 - Semiconductor device - Google Patents

Description

  The present invention relates to a semiconductor device.

  A nitride semiconductor such as GaN, AlN, InN, or a mixed crystal material thereof has a wide band gap, and is used as a high-power electronic device or a short-wavelength light-emitting device. For example, GaN, which is a nitride semiconductor, has a band gap of 3.4 eV, which is larger than the Si band gap of 1.1 eV and the GaAs band gap of 1.4 eV.

  As such a high-power electronic device, there is a field effect transistor (FET), in particular, a high electron mobility transistor (HEMT). HEMTs using such nitride semiconductors are used in high power / high efficiency amplifiers, high power switching devices, and the like. Specifically, in a HEMT using AlGaN as an electron supply layer and GaN as an electron transit layer, piezoelectric polarization or the like occurs in AlGaN due to strain due to a difference in lattice constant between AlGaN and GaN, and a high concentration of 2DEG (Two-Dimensional Electron). Gas: two-dimensional electron gas) is generated. For this reason, the operation | movement in a high voltage is possible and it can use for the high voltage | pressure-resistant electric power device in a highly efficient switching element, an electric vehicle use, etc.

  Such 2DEG usually exists in a region directly under the gate even when no voltage is applied to the gate electrode or the like, so that the device to be manufactured is normally on. Therefore, in order to achieve normally-off, there is a method in which a part of the nitride semiconductor layer in the region where the gate electrode is formed is removed by etching, and the distance between the channel and the gate electrode is reduced to form a gate recess structure. Is commonly used.

In addition, a gate insulating film may be formed between the gate electrode and the nitride semiconductor layer from the viewpoint of improving device characteristics. As such a gate insulating film, aluminum oxide (Al ₂ O ₃ ) formed by an ALD (Atomic Layer Deposition) method has a high withstand voltage of 10 to 30 MV / cm, and is considered a particularly promising material. ing.

JP 2002-359256 A

  By the way, in the aluminum oxide film formed by the ALD method, impurities due to the source gas are likely to remain. Specifically, in an aluminum oxide film formed by the ALD method, a hydroxyl group (OH group) tends to remain in the state of aluminum hydroxide (Al (OH) x), and this OH group acts as an electron trap. . This causes a threshold fluctuation in the gate voltage and hinders normally-off.

  In addition, the aluminum oxide film is formed on a nitride semiconductor layer such as GaN, but GaOx may be formed at the interface between GaN and the aluminum oxide film. Acts as an electron trap. Therefore, it causes a threshold fluctuation in the gate voltage, and similarly prevents normally-off.

  Note that when the gate insulating film is formed on the gate recess, step coverage may be a problem, but the aluminum oxide film formed by the ALD method has excellent step coverage. And good step coverage can be obtained.

  Therefore, there is a need for a semiconductor device manufacturing method and a semiconductor device that can reduce threshold voltage variation in gate voltage, have high uniformity, and have a high yield in a semiconductor device using a nitride semiconductor.

According to one aspect of the present embodiment, a step of forming a nitride semiconductor layer on a substrate, and an ALD method by steam oxidation using a source gas containing H ₂ O on the nitride semiconductor layer A step of forming a first insulating film by the ALD method, and an ALD method using an oxygen plasma oxidation using a source gas containing O ₂ or an ALD using an oxidation using a source gas containing O ₃ on the first insulating film. Forming a second insulating film by a method, forming a gate electrode on the second insulating film, forming a source electrode and a drain electrode on the nitride semiconductor layer, and The nitride semiconductor layer includes a first semiconductor layer formed on a substrate and a second semiconductor layer formed on the first semiconductor layer. And

According to another aspect of the present embodiment, a nitride semiconductor layer including a first semiconductor layer provided on a substrate and a second semiconductor layer provided on the first semiconductor layer. A first insulating film provided on the nitride semiconductor layer, a second insulating film provided on the first insulating film and having a density higher than that of the first insulating film, 2 and the gate electrode provided on the insulating film, have a, a source electrode and a drain electrode provided on the nitride semiconductor layer, the second insulating film and the first insulating film are both oxide and wherein the aluminum der Rukoto.

According to another aspect of the present embodiment, a nitride semiconductor layer including a first semiconductor layer provided on a substrate and a second semiconductor layer provided on the first semiconductor layer. A first insulating film provided on the nitride semiconductor layer, a second insulating film provided on the first insulating film, and a gate electrode provided on the second insulating film, A source electrode and a drain electrode provided on the nitride semiconductor layer, and in the vicinity of the interface between the nitride semiconductor layer and the first insulating film in the nitride semiconductor layer, the nitride semiconductor ratio of oxygen atoms to metal atoms contained in the layer, I der 0.4, the first insulating film and the second insulating film are both characterized by aluminum oxide der Rukoto.

  According to the disclosed semiconductor device manufacturing method and semiconductor device, in a semiconductor device using a nitride semiconductor, threshold voltage variation in the gate voltage can be reduced, so that uniformity is high and yield is improved. it can.

Explanatory drawing of the semiconductor device of the structure where the recess is not formed Explanatory drawing of O / Ga ratio in the GaN surface of the semiconductor device of the structure where the recess is not formed Explanatory drawing of threshold fluctuation of a semiconductor device having a structure in which no recess is formed Explanatory drawing of the density of the insulating film in a semiconductor device having a structure in which no recess is formed Explanatory drawing of the breakdown voltage of a semiconductor device having a structure in which no recess is formed Explanatory diagram of aluminum hydroxide concentration and threshold fluctuation when heat treatment is performed Structure diagram of the semiconductor device in the first embodiment Process drawing (1) of the manufacturing method of the semiconductor device in 1st Embodiment Process drawing (2) of the manufacturing method of the semiconductor device in the first embodiment Explanatory drawing of O / Ga ratio in the GaN surface of the semiconductor device in 1st Embodiment Explanatory drawing of the threshold value fluctuation | variation of the semiconductor device in 1st Embodiment Explanatory drawing of the density of the insulating film in the semiconductor device in the first embodiment Explanatory drawing of the breakdown voltage of the semiconductor device in the first embodiment Explanatory drawing of the semiconductor device of the structure where the recess is formed Explanatory drawing of O / (Al + Ga) ratio in the AlGaN or GaN surface of the semiconductor device of the structure where the recess is formed Explanatory drawing of threshold fluctuation of a semiconductor device having a structure in which a recess is formed Explanatory drawing of the density of the insulating film in the semiconductor device having the structure in which the recess is formed Explanatory drawing of the breakdown voltage of a semiconductor device with a recess structure Structure diagram of semiconductor device according to second embodiment Process drawing (1) of the manufacturing method of the semiconductor device in 2nd Embodiment Process drawing (2) of the manufacturing method of the semiconductor device in 2nd Embodiment Process drawing of the manufacturing method of the semiconductor device in 2nd Embodiment (3) Explanatory drawing of O / (Al + Ga) ratio in the AlGaN or GaN surface of the semiconductor device in 2nd Embodiment Explanatory drawing of threshold value fluctuation | variation of the semiconductor device in 2nd Embodiment Explanatory drawing of the density of the insulating film in the semiconductor device in 2nd Embodiment Explanatory drawing of the breakdown voltage of the semiconductor device in the second embodiment Explanatory drawing of the semiconductor device in 3rd Embodiment Circuit diagram of the PFC circuit in the third embodiment Circuit diagram of power supply device according to third embodiment Structure diagram of high-power amplifier according to third embodiment

  Modes for carrying out the invention will be described below. In addition, about the same member etc., the same code | symbol is attached | subjected and description is abbreviate | omitted.

[First Embodiment]
(Characteristics of aluminum oxide film formed by ALD method)
There are two methods for forming an aluminum oxide (Al ₂ O ₃ ) film by the ALD method. One is a steam oxidation system in which trimethylaluminum (Al (CH ₃ ) ₃ ) and H ₂ O are used as source gases, and the other is Al (CH ₃ ) ₃ and O as source gases. ₂ is an oxygen plasma oxidation method for forming a film using In the ALD method, the water vapor oxidation method forms a film without generating plasma, but the oxygen plasma oxidation method forms a film by generating plasma with oxygen or ozone.

  Here, as shown in FIG. 1, a semiconductor device using an aluminum oxide film formed by a water vapor oxidation method on a gate insulating film and a semiconductor device using an aluminum oxide film formed by an oxygen plasma oxidation method are manufactured. did.

  The semiconductor device shown in FIG. 1A is a HEMT having a structure in which an aluminum oxide film 931 formed by an oxygen plasma oxidation method is used as a gate insulating film. Specifically, an electron transit layer 921 formed of GaN, an electron supply layer 922 formed of AlGaN, and a cap layer 923 formed of GaN are stacked on the substrate 910 as nitride semiconductor layers. Yes. Thus, 2DEG 921a is formed in the electron transit layer 921 in the vicinity of the interface between the electron transit layer 921 and the electron supply layer 922. Further, an aluminum oxide film 931 formed by an oxygen plasma oxidation method is formed on the cap layer 923 as a gate insulating film, and a gate electrode 941 is formed on the aluminum oxide film 931. ing. Note that a source electrode 942 and a drain electrode 943 are formed on the electron supply layer 922.

  The semiconductor device illustrated in FIG. 1B is a HEMT having a structure in which an aluminum oxide film 932 formed by a steam oxidation method is used as a gate insulating film. Specifically, an electron transit layer 921 formed of GaN, an electron supply layer 922 formed of AlGaN, and a cap layer 923 formed of GaN are stacked on the substrate 910 as nitride semiconductor layers. Yes. Thus, 2DEG 921a is formed in the electron transit layer 921 in the vicinity of the interface between the electron transit layer 921 and the electron supply layer 922. Further, an aluminum oxide film 932 formed by a steam oxidation method is formed on the cap layer 923 as a gate insulating film, and a gate electrode 941 is formed on the aluminum oxide film 932. . Note that a source electrode 942 and a drain electrode 943 are formed on the electron supply layer 922.

  Next, FIGS. 2 to 5 show various characteristics in the HEMT having the structure shown in FIG. 1A and the HEMT having the structure shown in FIG. A HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in FIG. 1A is shown in 1A, and the aluminum oxide formed by the water vapor oxidation method shown in FIG. A HEMT using the film 932 is shown in 1B.

  FIG. 2 shows the O / Ga ratio on the surface of GaN serving as the cap layer 923. In the case of HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, the O / Ga ratio was about 0.78. On the other hand, in the case of HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, the O / Ga ratio was about 0.34. Thus, the O / Ga ratio on the surface of GaN was formed by the steam oxidation method shown in 1B rather than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A. The HEMT using the aluminum oxide film 932 is lower.

  FIG. 3 shows threshold fluctuations in the gate electrode 941. In the case of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, the threshold fluctuation was about 1.9V. On the other hand, in the case of HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, the threshold fluctuation was about 0.25V. As described above, the threshold fluctuation in the gate electrode 941 is higher than that of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, and is formed by the water vapor oxidation method shown in 1B. The HEMT using the film 932 is lower.

FIG. 4 shows the density in the gate insulating film. In the case of the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, the density was about 3.3 g / cm ³ . On the other hand, in the case of the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, the density was about 2.9 g / cm ³ . Thus, the film density in the gate insulating film is higher in the aluminum oxide film 932 formed by the water vapor oxidation method shown in 1B than in the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A. Is low.

  FIG. 5 shows the breakdown voltage between the drain and the source. In the case of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, the breakdown voltage was about 420V. On the other hand, in the case of the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, the breakdown voltage was about 120V. Thus, the breakdown voltage between the drain and the source is higher than that of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, and is formed by the water vapor oxidation method shown in 1B. The HEMT using the film 932 is lower.

  As described above, as the gate insulating film, from the viewpoint of the O / Ga ratio on the surface of GaN and the threshold fluctuation in the gate electrode 941, the aluminum oxide shown in 1B is more preferable than that using the aluminum oxide film 931 shown in 1A. Those using the film 932 are more preferable. On the other hand, from the viewpoint of the density in the gate insulating film and the breakdown voltage between the drain and the source, the one using the aluminum oxide film 931 shown in 1A is preferable to the one using the aluminum oxide film 932 shown in 1B.

That is, the gate insulating film is preferably an aluminum oxide film 932 formed by a steam oxidation method from the viewpoint of O / Ga ratio and threshold fluctuation on the surface of GaN, and an oxygen plasma oxidation method from the viewpoint of film density and breakdown voltage. The aluminum oxide film 931 formed by the above is preferable. The film obtained by method of forming a film by oxidizing by using the Al _{(CH 3) 3} and _{O 3} as the raw material gas is formed by using the Al _{(CH 3) 3} and _{O 2} as a source gas A film equivalent to the film obtained by the oxygen plasma oxidation method can be obtained. Therefore, instead of using the ALD method based on the oxygen plasma oxidation method using Al (CH ₃ ) ₃ and O ₂ as source gases, oxidation is performed using Al (CH ₃ ) ₃ and O ₃ as source gases. Alternatively, the film may be formed by an ALD method using a film forming method.

(Concentration of aluminum hydroxide in aluminum oxide)
Next, the concentration of aluminum hydroxide in aluminum oxide formed by the ALD method will be described. Aluminum hydroxide (Al (OH) x) remains in the aluminum oxide film formed by the steam oxidation method and the oxygen plasma oxidation method immediately after the film formation. However, annealing after film formation (Post Deposition Anneal: PDA) can reduce the residual concentration of aluminum hydroxide, specifically, the residual concentration of aluminum hydroxide can be reduced to 2% or less. Is obtained as knowledge.

  FIG. 6 shows the relationship between the aluminum hydroxide concentration in aluminum oxide and the threshold fluctuation when aluminum oxide is deposited by ALD and then annealed. In FIG. 6, an aluminum oxide film formed by the oxygen plasma oxidation method is shown in 6A, and an aluminum oxide film formed by the water vapor oxidation method is shown in 6B.

  Immediately after film formation, the aluminum oxide film formed by the oxygen plasma oxidation method shown in 6A has a residual concentration of aluminum hydroxide rather than the aluminum oxide film formed by the water vapor oxidation method shown in 6B. Is slightly lower, but the threshold fluctuation is slightly larger.

  By performing the post-deposition annealing, the aluminum oxide film formed by the oxygen plasma oxidation method shown in 6A has a small residual value of aluminum hydroxide and a threshold fluctuation value. Specifically, when the annealing temperature is 700 ° C., the residual concentration of aluminum hydroxide is about 3.0%, the threshold fluctuation is about 2.6 V, and when the annealing temperature is 800 ° C., the residual concentration of aluminum hydroxide is about 1.3% and the threshold fluctuation is about 2.2V.

  Similarly, by performing annealing after film formation, the aluminum oxide film formed by the water vapor oxidation method shown in 6B has a small value of residual concentration of aluminum hydroxide and a value of threshold fluctuation. Specifically, when the annealing temperature is 700 ° C., the residual concentration of aluminum hydroxide is about 3.5%, the threshold fluctuation is about 1.5 V, and when the annealing temperature is 800 ° C., the residual concentration of aluminum hydroxide is about 1.5% and the threshold fluctuation is about 0.4V.

  Thus, by performing the annealing, the aluminum oxide film formed by the water vapor oxidation method shown in 6B has a threshold variation more than the aluminum oxide film formed by the oxygen plasma oxidation method shown in 6A. It can be made even lower. Note that, based on FIG. 6, the annealing temperature is preferably 700 ° C. or more and 800 ° C. or less where the threshold fluctuation is 2 V or less in the aluminum oxide film formed by the steam oxidation method. In this case, the residual concentration of aluminum hydroxide is 4% or less. Further, at this annealing temperature, in the aluminum oxide film formed by the oxygen plasma oxidation method, the threshold fluctuation is 3 V or less, and the residual concentration of aluminum hydroxide is 4% or less. Note that annealing at a temperature exceeding 800 ° C. is not preferable because it affects the nitride semiconductor layer and the like.

(Semiconductor device)
Next, the HEMT that is the semiconductor device according to the first embodiment will be described with reference to FIG. The HEMT, which is a semiconductor device in the present embodiment, includes an electron transit layer 21 formed of GaN, an electron supply layer 22 formed of AlGaN, and a cap formed of GaN as a nitride semiconductor layer on a substrate 10. The layer 23 is laminated. As a result, 2DEG 21 a is formed in the electron transit layer 21 in the vicinity of the interface between the electron transit layer 21 and the electron supply layer 22. In the present embodiment, the electron transit layer 21 may be referred to as a first semiconductor layer, the electron supply layer 22 may be referred to as a second semiconductor layer, and the cap layer 23 may be referred to as a third semiconductor layer.

  In the present embodiment, an insulating film 30 serving as a gate insulating film is formed on the cap layer 23. The insulating film 30 is formed of an aluminum oxide film, and is laminated in the order of the first insulating film 31 and the second insulating film 32 from the side on which the cap layer 23 is formed. . The first insulating film 31 is formed of an aluminum oxide film formed by a steam oxidation method, and the second insulating film 32 is formed of an aluminum oxide film formed by an oxygen plasma oxidation method. . A gate electrode 41 is formed on the insulating film 30, and a source electrode 42 and a drain electrode 43 are formed on the electron supply layer 22. 7 shows a structure in which the insulating film 30 is formed on the cap layer 23, the semiconductor device in the present embodiment is one in which the cap layer 23 is not formed. A structure in which an insulating film 30 is formed on the electron supply layer 22 may be used.

  In addition to the HEMT using AlGaN and GaN, the semiconductor device in this embodiment can also be applied to a semiconductor device using a nitride semiconductor material using a material such as InAlN or InGaAlN.

(Method for manufacturing semiconductor device)
Next, a method for manufacturing a semiconductor device in the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 8 (a), a nitride semiconductor layer composed of a buffer layer, an electron transit layer 21, an electron supply layer 22, a cap layer 23, etc. (not shown) is formed on the substrate 10 by metal organic vapor phase epitaxy. It is formed by (MOVPE: Metal-Organic Vapor Phase Epitaxy) method. These nitride semiconductor layers are formed by epitaxial growth by MOVPE, but may be formed by a method other than MOVPE, for example, a molecular beam epitaxy (MBE) method. A silicon substrate is used as the substrate 10, and a buffer layer (not shown) is made of AlN having a thickness of 0.1 μm. The electron transit layer 21 is made of i-Gan having a thickness of 3 μm, the electron supply layer 22 is made of n-AlGaN having a thickness of 30 nm, and the cap layer 23 has a thickness of 5 nm. It is made of n-GaN. Thereby, in the electron transit layer 21, 2DEG 21 a is formed in the vicinity of the interface between the electron transit layer 21 and the electron supply layer 22.

In this embodiment, when forming AlN, GaN, and AlGaN by MOVPE, as source gases, trimethylaluminum (TMA) as an Al source, trimethylgallium (TMG) as a Ga source, and ammonia as an N source A gas such as (NH ₃ ) is used. The AlN, GaN, and AlGaN layers, which are nitride semiconductor layers, can be formed by supplying the above-described source gas mixed at a predetermined ratio according to the composition of the nitride semiconductor layer to be formed. . In the semiconductor device in this embodiment, when the nitride semiconductor layer is formed by MOVPE, the flow rate of ammonia gas is 100 ccm to 10 LM, and the pressure inside the device during film formation is 50 Torr to 300 Torr. The temperature is 1000 ° C to 1200 ° C.

The n-AlGaN serving as the electron supply layer 22 is doped with Si as an n-type impurity element. Specifically, when the electron supply layer 22 is formed, Si can be doped into the electron supply layer 22 by adding SiH ₄ gas to the source gas at a predetermined flow rate. The concentration of Si doped in the n-AlGaN formed in this way is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , for example, about 5 × 10 ¹⁸ cm ⁻³ .

The n-GaN serving as the cap layer 23 is doped with Si as an n-type impurity element. Specifically, Si can be doped into the cap layer 23 by adding SiH ₄ gas to the source gas at a predetermined flow rate when forming the cap layer 23. The concentration of Si doped in the n-GaN thus formed is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , for example, about 5 × 10 ¹⁸ cm ⁻³ .

Next, as shown in FIG. 8B, an insulating film 30 to be a gate insulating film is formed. Specifically, the altered layer formed on the surface of the cap layer 23 is washed with sulfuric acid / hydrogen peroxide and hydrofluoric acid, and then washed with water. Thereafter, an ALD method is used to form an aluminum oxide film on the cap layer 23 by a steam oxidation method using Al (CH ₃ ) ₃ and H ₂ O as source gases, whereby the first insulating film 31 is formed. The thickness of the first insulating film 31 formed at this time is 5 to 10 nm. In the present embodiment, the first insulating film 31 having a thickness of 5 nm is formed. Next, an aluminum oxide film is formed on the first insulating film 31 by an oxygen plasma oxidation method using Al (CH ₃ ) ₃ and O ₂ as source gases, whereby the second insulating film 32 is formed. Form. The thickness of the second insulating film 32 formed at this time is 10 to 100 nm. In the present embodiment, the second insulating film 32 having a thickness of 35 nm is formed. As a result, the insulating film 30 is formed by the first insulating film 31 and the second insulating film 32. Thereafter, annealing is performed at a temperature of 700 ° C. to 800 ° C.

Next, as shown in FIG. 9A, the source electrode 42 and the drain electrode 43 are formed. Specifically, a resist pattern (not shown) having openings in regions where the source electrode 42 and the drain electrode 43 are formed by applying a photoresist on the insulating film 30 and performing exposure and development by an exposure apparatus. Form. Thereafter, a part or all of the insulating film 30, the cap layer 23, and the electron supply layer 22 in a region where the resist pattern is not formed is removed by dry etching such as RIE using a fluorine-based gas, a chlorine-based gas, or the like. . The conditions for dry etching in the nitride semiconductor performed at this time are, for example, a flow rate of chlorine (Cl ₂ ) gas of about 30 sccm, a pressure in the chamber of about 2 Pa, and an RF input power of 20 W. Thereafter, after removing a resist pattern (not shown), a photoresist is applied again, and exposure and development are performed by an exposure apparatus, whereby an opening is provided in a region where the source electrode 42 and the drain electrode 43 are formed. The resist pattern is formed. Then, after depositing Ta / Al, which is a laminated metal film, by vacuum deposition, the laminated metal film formed on the resist pattern is removed together with the resist pattern by lift-off by being immersed in an organic solvent or the like. Thereby, the source electrode 42 and the drain electrode 43 are formed by the remaining laminated metal film. Thereafter, an annealing process is performed at about 550 ° C. to make ohmic contact between the source electrode 42 and the drain electrode 43.

  Next, as shown in FIG. 9B, the gate electrode 41 is formed. Specifically, a lower layer resist (for example, product name PMGI: manufactured by US Microchem) and an upper layer resist (for example, product name PFI32-A8: manufactured by Sumitomo Chemical Co., Ltd.) are respectively spin-coated on the insulating film 30. Apply by. Thereafter, by performing exposure and development with an exposure apparatus, an opening having a diameter of, for example, about 0.8 μm is formed in the upper resist. Thereafter, using the upper layer resist as a mask, the lower layer resist exposed in the opening of the upper layer resist is removed by wet etching with an alkali developer. Next, after depositing Ni / Au (Ni: film thickness of about 10 nm / Au: film thickness of about 300 nm) as a laminated metal film by vacuum deposition, it is immersed in an organic solvent, etc. The laminated metal film formed in (1) is removed together with the resist pattern by lift-off. Thereby, the gate electrode 41 is formed by the remaining laminated metal film.

(Characteristics of the semiconductor device in this embodiment)
10 to 13 show various characteristics in the HEMT having the structure shown in FIG. 1A, the HEMT having the structure shown in FIG. 1B, and the HEMT that is the semiconductor device in the present embodiment. In FIGS. 10 to 13, a HEMT which is a semiconductor device in the present embodiment is indicated by 7 </ b> A. As described above, a HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in FIG. 1A is shown in 1A, and formed by the water vapor oxidation method shown in FIG. 1B. A HEMT using the formed aluminum oxide film 932 is shown in 1B.

  FIG. 10 shows the O / Ga ratio on the surface of GaN serving as a cap layer. In the case of HEMT which is a semiconductor device in the present embodiment shown in 7A, the ratio of O / Ga was about 0.34. This value is lower than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, and the HEMT using the aluminum oxide film 932 formed by the water vapor oxidation method shown in 1B. It is about the same.

  FIG. 11 shows threshold fluctuations in the gate electrode. In the case of the HEMT, which is a semiconductor device in the present embodiment shown in 7A, the threshold fluctuation was about 0.2V. This value is lower than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A, and further uses the aluminum oxide film 932 formed by the water vapor oxidation method shown in 1B. Lower than the HEMT we had.

FIG. 12 shows the density in the insulating film to be the gate insulating film. In the case of HEMT, which is the semiconductor device in the present embodiment shown in 7A, the density was about 3.3 g / cm ³ . This value is higher than the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, and the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A. It is about the same.

  FIG. 13 shows the breakdown voltage between the drain and the source. In the case of HEMT which is a semiconductor device in the present embodiment shown in 7A, the breakdown voltage was about 410V. This value is higher than the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 1B, and the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 1A. It is about the same.

  As described above, the HEMT that is the semiconductor device in this embodiment has the advantages of the HEMT using the aluminum oxide film formed by the oxygen plasma oxidation method and the HEMT using the aluminum oxide film formed by the steam oxidation method. Combines both of the advantages of

  That is, the HEMT in the semiconductor device in the present embodiment uses an aluminum oxide film formed by the water vapor oxidation method shown in 1B in terms of the O / Ga ratio on the GaN surface and the threshold fluctuation in the gate electrode. It has the same or better characteristics than those. Further, in terms of the density in the insulating film and the breakdown voltage between the drain and the source, it has characteristics comparable to those using the aluminum oxide film formed by the oxygen plasma oxidation method shown in 1A.

[Second Embodiment]
Next, a second embodiment will be described. This embodiment is a semiconductor device having a gate recess structure.

(Characteristics of aluminum oxide film formed by ALD method)
First, a semiconductor device having a structure in which a gate recess having a structure different from that described in the first embodiment was formed. Specifically, as shown in FIG. 14, a semiconductor device in which a gate recess is formed using an aluminum oxide film formed by a steam oxidation method on a gate insulating film, and an aluminum oxide film formed by an oxygen plasma oxidation method are used. A semiconductor device using the film was manufactured.

  The semiconductor device shown in FIG. 14A is a HEMT having a structure using an aluminum oxide film 931 formed by an oxygen plasma oxidation method. Specifically, an electron transit layer 921 formed of GaN, an electron supply layer 922 formed of AlGaN, and a cap layer 923 formed of GaN are stacked on the substrate 910 as nitride semiconductor layers. Yes. Thus, 2DEG 921a is formed in the electron transit layer 921 in the vicinity of the interface between the electron transit layer 921 and the electron supply layer 922. Thereafter, part of the nitride semiconductor layer, for example, part of the cap layer 923 and part of the electron supply layer 922 is removed by etching or the like to form the gate recess 950. On the gate recess 950 and the cap layer 923 formed in this manner, an aluminum oxide film 931 formed by an oxygen plasma oxidation method is formed as a gate insulating film. On the aluminum oxide film 931, an aluminum oxide film 931 is formed. A gate electrode 941 is formed. Note that a source electrode 942 and a drain electrode 943 are formed on the electron supply layer 922.

  The semiconductor device illustrated in FIG. 14B is a HEMT having a structure using an aluminum oxide film 932 in which a gate insulating film is formed by a steam oxidation method. Specifically, an electron transit layer 921 formed of GaN, an electron supply layer 922 formed of AlGaN, and a cap layer 923 formed of GaN are stacked on the substrate 910 as nitride semiconductor layers. Yes. Thus, 2DEG 921a is formed in the electron transit layer 921 in the vicinity of the interface between the electron transit layer 921 and the electron supply layer 922. Thereafter, part of the nitride semiconductor layer, for example, part of the cap layer 923 and part of the electron supply layer 922 is removed by etching or the like to form the gate recess 950. On the gate recess 950 and the cap layer 923 thus formed, an aluminum oxide film 932 formed by a steam oxidation method is formed as a gate insulating film. On the aluminum oxide film 932, a gate is formed. An electrode 941 is formed. A source electrode 942 and a drain electrode 943 are formed on the electron supply layer 922.

  15 to 18 show various characteristics in the HEMT having the structure shown in FIG. 14A and the HEMT having the structure shown in FIG. 14A shows a HEMT using an aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in FIG. 14A, and aluminum oxide formed by the steam oxidation method shown in FIG. 14B. A HEMT using the film 932 is shown in 14B.

  FIG. 15 shows the O / (Al + Ga) ratio on the surface of AlGaN and GaN that will be the electron supply layer 922 and the cap layer 923. In the case of HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, the ratio of O / (Al + Ga) is about 0.78. On the other hand, in the case of HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, the ratio of O / (Al + Ga) is about 0.38. That is, the ratio of O / (Al + Ga) on the surface of GaN is formed by the steam oxidation method shown in 14B, rather than the one using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A. The one using the aluminum oxide film 932 is lower.

  FIG. 16 shows threshold fluctuation in the gate electrode 941. In the case of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, the threshold fluctuation is about 2V. On the other hand, in the case of the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, the threshold fluctuation is about 0.3V. That is, the threshold fluctuation in the gate electrode 941 is caused by the aluminum oxide film 932 formed by the steam oxidation method shown in 14B rather than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown by 14A. The HEMT using the is lower.

FIG. 17 shows the density in the gate insulating film. In the case of the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, the density is about 3.3 g / cm ³ . On the other hand, in the case of the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, the density is about 2.9 g / cm ³ . Thus, the film density in the gate insulating film is higher in the aluminum oxide film 932 formed by the steam oxidation method shown in 14B than in the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A. Is low.

  FIG. 18 shows the breakdown voltage between the drain and the source. In the case of the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, the breakdown voltage is about 410V. On the other hand, in the case of the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, the breakdown voltage is about 110V. That is, the breakdown voltage between the drain and the source is higher than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, and the aluminum oxide film 932 formed by the steam oxidation method shown in 14B. The HEMT using the is lower.

  From the above, as the gate insulating film, from the viewpoint of the O / (Al + Ga) ratio on the surface and the threshold fluctuation in the gate electrode, the aluminum oxide shown in 14B is better than that using the aluminum oxide film 931 shown in 14A. Those using the film 932 are more preferable. On the other hand, from the viewpoint of the density in the gate insulating film and the breakdown voltage between the drain and the source, the one using the aluminum oxide film 931 shown in 14A is more preferable than the one using the aluminum oxide film 932 shown in 14B.

  That is, the gate insulating film is preferably an aluminum oxide film 932 formed by a steam oxidation method from the viewpoint of the O / (Al + Ga) ratio on the surface and the threshold fluctuation. From the viewpoint of film density and breakdown voltage, an aluminum oxide film 931 formed by an oxygen plasma oxidation method is preferable.

  As described above, the HEMT in which the gate recess is formed has the same tendency as the HEMT in which the gate recess is not formed, although there is a slight difference.

(Semiconductor device)
Next, a HEMT that is a semiconductor device according to the second embodiment will be described with reference to FIG. The HEMT, which is a semiconductor device in the present embodiment, includes an electron transit layer 21 formed of GaN, an electron supply layer 22 formed of AlGaN, and a cap formed of GaN as a nitride semiconductor layer on a substrate 10. The layer 23 is laminated. As a result, 2DEG 21 a is formed in the electron transit layer 21 in the vicinity of the interface between the electron transit layer 21 and the electron supply layer 22. In the present embodiment, the electron transit layer 21 may be referred to as a first semiconductor layer, the electron supply layer 22 may be referred to as a second semiconductor layer, and the cap layer 23 may be referred to as a third semiconductor layer.

  In the present embodiment, the gate recess 150 is formed by removing a part of the nitride semiconductor layer, for example, a part of the cap layer 23 and the electron supply layer 22 by etching or the like. By forming the gate recess 150 in this way, the 2DEG 21a can be eliminated immediately below the region where the gate recess 150 is formed. An insulating film 30 serving as a gate insulating film is formed on the exposed electron supply layer 22 and cap layer 23. The insulating film 30 is formed of an aluminum oxide film, and is formed by laminating a first insulating film 31 and a second insulating film 32 in this order from the side on which the electron supply layer 22 and the cap layer 23 are formed. is there. The first insulating film 31 is formed of an aluminum oxide film formed by a steam oxidation method, and the second insulating film 32 is formed of an aluminum oxide film formed by an oxygen plasma oxidation method. . A gate electrode 41 is formed on the insulating film 30, and a source electrode 42 and a drain electrode 43 are formed on the electron supply layer 22. FIG. 19 shows a structure in which the insulating film 30 is formed on the cap layer 23, but the semiconductor device in the present embodiment does not have the cap layer 23, A structure in which an insulating film 30 is formed on the electron supply layer 22 may be used.

  In addition to the HEMT using AlGaN and GaN, the semiconductor device in this embodiment can also be applied to a semiconductor device using a nitride semiconductor material using a material such as InAlN or InGaAlN.

(Method for manufacturing semiconductor device)
Next, a method for manufacturing a semiconductor device in the present embodiment will be described with reference to FIGS.

  First, as shown in FIG. 20A, a nitride semiconductor layer including a buffer layer, an electron transit layer 21, an electron supply layer 22, a cap layer 23, and the like (not shown) is formed on the substrate 10 by the MOVPE method. . These nitride semiconductor layers are formed by epitaxial growth by MOVPE, but may be formed by methods other than MOVPE, for example, MBE. A silicon substrate is used as the substrate 10, and a buffer layer (not shown) is made of AlN having a thickness of 0.1 μm. The electron transit layer 21 is made of i-Gan having a thickness of 3 μm, the electron supply layer 22 is made of n-AlGaN having a thickness of 30 nm, and the cap layer 23 has a thickness of 5 nm. It is made of n-GaN. Thereby, in the electron transit layer 21, 2DEG 21 a is formed in the vicinity of the interface between the electron transit layer 21 and the electron supply layer 22.

In this embodiment, when forming AlN, GaN, and AlGaN by MOVPE, as source gases, trimethylaluminum (TMA) as an Al source, trimethylgallium (TMG) as a Ga source, and ammonia as an N source A gas such as (NH ₃ ) is used. The AlN, GaN, and AlGaN layers, which are nitride semiconductor layers, can be formed by supplying the above-described source gas mixed at a predetermined ratio according to the composition of the nitride semiconductor layer to be formed. . In the semiconductor device in this embodiment, when the nitride semiconductor layer is formed by MOVPE, the flow rate of ammonia gas is 100 ccm to 10 LM, and the pressure inside the device during film formation is 50 Torr to 300 Torr. The temperature is 1000 ° C to 1200 ° C.

The n-AlGaN serving as the electron supply layer 22 is doped with Si as an n-type impurity element. Specifically, when the electron supply layer 22 is formed, Si can be doped into the electron supply layer 22 by adding SiH ₄ gas to the source gas at a predetermined flow rate. The concentration of Si doped in the n-AlGaN formed in this way is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , for example, about 5 × 10 ¹⁸ cm ⁻³ .

The n-GaN serving as the cap layer 23 is doped with Si as an n-type impurity element. Specifically, Si can be doped into the cap layer 23 by adding SiH ₄ gas to the source gas at a predetermined flow rate when forming the cap layer 23. The concentration of Si doped in the n-GaN thus formed is 1 × 10 ¹⁸ cm ⁻³ to 1 × 10 ²⁰ cm ⁻³ , for example, about 5 × 10 ¹⁸ cm ⁻³ .

  Next, as illustrated in FIG. 20B, a gate recess 150 is formed in part of the cap layer 23 and the electron supply layer 22 that are nitride semiconductor layers. Specifically, a photoresist is applied to the surface of the cap layer 23, and exposure and development are performed by an exposure apparatus, thereby forming a resist pattern (not shown) having an opening in a region where the gate recess 150 is formed. Thereafter, part of the cap layer 23 and the electron supply layer 22 in the region where the resist pattern is not formed is removed by RIE or the like. Thereby, the gate recess 150 can be formed. As a result, the 2DEG 21a can be eliminated immediately below the region where the gate recess 150 is formed. Thereafter, the resist pattern (not shown) is removed with an organic solvent or the like.

Next, as shown in FIG. 21A, an insulating film 30 to be a gate insulating film is formed. Specifically, the altered layer formed on the surfaces of the electron supply layer 22 and the cap layer 23 in which the gate recess 150 is formed is washed with sulfuric acid / hydrogen peroxide and hydrofluoric acid, and then washed with water. Thereafter, an aluminum oxide film is formed on the electron supply layer 22 and the cap layer 23 on which the gate recess 150 is formed by an ALD method using a water vapor oxidation method using Al (CH ₃ ) ₃ and H ₂ O as source gases. As a result, a first insulating film 31 is formed. The thickness of the first insulating film 31 formed at this time is 5 to 10 nm. In the present embodiment, the first insulating film 31 having a thickness of 5 nm is formed. Next, an aluminum oxide film is formed on the first insulating film 31 by an oxygen plasma oxidation method using Al (CH ₃ ) ₃ and O ₂ as source gases, whereby the second insulating film 32 is formed. Form. The thickness of the second insulating film 32 formed at this time is 10 to 100 nm. In the present embodiment, the second insulating film 32 having a thickness of 35 nm is formed. As a result, the insulating film 30 is formed by the first insulating film 31 and the second insulating film 32. Thereafter, annealing is performed at a temperature of 700 ° C. to 800 ° C.

Next, as shown in FIG. 21B, the source electrode 42 and the drain electrode 43 are formed. Specifically, a resist pattern (not shown) having openings in regions where the source electrode 42 and the drain electrode 43 are formed by applying a photoresist on the insulating film 30 and performing exposure and development by an exposure apparatus. Form. Thereafter, a part or all of the insulating film 30, the cap layer 23, and the electron supply layer 22 in a region where the resist pattern is not formed is removed by dry etching such as RIE using a fluorine-based gas, a chlorine-based gas, or the like. . The conditions for dry etching in the nitride semiconductor performed at this time are, for example, a flow rate of chlorine (Cl ₂ ) gas of about 30 sccm, a pressure in the chamber of about 2 Pa, and an RF input power of 20 W. Thereafter, after removing a resist pattern (not shown), a photoresist is applied again, and exposure and development are performed by an exposure apparatus, whereby an opening is provided in a region where the source electrode 42 and the drain electrode 43 are formed. The resist pattern is formed. Then, after depositing Ta / Al, which is a laminated metal film, by vacuum deposition, the laminated metal film formed on the resist pattern is removed together with the resist pattern by lift-off by being immersed in an organic solvent or the like. Thereby, the source electrode 42 and the drain electrode 43 are formed by the remaining laminated metal film. Thereafter, an annealing process is performed at about 550 ° C. to make ohmic contact between the source electrode 42 and the drain electrode 43.

  Next, as shown in FIG. 22, a gate electrode 41 is formed. Specifically, a lower layer resist (for example, product name PMGI: manufactured by US Microchem) and an upper layer resist (for example, product name PFI32-A8: manufactured by Sumitomo Chemical Co., Ltd.) are respectively spin-coated on the insulating film 30. Apply by. Thereafter, by performing exposure and development with an exposure apparatus, an opening having a diameter of, for example, about 0.8 μm is formed in the upper resist. Thereafter, using the upper layer resist as a mask, the lower layer resist exposed in the opening of the upper layer resist is removed by wet etching with an alkali developer. Next, after depositing Ni / Au (Ni: film thickness of about 10 nm / Au: film thickness of about 300 nm) as a laminated metal film by vacuum deposition, it is immersed in an organic solvent, etc. The laminated metal film formed in (1) is removed together with the resist pattern by lift-off. Thereby, the gate electrode 41 is formed by the remaining laminated metal film.

(Characteristics of the semiconductor device in this embodiment)
23 to 26 show various characteristics in the HEMT having the structure shown in FIG. 14A, the HEMT having the structure shown in FIG. 14B, and the HEMT which is the semiconductor device in the present embodiment. In FIGS. 23 to 26, a HEMT which is a semiconductor device in the present embodiment is shown at 19A. Further, as described above, a HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in FIG. 14A is shown in 14A, and formed by the water vapor oxidation method shown in FIG. 14B. 14B shows a HEMT using the aluminum oxide film 932 thus formed.

  FIG. 23 shows the ratio of O / (Al + Ga) on the surface of AlGaN and GaN serving as the electron supply layer and the cap layer. In the case of HEMT which is a semiconductor device in the present embodiment shown in 19A, the ratio of O / (Al + Ga) was about 0.34. This value is lower than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, and the HEMT using the aluminum oxide film 932 formed by the water vapor oxidation method shown in 14B. It is about the same.

  FIG. 24 shows the threshold fluctuation in the gate electrode. In the case of HEMT, which is the semiconductor device in the present embodiment shown in 19A, the threshold fluctuation is about 0.25V. This value is lower than the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A, and further uses the aluminum oxide film 932 formed by the steam oxidation method shown in 14B. Lower than the HEMT we had.

FIG. 25 shows the density in the insulating film to be the gate insulating film. In the case of HEMT, which is a semiconductor device in the present embodiment shown in 19A, the density was about 3.3 g / cm ³ . This value is higher than the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, and the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A. It is about the same.

  FIG. 26 shows the breakdown voltage between the drain and the source. In the case of the HEMT which is the semiconductor device in the present embodiment shown in 19A, the breakdown voltage was about 410V. This value is higher than the HEMT using the aluminum oxide film 932 formed by the steam oxidation method shown in 14B, and the HEMT using the aluminum oxide film 931 formed by the oxygen plasma oxidation method shown in 14A. It is about the same.

  As described above, the HEMT that is the semiconductor device in this embodiment has the advantages of the HEMT using the aluminum oxide film formed by the oxygen plasma oxidation method and the HEMT using the aluminum oxide film formed by the steam oxidation method. Combines both of the advantages of

  That is, the HEMT in the semiconductor device according to the present embodiment uses an aluminum oxide film formed by the water vapor oxidation method shown in 14B from the viewpoint of the O / Ga ratio on the surface of GaN and the threshold fluctuation in the gate electrode. It has the same or better characteristics than those. Further, in terms of the density in the insulating film to be the gate insulating film and the breakdown voltage between the drain and the source, it has characteristics similar to those using the aluminum oxide film formed by the oxygen plasma oxidation method shown in 14A. doing.

[Third Embodiment]
Next, a third embodiment will be described. The present embodiment is a semiconductor device, a power supply device, and a high-frequency amplifier.

  The semiconductor device according to the present embodiment is a discrete package of the semiconductor device according to the first or second embodiment. The semiconductor device thus discretely packaged will be described with reference to FIG. FIG. 23 schematically shows the inside of a discrete packaged semiconductor device. The arrangement of electrodes and the like are different from those shown in the first and second embodiments. Yes.

(Semiconductor device)
FIG. 27 shows a discrete package of the semiconductor device according to the first or second embodiment.

  First, the semiconductor device manufactured in the first or second embodiment is cut by dicing or the like to form a HEMT semiconductor chip 410 made of a GaN-based semiconductor material. The semiconductor chip 410 is fixed on the lead frame 420 with a die attach agent 430 such as solder. The semiconductor chip 410 corresponds to the semiconductor device in the first or second form.

  Next, the gate electrode 411 is connected to the gate lead 421 by a bonding wire 431, the source electrode 412 is connected to the source lead 422 by a bonding wire 432, and the drain electrode 413 is connected to the drain lead 423 by a bonding wire 433. The bonding wires 431, 432, and 433 are formed of a metal material such as Al. In the present embodiment, the gate electrode 411 is a kind of gate electrode pad, and is connected to the gate electrode 41 of the semiconductor device in the first or second embodiment. The source electrode 412 is a kind of source electrode pad and is connected to the source electrode 42 of the semiconductor device in the first or second embodiment. The drain electrode 413 is a kind of drain electrode pad and is connected to the drain electrode 43 of the semiconductor device according to the first or second embodiment.

  Next, resin sealing with a mold resin 440 is performed by a transfer molding method. In this way, a HEMT discrete packaged semiconductor device using a GaN-based semiconductor material can be manufactured.

(PFC circuit, power supply and high frequency amplifier)
Next, a PFC circuit, a power supply device, and a high frequency amplifier in this embodiment will be described. The PFC circuit, the power supply device, and the high-frequency amplifier in the present embodiment are a power supply device and a high-frequency amplifier that use any of the semiconductor devices in the first or second embodiment.

(PFC circuit)
Next, a PFC (Power Factor Correction) circuit according to the present embodiment will be described. The PFC circuit in the present embodiment has the semiconductor device in the first or second embodiment.

  Based on FIG. 28, the PFC circuit in the present embodiment will be described. The PFC circuit 450 in this embodiment includes a switch element (transistor) 451, a diode 452, a choke coil 453, capacitors 454 and 455, a diode bridge 456, and an AC power supply (not shown). As the switch element 451, the HEMT which is the semiconductor device in the first or second embodiment is used.

  In the PFC circuit 450, the drain electrode of the switch element 451, the anode terminal of the diode 452, and one terminal of the choke coil 453 are connected. The source electrode of the switch element 451 is connected to one terminal of the capacitor 454 and one terminal of the capacitor 455, and the other terminal of the capacitor 454 is connected to the other terminal of the choke coil 453. The other terminal of the capacitor 455 and the cathode terminal of the diode 452 are connected, and an AC power supply (not shown) is connected between both terminals of the capacitor 454 via a diode bridge 456. In such a PFC circuit 450, direct current (DC) is output from between both terminals of the capacitor 455.

(Power supply)
Next, the power supply device according to the present embodiment will be described. The power supply device in the present embodiment is a power supply device having a HEMT that is the semiconductor device in the first or second embodiment.

  The power supply device in the present embodiment will be described based on FIG. The power supply device in the present embodiment has a structure including the PFC circuit 450 in the present embodiment described above.

  The power supply device in this embodiment includes a high-voltage primary circuit 461 and a low-voltage secondary circuit 462, and a transformer 463 disposed between the primary circuit 461 and the secondary circuit 462. Yes.

  The primary circuit 461 includes the PFC circuit 450 in the present embodiment described above and an inverter circuit connected between both terminals of the capacitor 455 of the PFC circuit 450, for example, a full bridge inverter circuit 460. The full bridge inverter circuit 460 includes a plurality (here, four) of switch elements 464a, 464b, 464c, and 464d. The secondary side circuit 462 includes a plurality (three in this case) of switch elements 465a, 465b, and 465c. An AC power supply 457 is connected to the diode bridge 456.

  In this embodiment, the HEMT that is the semiconductor device in the first or second embodiment is used in the switch element 451 of the PFC circuit 450 in the primary circuit 461. Further, the HEMT that is the semiconductor device in the first or second embodiment is used for the switch elements 464a, 464b, 464c, and 464d in the full bridge inverter circuit 460. On the other hand, the switch elements 465a, 465b, and 465c of the secondary circuit 462 are normal MIS FETs using silicon.

(High frequency amplifier)
Next, the high frequency amplifier in the present embodiment will be described. The high-frequency amplifier in the present embodiment has a structure in which the HEMT that is the semiconductor device in the first or second embodiment is used.

  Based on FIG. 30, the high-frequency amplifier according to the present embodiment will be described. The high frequency amplifier in this embodiment includes a digital predistortion circuit 471, mixers 472a and 472b, a power amplifier 473, and a directional coupler 474.

  The digital predistortion circuit 471 compensates for nonlinear distortion of the input signal. The mixer 472a mixes an input signal with compensated nonlinear distortion and an AC signal. The power amplifier 473 amplifies the input signal mixed with the AC signal, and includes the HEMT that is the semiconductor device according to the first or second embodiment. The directional coupler 474 performs monitoring of input signals and output signals. In FIG. 30, for example, by switching the switch, the signal on the output side can be mixed with the AC signal by the mixer 472b and sent to the digital predistortion circuit 471.

  Although the embodiment has been described in detail above, it is not limited to the specific embodiment, and various modifications and changes can be made within the scope described in the claims.

In addition to the above description, the following additional notes are disclosed.
(Appendix 1)
Forming a nitride semiconductor layer on the substrate;
Forming a first insulating film on the nitride semiconductor layer by an ALD method using water vapor oxidation using a source gas containing H ₂ O or an ALD method using oxidation using a source gas containing O ₃ ;
Forming a second insulating film on the first insulating film by an ALD method using oxygen plasma oxidation using a source gas containing O ₂ ;
Forming a gate electrode on the second insulating film;
Forming a source electrode and a drain electrode on the nitride semiconductor layer;
Have
The nitride semiconductor layer includes a first semiconductor layer formed on a substrate and a second semiconductor layer formed on the first semiconductor layer. Production method.
(Appendix 2)
2. The method of manufacturing a semiconductor device according to appendix 1, wherein the nitride semiconductor layer includes a third semiconductor layer formed on the second semiconductor layer.
(Appendix 3)
After the step of forming the nitride semiconductor layer and before the step of forming the first insulating film,
3. The method of manufacturing a semiconductor device according to appendix 1 or 2, further comprising a step of forming a recess by removing a part of the nitride semiconductor layer in a region where the gate electrode is formed. .
(Appendix 4)
4. The method of manufacturing a semiconductor device according to any one of appendices 1 to 3, wherein the first insulating film and the second insulating film are both formed of aluminum oxide.
(Appendix 5)
In the step of forming the first insulating film, the first insulating film is formed by an ALD method by steam oxidation using trimethylaluminum and H ₂ O as source gases. A method for manufacturing a semiconductor device according to appendix 4.
(Appendix 6)
In the step of forming the second insulating film, the second insulating film is formed by an ALD method using oxygen plasma oxidation using trimethylaluminum and O ₂ or ozone as a source gas. The method for manufacturing a semiconductor device according to appendix 4 or 5, wherein
(Appendix 7)
The method for manufacturing a semiconductor device according to any one of appendices 1 to 6, further comprising a heat treatment step of performing a heat treatment at a temperature of 700 ° C. or higher and 800 ° C. or lower after the step of forming the second insulating film. .
(Appendix 8)
A nitride semiconductor layer formed on the substrate;
An insulating film formed on the nitride semiconductor layer;
A gate electrode formed on the insulating film;
A source electrode and a drain electrode formed in contact with the nitride semiconductor layer;
Have
The nitride semiconductor layer includes a first semiconductor layer formed on a substrate and a second semiconductor layer formed on the first semiconductor layer,
The insulating film is formed by an ALD method, and a first insulating film and a second insulating film are sequentially stacked from the second semiconductor layer side,
A semiconductor device, wherein the density of the second insulating film is higher than the density of the first insulating film.
(Appendix 9)
The first insulating film is formed by steam oxidation using a source gas containing H ₂ O,
Additional Note 8: The second insulating film is formed by oxygen plasma oxidation using a source gas containing O ₂ or formed by oxidation using a source gas containing O _3. A semiconductor device according to 1.
(Appendix 10)
A nitride semiconductor layer formed on the substrate;
An insulating film formed on the nitride semiconductor layer;
A gate electrode formed on the insulating film;
A source electrode and a drain electrode formed in contact with the nitride semiconductor layer;
Have
The nitride semiconductor layer includes a first semiconductor layer formed on a substrate and a second semiconductor layer formed on the first semiconductor layer,
In the nitride semiconductor layer, in the vicinity of the interface between the nitride semiconductor layer and the insulating film, a ratio of oxygen atoms to metal atoms contained in the nitride semiconductor is 0.4 or less. apparatus.
(Appendix 11)
The semiconductor device according to appendix 10, wherein the insulating film includes one or more of oxides, nitrides, and oxynitrides of aluminum, hafnium, silicon, and nickel.
(Appendix 12)
12. The semiconductor device according to any one of appendices 8 to 11, wherein the insulating film is aluminum oxide.
(Appendix 13)
The semiconductor device according to appendix 12, wherein the concentration of aluminum hydroxide contained in the insulating film is 4% or less.
(Appendix 14)
14. The semiconductor device according to any one of appendices 8 to 13, wherein the nitride semiconductor layer includes a third semiconductor layer formed on the second semiconductor layer.
(Appendix 15)
15. The semiconductor device according to appendix 14, wherein the third semiconductor layer is made of a material containing GaN.
(Appendix 16)
16. The semiconductor device according to any one of appendices 8 to 15, wherein the first semiconductor layer is formed of a material containing GaN.
(Appendix 17)
The semiconductor device according to any one of appendices 8 to 16, wherein the second semiconductor layer is formed of a material containing AlGaN.
(Appendix 18)
18. The semiconductor device according to any one of appendices 8 to 17, wherein the semiconductor device includes a HEMT.
(Appendix 19)
A power supply device comprising the semiconductor device according to any one of appendices 8 to 18.
(Appendix 20)
An amplifier comprising the semiconductor device according to any one of appendices 8 to 18.

10 Substrate 21 Electron travel layer (first semiconductor layer)
21a 2DEG
22 Electron supply layer (second semiconductor layer)
23 Cap layer (third semiconductor layer)
30 Insulating film 31 First insulating film 32 Second insulating film 41 Gate electrode 42 Source electrode 43 Drain electrode

Claims (6)

A nitride semiconductor layer including a first semiconductor layer provided on the substrate and a second semiconductor layer provided on the first semiconductor layer;
A first insulating film provided on the nitride semiconductor layer;
A second insulating film provided on the first insulating film and having a density higher than that of the first insulating film;
A gate electrode provided on the second insulating film;
A source electrode and a drain electrode provided on the nitride semiconductor layer;
I have a,
The first insulating film and the second insulating film, wherein a both aluminum oxide der Rukoto. A nitride semiconductor layer including a first semiconductor layer provided on the substrate and a second semiconductor layer provided on the first semiconductor layer;
A first insulating film provided on the nitride semiconductor layer;
A second insulating film provided on the first insulating film;
A gate electrode provided on the second insulating film;
A source electrode and a drain electrode provided on the nitride semiconductor layer;
Have
In the vicinity of the interface between the nitride semiconductor layer and the first insulating film in the nitride semiconductor layer, the ratio of oxygen atoms to metal atoms contained in the nitride semiconductor layer, it der 0.4 or less,
The first insulating film and the second insulating film, wherein a both aluminum oxide der Rukoto. The nitride semiconductor layer is characterized in that it is intended to include a third semiconductor layer provided on said second semiconductor layer, a semiconductor device according to claim 1 or 2. The thickness of the second insulating film may be greater than a thickness of the first insulating film, a semiconductor device according to any one of claims 1 to 3. The thickness of the first insulating film is characterized by a 5 nm to 10 nm, the semiconductor device according to any one of claims 1 to 4. Wherein the thickness of said second insulating film is 10 nm to 100 nm, a semiconductor device according to any one of claims 1 to 5.

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