JP5501549B2 - Photoelectric conversion element and photoelectric conversion module composed thereof - Google Patents

Description

  The present invention relates to a photoelectric conversion element and a photoelectric conversion module including the photoelectric conversion element.

Photoelectric conversion devices such as solar cells and optical sensors convert light energy such as sunlight incident on the surface into electrical energy. At present, solar cells are attracting attention as clean energy that does not emit CO ₂ among photoelectric conversion devices.

  As a mainstream product of solar cells, there is a bulk type crystalline silicon solar cell composed of a solar cell element using a crystalline silicon substrate (see, for example, Patent Document 1). In particular, the type using a polycrystalline silicon substrate can achieve both high efficiency and low cost, so its production scale is currently the largest and is expected to increase further in the future. .

A polycrystalline silicon substrate is obtained by cutting out from an ingot obtained by melting and solidifying silicon. The polycrystalline silicon solar cell element is produced by processing this polycrystalline silicon substrate through an elementization process, and the polycrystalline silicon solar cell module includes a plurality of polycrystalline silicon solar cell elements. It is provided with what was connected individually.
JP-A-8-274356

  Here, the conversion efficiency (also referred to as “element characteristics” in the case of a solar cell element), which is the performance of the polycrystalline silicon solar cell, is a short circuit current Isc (or short circuit current density Jsc) × open circuit voltage Voc × curve factor FF. One of the main factors that determine FF is proportional to various series resistance components.

  Among the series resistance components, one of the main components is due to the contact resistance at the interface between the metal electrode and the semiconductor substrate surface. In particular, the surface electrode usually has a thin linear electrode shape (finger electrode and bus bar electrode), so the contact area at the surface electrode / semiconductor interface is limited, and the relative influence ratio on the contact resistance at the surface electrode / semiconductor interface Tend to grow.

  Actually, in the current mainstream polycrystalline Si solar cells, a silver (Ag) electrode obtained by printing and baking a silver (Ag) paste is generally used as a surface electrode. However, the interface between the Ag electrode and the Si substrate is generally used. Contact resistance is one of the main factors that hinder the improvement of FF characteristics, and in particular, it is considered that the degree of influence will increase further in the future for higher efficiency (for example, on the light incident surface side). Decrease in ohmic contact with increased sheet resistance in the diffusion region (n-type region on the surface side for p-type substrates) aimed at improving short circuit current, as the contact area decreases with the thinning of the silver electrode , Etc. tend to increase contact resistance).

  The present invention has been made in view of such problems, and provides a photoelectric conversion element having improved output characteristics by reducing contact resistance between a metal electrode and a semiconductor, and a photoelectric conversion module including the photoelectric conversion module. The purpose is to do.

  In particular, the present inventors have intensively analyzed and analyzed the origin of the contact resistance of the metal electrode part, and there is a certain correlation between the contact resistance value and the interface structure between the metal electrode and the semiconductor substrate surface. I found out. In response to this knowledge, further experiments and examinations were repeated, and the configuration of the present invention was found.

That is, the present invention exists in at least a part of an interface between a semiconductor substrate having a concavo-convex surface formed thereon, a metal electrode formed on the concavo-convex surface of the semiconductor substrate surface, and the semiconductor substrate surface and the metal electrode. A photoelectric conversion element comprising: a glass layer; and a metal particle present in the glass layer along the recess on the surface of the semiconductor substrate and partially protruding from the recess . The thickness t, the thickness particle diameter m of the metal particles, the length particle diameter n of the metal particles, the height o of the unevenness and the length p of the uneven pitch satisfy the following relationship: .
m / t ≧ 0.5, n / t ≧ 1, o / t ≧ 0.25, p / t ≧ 1.5
(150 nm ≦ t ≦ 400 nm, m ≦ 330 nm, n ≦ 800 nm, o ≦ 300 nm, p ≦ 800 nm)

The glass layer is preferably composed of a microcrystalline layer.

Preferably, the microcrystalline layer is disposed in contact with the semiconductor substrate, and an amorphous layer is disposed on the microcrystalline layer .

  The metal electrode is preferably a silver (Ag) electrode.

  The semiconductor substrate is preferably composed of crystalline silicon (Si).

  The present invention relates to a photoelectric conversion module including the photoelectric conversion element.

  According to the present invention, m / t, which is a relational expression between the thickness of the metal particles, the length of the metal particles, the height of the unevenness, or the pitch length of the unevenness and the thickness of the glass layer, When the value of n / t, o / t, or p / t shows a certain size or more, a photoelectric conversion element in which contact resistance is suppressed, and a photoelectric conversion module including the photoelectric conversion element can be provided.

  This invention says the photoelectric conversion element of the following aspects (1)-(4).

<< Photoelectric conversion element >>
In the photoelectric conversion element of aspect (1), a semiconductor substrate having irregularities formed on the surface, a metal electrode formed on the irregularities on the surface of the semiconductor substrate, and at least part of an interface between the surface of the semiconductor substrate and the metal electrode It exists in the glass layer and in contact with the surface of the semiconductor substrate in the glass layer, and satisfies the relational expression m / t ≧ 0.5 (150 nm ≦ t ≦ 400 nm) with the thickness t of the glass layer. And a metal particle having a thickness m.

The photoelectric conversion element of aspect (2) includes a semiconductor substrate having irregularities formed on the surface, a metal electrode formed on the irregularities on the surface of the semiconductor substrate, and at least part of an interface between the surface of the semiconductor substrate and the metal electrode. A length that exists in the glass layer and is in contact with the surface of the semiconductor substrate and satisfies the relational expression n / t ≧ 1 (150 nm ≦ t ≦ 400 nm) with the thickness t of the glass layer. And metal particles having a particle size n.

The photoelectric conversion element of aspect (3) is present in at least a part of the interface between the semiconductor substrate having a concavo-convex formed on the surface, the metal electrode formed on the concavo-convex of the semiconductor substrate, and the semiconductor substrate surface and the metal electrode. A glass layer having a thickness t satisfying the relational expression o / t ≧ 0.25 (150 nm ≦ t ≦ 400 nm) with the height o of the unevenness, and present in contact with the semiconductor substrate in the glass layer It has what has a metal particle to do.

The photoelectric conversion element according to aspect (4) is present on at least a part of an interface between a semiconductor substrate having a concavo-convex surface, a metal electrode formed on the concavo-convex surface of the semiconductor substrate, and the surface of the semiconductor substrate and the metal electrode. A glass layer having a thickness t satisfying a relational expression p / t ≧ 1.5 (150 nm ≦ t ≦ 400 nm) with the length p of the uneven pitch, and in contact with the semiconductor substrate in the glass layer And metal particles present.

<Semiconductor substrate>
In the photoelectric conversion elements of aspects (1) to (4) of the present invention, the semiconductor substrate has irregularities formed on the surface thereof (see FIG. 1), and the light reflectance reduction performance can be obtained by forming the irregularities. Here, the front surface of the semiconductor substrate means the light incident surface side and / or the back surface of the semiconductor. As the semiconductor substrate, it is preferable that irregularities are formed on the light incident surface side of the semiconductor because the above-mentioned performance can be obtained sufficiently.

  In the present invention, as a method for forming irregularities on the surface of a semiconductor substrate, an anisotropic wet etching method using an alkali solution such as NaOH is generally used. When the substrate is a polycrystalline silicon substrate such as a cast method, the crystal plane orientation in the substrate surface varies randomly for each crystal grain, so a good uneven structure that effectively reduces the light reflectivity over the entire substrate can be obtained. Uniform formation tends to be difficult.

  Therefore, it is particularly preferable to perform gas etching by the RIE (Reactive Ion Etching) method as the formation of unevenness on the surface of the semiconductor substrate. As a result, it is relatively easy to form a good concavo-convex structure uniformly over the entire substrate, approximately one order of magnitude smaller than the concavo-convex obtained by the wet etching method, and the concavo-convex pitch length and concavo-convex height are independent. Can be controlled. In addition, the crystal plane orientation in the substrate plane that occurs when the silicon substrate is a polycrystalline silicon substrate by a cast method or the like suppresses random variations for each crystal grain, and effectively reduces the light reflectivity over the entire substrate Unevenness can be formed.

When the gas etching method by the RIE method is used, examples of the reaction gas include chlorine gas (Cl ₂ ), oxygen gas (O ₂ ), sulfur hexafluoride gas (SF ₆ ), and trifluoromethane gas (CHF ₃ ). And H ₂ O gas. For example, chlorine gas (Cl 2), oxygen gas (O 2), and sulfur hexafluoride gas (SF 6) may be introduced into the etching chamber so that the volume ratio is about 1: 5: 5. As conditions for gas etching by RIE, the reaction gas pressure may be about 7 Pa, and the RF power density for applying plasma may be about 5 kW / m ² .

In particular, by controlling the gas flow rate, the height of the unevenness (the unevenness height difference) can be controlled. For example, the height of the unevenness can be increased by increasing the gas flow rate. The gas flow rate depends on the chamber size.

  The etching time is preferably 1 to 20 minutes. By doing so, it is possible to control the uneven height (uneven height difference), uneven pitch, and the like.

  In addition, by independently controlling parameters such as gas type, gas concentration (mixing ratio), gas pressure, plasma power density, plasma frequency, etc., the uneven pitch and uneven height can be controlled to some extent independently. This is suitable because the controllability for realizing the low contact resistance structure of the present invention is enhanced.

  In the gas etching by the RIE method, the optimum conditions can be searched in consideration of the above-mentioned parameters comprehensively. Also, if only the etching time is used as a parameter, as can be seen from the above, both the uneven pitch and the uneven height can be controlled at the same time. By using only time as a parameter, it is possible to adjust to an uneven shape suitable for the present invention.

  In the photoelectric conversion element of the present invention, the unevenness height o is preferably 70 nm or more. If the height of the unevenness is less than 70 nm, the thickness particle size of the metal particles formed on the unevenness tends to be small. Here, the height o of the unevenness means the maximum height difference between the apex of the adjacent convex portion and the bottom point of the concave portion in the direction perpendicular to the main surface of the semiconductor substrate. Specifically, it is shown in FIG.

  Further, the length p of the uneven pitch is preferably 500 nm or more. If the length p of the uneven pitch is less than 500 nm, the length of the metal particles formed on the unevenness tends to be small. Here, the length p of the concavo-convex pitch refers to the maximum length among the lengths between vertices of adjacent convex portions in a direction parallel to the semiconductor substrate main surface. Specifically, it is shown in FIG.

<Metal electrode>
In the photoelectric conversion elements according to aspects (1) to (4) of the present invention, the metal electrode is formed on the irregularities on the surface of the semiconductor substrate.

  Examples of the metal electrode include a silver electrode and an aluminum electrode, but it is easy to form metal particles (for example, when forming metal particles by raising the temperature after firing and then forming metal particles), Since it is possible to reduce power loss as much as possible, a silver electrode is preferable.

  Examples of the method for producing the metal electrode include a printing firing method and a vacuum film forming method. Examples of the vacuum film forming method include a sputtering method and a vapor deposition method. In particular, the metal paste that becomes the surface electrode (111 in FIG. 16) is directly printed on the antireflection film (116 in FIG. 16) without patterning the antireflection film (116 in FIG. 12) by the fire-through method. By performing the baking process, electrical contact can be made between the surface electrode (111 in FIG. 16) and the reverse conductivity type region (114 in FIG. 16), and a reduction in manufacturing cost can be achieved. Therefore, the printing and baking method is preferable. Furthermore, when used together with the RIE method, a glass layer suitable for the present invention is created, and when forming metal particles on the unevenness, the thickness of the glass layer and the size of the metal particles can be easily controlled, Since the contact resistance can be accurately controlled to a low value, firing by rapid thermal processing (RTP treatment) is preferable among the printing firing methods.

  Here, the RTP treatment is a printing and firing method using a lamp having an emission wavelength in the ultraviolet region such as a xenon lamp or a krypton lamp, or a lamp having an emission wavelength in the near infrared region (IR region) such as a halogen lamp. Say.

  It is possible to control the glass layer and the metal particles suitably because the temperature rising rate and the temperature falling rate are higher than those in the past. According to this baking method, since high-speed baking is possible, an increase in the glass layer thickness more than necessary can be effectively suppressed. In high-speed firing, since the glass layer is easily formed uniformly, it can be formed so as to cover the entire silicon surface in a continuous state even with a relatively small amount of glass.

  The firing temperature in the printing firing method is preferably 600 to 800 ° C. If the firing temperature is less than 600 ° C., the electrode strength tends to decrease due to insufficient firing or metal particles tend not to form on the irregularities. If the firing temperature exceeds 800 ° C., the pn junction region tends to be destroyed due to overheating. .

  The heating rate in the printing and firing method is preferably 30 ° C./second or more. When the rate of temperature increase is less than 30 ° C./second, metal particles tend to be difficult to form on the unevenness.

  The cooling rate in the printing and firing method is preferably 30 ° C./second or more. When the temperature lowering rate is less than 30 ° C./second, metal particles tend not to be easily formed on the unevenness.

  The temperature increase rate and the temperature decrease rate are calculated from the temperature profile gradient before and after the peak temperature by attaching a thermocouple to the semiconductor substrate and taking a temperature profile (temperature-time).

When the metal electrode is produced by a printing and firing method, the adhesive strength between the electrode and the semiconductor region can be particularly increased, so that the metal paste used for producing the metal electrode contains an oxide component such as TiO _2. It is preferable.

  In addition, even when the metal electrode is manufactured by a vacuum film forming method, it is possible to particularly increase the adhesive strength between the electrode and the semiconductor region, so that Ti is the main component at the interface between the electrode and the semiconductor region. It is preferable to insert a metal layer. In the case of the back side electrode, the thickness of the metal layer is preferably 5 nm or less in order to suppress the reduction in reflectance due to the insertion of the metal layer.

  In the present invention, specific examples of the metal electrode include a front electrode (111 in FIG. 12), a back collector (118 in FIG. 12), a back output electrode (119 in FIG. 12), and the like.

  It is desirable in terms of cost that the front surface electrode 111 and the rear surface output electrode 119 are fired simultaneously (in one time) in the production thereof, but in particular, due to the electrode strength characteristics of the back surface electrode, firing is divided into two times. In some cases (for example, the front surface electrode 111 is first printed and fired, and then the back surface output electrode 119 is printed and fired).

  Further, it is more desirable in terms of cost to form the front surface electrode 111 and the back surface output electrode 119 simultaneously with the formation of the p + -type region 117 (BSF region).

  As shown in FIG. 13, the surface electrode generally includes a finger electrode 111b (branch electrode) having a narrow line width, and a bus bar electrode 111a (stem electrode) having a large line width to which at least one end of the finger electrodes is connected. Preferably it consists of. Note that the formation of the front surface electrode 111 may be performed prior to the formation of the p + type region on the back surface side.

  Further, since the region where the back surface collecting electrode 118 and the back surface output electrode 119 overlap is likely to cause substrate cracking or electrode peeling, after forming the back surface output electrode 119 for output extraction, the back surface collecting electrode 118 is connected to the back surface output electrode 119. It is desirable to form it in such a state that it can be conductive so as not to cover as much as possible. The order of forming the back surface output electrode 119 and the back surface collecting electrode 118 may be reversed. Further, the back side electrode may not have the above-described structure, and may have a structure composed of a bus bar portion and a finger portion mainly composed of silver similar to the surface electrode 111.

  The back collector electrode 118 may be a silver electrode, an aluminum electrode, or the like, but is particularly preferably an aluminum electrode.

  The back collector electrode is preferably formed on the entire back surface of the substrate because it can increase the reflectance of the long wavelength reaching the back surface.

  The back output electrode 119 is preferably provided to collect current from the back collector electrode 118. The back collector electrode may be a silver electrode, an aluminum electrode, or the like, but is particularly preferably a silver electrode.

<Glass layer>
In the photoelectric conversion elements according to aspects (1) to (4) of the present invention, a glass layer is present at least at a part of the interface between the semiconductor substrate surface and the metal electrode (see FIG. 1). The glass layer means that a layer is uniformly formed at the interface between the surface of the semiconductor substrate and the metal electrode, but may be present only partially at the interface.

  The glass layer is composed of a glass component (glass frit) or the like in a metal paste used for producing a metal electrode, and is formed at the interface between the surface of the semiconductor substrate and the metal electrode in firing the metal electrode. In addition, the glass layer includes a product obtained as a result of the antireflection film reacting with the glass component.

  In forming the metal electrode such as the surface electrode 111, in order to obtain the low contact resistance structure of the present invention, it is mainly to control the thickness of the glass layer originating from the glass frit formed at the interface between the surface electrode and the semiconductor substrate. Is important. That is, when the thickness of the glass layer is increased more than necessary, the contact resistance is rapidly increased, resulting in deterioration of characteristics. On the other hand, when the formation of the glass layer is insufficient and the glass layer is not formed so as to cover the entire silicon surface, the electrode strength is lowered and the reliability is lowered.

  The metal paste is preferably composed of metal powder, glass frit, organic vehicle, and oxide. Further, examples of the element of the glass frit composition in the metal paste include elements such as Si, O, and Pb.

  The glass frit content in the metal paste is preferably 0.1 to 5 parts by weight with respect to 100 parts by weight of the metal powder in the metal paste. If the glass frit content is less than 0.1 parts by weight, the electrode strength tends to be lowered, and the reliability tends to be lowered. On the other hand, if the glass frit content exceeds 5 parts by weight, the contact resistance tends to increase and the characteristics tend to deteriorate.

  In the metal paste, the content of the organic vehicle is preferably 10 to 30 parts by weight with respect to 100 parts by weight of the metal powder.

  In the photoelectric conversion element of the present invention, the thickness t of the glass layer is preferably 150 to 400 nm because particularly low contact resistance can be obtained. If the thickness t of the glass layer is less than 150 nm, the formation of the glass layer is insufficient, and the glass layer is not formed so as to cover the front surface of the semiconductor in a continuous state, which tends to cause a decrease in electrode strength. Further, when the thickness t of the glass layer exceeds 400 nm, the contact resistance increases rapidly, and there is a tendency for the characteristics to deteriorate. Here, the thickness t of the glass layer refers to the maximum length of the glass layer in the direction perpendicular to the main surface of the semiconductor substrate. Specifically, it is shown in FIG.

  The control of the thickness of the glass layer is determined by the relationship with the concavo-convex structure, but as described above, it is first important not to increase the thickness of the glass layer more than necessary. It can be realized relatively easily by firing. According to this baking method, since high-speed baking is possible, an increase in the glass layer thickness more than necessary can be effectively suppressed. In high-speed firing, since the glass layer is easily formed uniformly, it can be formed so as to cover the entire silicon surface in a continuous state even with a relatively small amount of glass.

  The glass layer is preferably composed of a microcrystalline layer. By doing so, it is possible to suppress deterioration in characteristics of the photoelectric conversion element due to increase in contact resistance.

In order to prevent the glass layer from becoming amorphous and to be microcrystalline, for example, a PbO—ZnO—B ₂ O ₃ glass component that promotes crystallization, a PbO—TiO ₂ glass component, or , Metals (gold, silver, copper, etc.), oxides (zirconia ZrO ₂ , titania TiO ₂ , alumina Al ₂ O ₃ , lithium oxide Li ₂ O, phosphoric acid P ₂ O ₅ , etc.), fluoride, etc. are added What is necessary is just to add a suitable quantity in a metal paste as a thing, or to reduce the temperature-fall rate (cooling rate) in a baking process. In some cases, crystallization can be promoted by adding additional annealing.

The microcrystalline layer is preferably disposed in contact with the semiconductor substrate, and an amorphous layer is preferably disposed on the microcrystalline layer . By doing so, there exists a tendency for the outstanding reduction effect of contact resistance to be acquired.

  Further, the glass layer can include an amorphous layer together with the microcrystalline layer, and in that case, the microcrystalline layer is preferably disposed on the semiconductor side, and the amorphous layer is preferably disposed on the metal electrode layer. .

  Further, since the effect of reducing the contact resistance tends to be obtained as the proportion of the microcrystalline layer increases, the glass layer is preferably composed of only the microcrystalline layer.

<Metal particles>
In the photoelectric conversion elements of aspects (1) to (4) of the present invention, the metal particles are formed in contact with the surface of the semiconductor substrate in the glass layer. Here, the term “the metal particles are in contact with the surface of the semiconductor substrate” means that the metal particles are in physical contact with the surface of the substrate without using a glass layer or the like. The metal particles were obtained in the firing step by RTP treatment, in which the metal component in the metal paste used for the production of the metal electrode was dissolved in glass frit or the like in the temperature rising process, and then precipitated in the temperature lowering process. It is thought to be a thing.

  It is considered that the metal particles are greatly affected by the irregularities on the surface of the semiconductor substrate in the firing by the RTP treatment as described above, and the shape and size thereof are influenced thereby.

  In the photoelectric conversion element of the present invention, the metal particles preferably have a thickness particle size m of 150 nm or more. When the thickness m of the metal particles is less than 150 nm, the contact resistance tends to increase. Here, the thickness particle diameter m of the metal particles refers to the maximum length of the metal particles in the direction perpendicular to the main surface of the semiconductor substrate. Specifically, it is shown in FIG.

  In the photoelectric conversion element of the present invention, the metal particles preferably have a length particle size n of 480 nm or more. When the length n of the metal particles is less than 480 nm, the contact resistance tends to increase. Here, the length particle size n of the metal particles refers to the maximum length of the metal particles in the direction parallel to the main surface of the semiconductor substrate. Specifically, it is shown in FIG.

  In the photoelectric conversion element of aspect (1), the thickness t of the glass layer and the thickness particle diameter m of the metal particles satisfy the relational expression m / t ≧ 0.5. When the relational expression is m / t <0.5, the contact resistance value rapidly increases. In addition, m / t is preferably 0.6 or more, and more preferably 0.7 or more.

  In the photoelectric conversion element of aspect (2), the thickness t of the glass layer and the length particle size n of the metal particles satisfy the relational expression n / t ≧ 1. When the relational expression is n / t <1, the contact resistance value increases rapidly. In addition, n / t is preferably 2 or more.

  In the photoelectric conversion element of the aspect (3), the thickness t of the glass layer and the height o of the unevenness satisfy the relational expression o / t ≧ 0.25. When the relational expression is o / t <0.25, the contact resistance value rapidly increases. In addition, o / t is preferably 0.5 or more.

  In the photoelectric conversion element of the aspect (4), the thickness t of the glass layer and the length p of the uneven pitch satisfy the relational expression p / t ≧ 1.5. When the relational expression is p / t <1.5, the contact resistance value rapidly increases. Note that p / t is preferably 2 or more.

The photoelectric conversion element in embodiment (1) to (4) of the present invention is preferably 0.05? · Cm ² or less, more preferably it is possible to suppress to a contact resistance of 0.03Ω · cm ² or less.

  Thus, it is considered that the larger the unevenness of the metal particles and the semiconductor substrate with respect to the glass layer, the greater the probability of conduction between the metal electrode and the semiconductor and the lower the contact resistance. In this case, it is considered that the specific conduction path may be [metal electrode-metal particle-semiconductor] or [metal electrode-glass layer-metal particle-semiconductor]. In the latter case, it is considered that the thinner the glass layer, the lower the resistance. However, if the glass layer is very thin, there is a possibility that the resistance is very effectively reduced by the occurrence of a tunnel phenomenon.

<< Production Process of Photoelectric Conversion Element and Photoelectric Conversion Module >>
The production steps of the photoelectric conversion element and the photoelectric conversion module of the present invention will be sequentially described below.

  The semiconductor substrate in the present invention refers to a region composed of a p-type (or n-type) bulk region, a reverse conductivity type region, and a p + type (or n + type) region. In the following, a photoelectric conversion device using a p-type silicon substrate will be described (see 113 in FIG. 12). However, when an n-type silicon substrate is used, the same process can be performed by reversing the polarity in the description. Can be applied by.

  Examples of the p-type silicon substrate include a polycrystalline silicon substrate and a single crystal silicon substrate.

The p-type polycrystalline silicon substrate is obtained by cutting a silicon ingot obtained by a casting method into a plate shape in a slicing step. Here, examples of the casting method include known methods such as a casting method and in-mold dissolution / solidification method. As the p-type doping element, B (boron) or Ga (gallium) is used, and the doping is performed within the range of 1 × 10 ¹⁶ to 1 × 10 ¹⁷ atoms / cm ³ . Specifically, an appropriate amount of a crystalline Si lump containing B or Ga at a high concentration with a predetermined value may be introduced into the silicon melt during the casting process. In the slicing step, the substrate thickness is preferably 300 μm or less, more preferably 250 μm or less, and even more preferably 150 μm or less.

  If a single crystal silicon substrate is used, a desired substrate can be obtained by slicing a silicon ingot formed by a known method such as the CZ method or the FZ method. can do.

  In addition, when using plate-like silicon obtained by a pulling-up method such as a ribbon method, a desired substrate is obtained by cutting the plate-like silicon into a predetermined size and performing surface polishing treatment or the like as necessary. be able to.

The present invention can also be applied to the case where a crystalline silicon thin film typified by a microcrystalline silicon film formed on a predetermined substrate is used, that is, microcrystalline silicon formed on a predetermined substrate. When a crystalline silicon film typified by a film is used, a crystalline silicon film is formed on a dissimilar substrate using a film forming technique such as thermal CVD, plasma CVD, Cat-CVD, or Cat-PECVD. can do. Here, the predetermined substrate mainly includes a silicon substrate, a metal substrate, a glass substrate, and the like, and includes a case where predetermined processing is performed on the substrate. The predetermined processing in this case includes processing such as etching, thermal diffusion, film formation, and electrode formation in the case of a silicon substrate, and processing such as etching, film formation, electrode formation, and the like in the case of a metal substrate. In the case of a glass substrate, processing such as etching, film formation, electrode formation, and the like is included.

  Next, in order to remove the mechanical damage layer and the contamination layer on the surface layer portion of the substrate due to the slicing of the substrate, the surface layer portion on the front surface side and the back surface side of this substrate is made of NaOH, KOH, or a mixed solution of hydrofluoric acid and nitric acid It is preferable to etch with about 10 to 20 μm and then wash with pure water or the like.

  Next, using the above-described unevenness forming method, an unevenness (rough surface) structure having a light reflectivity reduction function is formed on the substrate surface side serving as a light incident surface.

  The reverse conductivity type region is disposed on the light incident surface side of the p-type bulk region, and P (phosphorus) atoms and the like are diffused at a high concentration to become n-type, so that it is between the p-type bulk region. A pn junction is formed. Here, the pn junction is composed of a depletion region extending to the p-type bulk region 115 side and a depletion region extending to the reverse conductivity type region 114 side.

  P (phosphorus) is particularly preferably used as the n-type doping element in the formation of the reverse conductivity type region.

The doping concentration is preferably 1 × 10 ^{18 to} 5 × 10 ²¹ atoms / cm ³ .

  The sheet resistance is preferably 30 to 300Ω / □, more preferably 45 to 120Ω / □, and still more preferably 65 to 100Ω / □.

The reverse conductivity type region is formed by applying a doping element (P) to the surface layer portion of the p-type bulk region at a temperature of about 700 to 1000 ° C. using a thermal diffusion method using POCl ₃ (phosphorus oxychloride) in a gas state as a diffusion source. It is preferably formed by diffusing. At this time, the thickness of the diffusion layer is set to about 0.2 to 0.5 μm, and this can be realized by forming a desired dope profile by adjusting the diffusion temperature and the diffusion time.

  In the above thermal diffusion method using a normal gas diffusion source, a diffusion region is also formed on the surface opposite to the target surface, but this portion may be etched away later. At this time, the reverse conductivity type region 114 other than the surface side of the substrate is removed by applying a resist film on the surface side of the silicon substrate, removing the resist film by etching using a mixed solution of hydrofluoric acid and nitric acid, and then removing the resist film. To do. Further, as will be described later, when the p + -type region 117 (BSF region) on the back surface is formed with an aluminum paste, aluminum as a p-type dopant can be diffused to a sufficient depth at a sufficient concentration. The influence of the shallow n-type diffusion layer that has already been diffused can be made negligible, and it is not particularly necessary to remove the n-type diffusion layer formed on the back surface side.

  Further, the method of forming the reverse conductivity type region 114 is not limited to the above-described thermal diffusion method. For example, by using thin film technology and conditions, crystalline silicon including a hydrogenated amorphous silicon film or a microcrystalline silicon film is used. A film or the like may be formed at a substrate temperature of about 400 ° C. or lower.

  In the case of forming using thin film technology, it is necessary to determine the order of formation so that the temperature of each subsequent process is lower so that the process temperature is lower in the subsequent process.

  When the reverse conductivity type region is formed by using a hydrogenated amorphous silicon film, the thickness of the hydrogenated amorphous silicon film is preferably 50 nm or less, and more preferably 20 nm or less.

  When the reverse conductivity type region is formed by using a crystalline silicon film, the thickness of the crystalline silicon film is preferably 500 nm or less, and more preferably 200 nm or less.

  When forming the reverse conductivity type region 114 by the thin film technology, it is effective to improve the characteristics by forming an i-type silicon region (not shown) between the p-type bulk region 115 and the reverse conductivity type region 114 with a thickness of 20 nm or less. It is.

  The p + type region is provided on the opposite side of the light incident surface, and preferably contains a large amount of a p type doping element such as aluminum. This p + -type region (117 in FIG. 12) is also called a BSF (Back Surface Field) region, and plays a role in reducing the rate of recombination loss when photogenerated electron carriers reach the back collector electrode (118 in FIG. 12). The photocurrent density Jsc can be improved. Further, since the minority carrier (electron) density is reduced in this p + type region, the amount of diode current (dark current amount) in the region in contact with the p + type region 117 and the back collector electrode 118 is reduced and opened. The voltage Voc can be improved.

  For the production of the p + -type region, a metal paste is preferably used.

  The metal paste is preferably composed of aluminum powder, an organic vehicle, desirably glass frit.

  In the metal paste, the glass frit content is preferably 0.1 to 5 parts by weight with respect to 100 parts by weight of the aluminum powder.

  In the metal paste, the content of the organic vehicle is preferably 10 to 30 parts by weight with respect to 100 parts by weight of the aluminum powder.

  Examples of the metal paste printing process include screen printing.

  The firing temperature of the metal paste is preferably 600 to 850 ° C., thereby preventing the metal (Al) from diffusing into the silicon substrate and preventing the carriers generated on the back surface from recombining (BSF). Region) can be formed.

The metal doping concentration of the p + -type region 117 is about 1 × 10 ¹⁸ atoms / cm ³ to 1 × 10 ¹⁹ atoms / cm ³ . As a result, a Low-High junction can be formed between the p-type bulk region 115 and the p + -type region 117.

  At this time, the metal component in the paste that is not used for forming the p + type region 117 but remains on the p + type region 117 can be used as it is as a part of the back collector electrode 118. In this case, it is not necessary to remove the remaining components with hydrochloric acid or the like. In this specification, it is assumed that the back surface collecting electrode 118 mainly composed of aluminum remaining on the p + type region 117 is present, but if removed, an alternative electrode material may be formed. As this alternative electrode material, it is desirable to use a silver paste or a silver-based thin film that will be a back surface output electrode 119, which will be described later, in order to increase the reflectance of long-wavelength light reaching the back surface. Note that B (boron) can also be used as the p-type doping element.

  When the p + -type region 117 is formed using the printing and firing method, as already described, the n-type region formed on the back surface side of the substrate at the same time as the formation of the reverse conductivity type region 114 on the front surface side of the substrate is performed. There is no need to remove the region.

Further, the p + -type region 117 (back surface side) can be formed by a thermal diffusion method using a gas instead of the printing and baking method. In this case, it is formed at a temperature of about 800 to 1100 ° C. using BBr ₃ as a diffusion source. At this time, a diffusion barrier such as an oxide film is formed in advance in the reverse conductivity type region 114 (surface side) already formed. Further, when the antireflection film 116 is damaged by this process, this process can be performed before the antireflection film 116 formation process. The doping element concentration is about 1 × 10 ¹⁸ atoms / cm ^{3 to} 5 × 10 ²¹ atoms / cm ³ . As a result, a Low-High junction can be formed between the p-type bulk region 115 and the p + -type region 117.

  Note that the method for forming the p + -type region 117 is not limited to the printing and baking method or the thermal diffusion method using gas, and includes, for example, a hydrogenated amorphous silicon film or a microcrystalline silicon phase using a thin film technique. A crystalline silicon film or the like may be formed at a substrate temperature of about 400 ° C. or lower. In particular, when the pn junction is formed using thin film technology, it is desirable to form the p + -type region 117 using thin film technology. At this time, the film thickness is about 10 to 200 nm. At this time, if an i-type silicon region (not shown) having a thickness of 20 nm or less is formed between the p + -type region 117 and the p-type bulk region 115, it is effective for improving the characteristics. However, in the case of forming using thin film technology, it is desirable to determine the order of formation so that the process temperature is lower in the subsequent process in consideration of the temperature of each process described below.

  Even when the reverse conductivity type region 114 and the p + type region 117 are formed by using thin film technology, the front surface electrode 111, the back surface collecting electrode 118, and the back surface output electrode 119 are formed by a printing method, a sputtering method, a vapor deposition method, or the like. However, the process temperature is set to 400 ° C. or lower in consideration of damage to the thin film layer.

  The photoelectric conversion element of the present invention preferably further has an antireflection film on the semiconductor on the light incident surface side.

As a material of the antireflection film 116, a SiNx film (with a composition ratio (x) having a width centering on Si ₃ N ₄ stoichiometry), a TiO ₂ film, a SiO ₂ film, a MgO film, an ITO film, and a SnO film are used. _Two films, a ZnO film, or the like can be used. The thickness is appropriately selected depending on the material so that a non-reflection condition can be realized with respect to appropriate incident light. Here, if the refractive index of the antireflection film material is n and the wavelength of light to be made non-reflective is λ, (λ / n) / 4 = d is the optimum film thickness of the antireflection film 116. For example, in the case of a commonly used SiNx film (n = about 2), if the wavelength desired to be non-reflective is 600 nm in consideration of the sunlight spectrum characteristics, the film thickness may be about 75 nm.

  As a manufacturing method of the antireflection film 116, a PECVD method, a vapor deposition method, a sputtering method, or the like is used. When the pn junction is formed by a thin film technique, it is formed at a temperature of 400 ° C. or lower. When the surface electrode 111 is not formed by the fire-through method, the antireflection film 116 is patterned with a predetermined pattern in order to form the surface electrode 111. As a patterning method, an etching method (wet or dry) used for a mask such as a resist, or a method in which a mask is formed in advance when the antireflection film 116 is formed and the antireflection film 116 is formed after the mask is removed can be used. On the other hand, in the case of using the so-called fire-through method in which the surface electrode 111 and the reverse conductivity type region 114 are electrically contacted by directly applying and baking the electrode material of the surface electrode 111 on the antireflection film 116, the above patterning is necessary. Absent. This SiNx film has a surface passivation effect when formed, and a bulk passivation effect when the heat treatment is performed thereafter, and has an effect of improving the electric characteristics of the solar cell element together with an antireflection function.

  In the photoelectric conversion element of the present invention, a solder region can be formed on the front electrode 111 and the back electrode by a solder dipping process as necessary. In addition, when it is set as the solderless electrode which does not use a solder material, a solder dipping process is abbreviate | omitted.

  Next, generation of current by the photoelectric conversion element will be described below with reference to FIG.

  When light is incident from the side of the antireflection film 116 that is the light incident surface side of the photoelectric conversion element 11, the semiconductor region 113 is absorbed and photoelectrically converted to generate electron-hole pairs (photogenerated carriers). Due to the photo-excited electron carriers and hole carriers (photo-generated carriers), between the substantially linear surface electrode 111 provided on the front side of the solar cell element 11 and the back-side electrodes 118 and 119 provided on the back side. Photoelectromotive force is generated, and the generated photogenerated carriers are collected by these electrodes and guided to the output terminal. In addition, a diode current (≈dark current) flows in a direction opposite to the photocurrent according to the photoelectromotive force. The semiconductor region 113 includes a reverse conductivity type region 114, a p-type bulk region 115, and a p + type region 117.

  The photoelectric conversion module of the present invention is preferably composed of a photoelectric conversion element.

  The photoelectric conversion module is a module in which a plurality of photoelectric conversion elements are connected in series or in parallel to improve the generated electric output and take out a practical electric output. The photoelectric conversion module can obtain a sufficient electrical output that cannot be obtained with one photoelectric conversion element.

  15 and 29 show the photoelectric conversion module. FIG. 15 is a cross-sectional view showing the structure of a general solar cell module, and FIG. 16 is a top view of the solar cell module of FIG. 15 viewed from the light incident surface side.

  As shown in FIG. 15, the photoelectric conversion module has a surface electrode of an adjacent solar cell element on a transparent member 142 by a front-side filler 144 made of a transparent ethylene vinyl acetate copolymer (EVA) and the like, and a wiring member 141. A plurality of photoelectric conversion elements 11 alternately connected to the back electrode, a back side filler 145 made of EVA, and a back surface protection material in which polyethylene terephthalate (PET) or metal foil is sandwiched between polyvinyl fluoride resins (PVF) It is preferable that 143 are sequentially laminated and further integrated by deaeration, heating and pressing in a laminator.

  It is preferable that the wiring member 141 is usually obtained by covering the entire surface of a copper foil having a thickness of 0.1 to 0.2 mm and a width of about 2 mm with a solder material and then cutting it to a predetermined length.

  An example of the photoelectric conversion module is one in which a plurality of photoelectric conversion elements are electrically connected in series or in parallel.

  In the photoelectric conversion module, when a plurality of photoelectric conversion elements are connected in series, one end of the electrodes of the first element and the last element of the plurality of elements is connected to a terminal box 147 which is an output extraction portion by an output extraction wiring 146. It is preferable that they are connected.

  As shown in FIG. 16, in the photoelectric conversion module, it is preferable to fit a frame 148 made of aluminum or the like around the periphery if necessary.

  In the above description, the case of single junction has been described. However, the present invention can be applied even to a multi-junction type formed by laminating a thin film junction layer made of a semiconductor multilayer film on a junction element using a bulk substrate. .

  In the above description, the bulk type silicon solar cell is taken as an example, but any form can be adopted without departing from the principle and purpose of the invention. That is, a photoelectric conversion element having a pn junction having a crystalline silicon having a light incident surface as a component, and collecting the photogenerated carriers generated in the semiconductor region by light irradiation on the light incident surface as a current Applicable to general photoelectric conversion elements such as photosensors other than batteries.

  Further, the glass layer may contain metal particles that exist without contacting the surface of the semiconductor substrate. In this way, by including metal particles in the glass layer, it becomes [metal electrode-glass layer-metal particle-glass layer-metal particle-semiconductor] as a conduction path, so that low resistance is effectively realized. There is a possibility.

  The present invention will be described in detail based on examples, but the present invention is not limited to the examples.

  A device was manufactured by the following manufacturing method.

  As the polycrystalline silicon substrate, a substrate obtained by slicing a polycrystalline silicon ingot cast by a casting method was used. At this time, the dopant was B (boron) and the specific resistance value was about 2 Ωcm. The substrate thickness was 250 μm.

  Next, in making the device, the device was manufactured in accordance with the contents described in the above-described optimum embodiment. In the formation of the surface irregularities and the surface electrode of the polycrystalline silicon substrate according to the present invention, the following is performed. Was carried out under various conditions.

First, surface irregularities are formed using the RIE method, and based on the appropriate etching conditions determined in advance, the etching time and the gas flow rate are mainly used as parameters, and each experimental condition shown in Table 1 and Table 2 is supported. An uneven shape was formed. As RIE conditions, chlorine gas (Cl ₂ ), oxygen gas (O ₂ ), and sulfur hexafluoride gas (SF ₆ ) are mixed in the etching chamber so that the volume ratio is about 1: 5: 5. Then, the etching process was performed for about 5 minutes by setting the reactive gas pressure to about 7 Pa and the RF power density for applying plasma to about 5 kW / m ² .

Further, after the surface irregularities were formed, the reverse conductivity type region 114 was formed by a thermal diffusion method using POCl ₃ as a diffusion source.

  Next, the surface electrode was formed by a method of printing and baking Ag paste. At this time, the same material was used for the Ag paste in all experimental conditions, and the printing conditions were the same (in Ag paste, the content of glass frit was 2 parts by weight with respect to 100 parts by weight of Ag, and the content of organic vehicle with respect to 100 parts by weight of Ag. 20 parts by weight). RTP treatment is performed using an IR firing furnace using an IR (near infrared) lamp. Regarding firing conditions, the thickness of the glass layer formed at the electrode / Si interface due to firing becomes extremely thick or insufficient. The conditions not to be used are obtained in advance for the case where the substrate obtained under the reference etching conditions in the RIE method is used for elementization (calculating in advance a firing condition that provides good FF characteristics), and this is used as a reference condition. Applied to all experimental conditions. The experimental conditions were a temperature increase rate of 35 ° C./second, a temperature decrease rate of 37 ° C./second, and a firing peak temperature of 750 ° C.

  Further, in the formation of the antireflection film 116 prior to the formation of the surface electrode, a SiNx film having a thickness of about 75 nm was formed using the PECVD method. Further, as shown in FIG. 14, the back electrodes (the back collector electrode 118 and the back output electrode 119) were formed by printing and baking Al paste and Ag paste, respectively. Further, the p + -type region 117 was formed by printing and baking Al paste.

  Next, with respect to the element obtained above, the element characteristics were measured, and the contact resistance between the front Ag electrode and the silicon interface was measured.

  The element characteristic measured the VI characteristic on AM1.5 conditions using a solar simulator, and calculated | required various characteristics of the short circuit current density Jsc, the open circuit voltage Voc, and the fill factor FF from this.

  In measuring the contact resistance, a strip-shaped measurement sample having a width of about 10 mm was prepared by cutting the element in a direction perpendicular to the finger electrode direction, and the following procedures (1) to (6) were performed.

(1) For a plurality of finger electrodes on a strip-shaped sample, select one finger electrode for which contact resistance is to be evaluated.

(2) The resistance between the selected finger electrode and the adjacent finger electrode (first adjacent finger electrode) is measured.

(3) The resistance between the selected finger electrode and a finger electrode (second adjacent finger electrode) that is not the finger electrode described above among the finger electrodes adjacent to the first adjacent finger electrode is measured.

(4) The above measurement is repeated up to the nth adjacent finger electrode.

(5) About the inter-finger electrode resistance value and finger electrode distance obtained above, the inter-finger electrode resistance value Rms × the strip sample width W (W: the length of the finger electrode on the strip sample) is taken as the Y axis. Then, the distance L between the finger electrodes was plotted with the X axis, and the Y intercept of the approximate straight line of the plotted point sequence was obtained. This Y intercept gives m × ρc / Dc. Here, m is a constant, ρc is contact resistance, and Dc is the width of the contact surface, which can be replaced with the line width Wf of the normal finger electrode. At this time, the constant m is 2 when the Ag electrode / Si is in ohmic contact, and 1 when it is rectifying contact (Schottky contact). Empirically, when m = 1, there is a tendency to be consistent with various experimental results. In the description of the present invention, m = 1 will be described below.

(6) The contact resistance ρc (unit: [Ωcm ² ]) is obtained by ρc = Y intercept × Dc.

  As described in the above (1) to (6), the contact resistance can be measured at an arbitrary position in the cell plane. Actually, the measurement was performed in a measurement point range of 20 points (4 rows × 5 columns) distributed almost evenly in the element surface, and the average value was changed to the contact resistance evaluation value ρc of the element (hereinafter, especially, it was refused). Unless indicated otherwise, ρc is the contact resistance evaluation value of this element).

The contact resistance ρc [Ωcm ² ] affects the element characteristics as a surface series resistance [Ωcm ² ] component of r_cnt = (ρc / Dc) × (Dp−Wf) in the case of an element (hereinafter r_cnt originates from the contact resistance) This is referred to as the element equivalent surface series resistance. Here, Dc: contact width (described above), Dp: finger electrode pitch, Wf: finger electrode width, and as described above, it may normally be regarded as Dc≈Wf. When the element area is S, the series resistance component resulting from the contact resistance of this element is written as r_cnt / S [Ω].

Here, when the element surface series resistance (hereinafter simply referred to as element surface series resistance) as an element total including the element converted surface series resistance originating from the contact resistance and all other components is rs [Ωcm ² ], When the series resistance of the element when the element area is S is Rs, Rs = rs / S [Ω] can be written. Since Rs can be calculated by a known method from the VI characteristics (bright and dark characteristics, or simply dark characteristics) of the element, rs can be obtained.

Table 1 shows the relationship among the contact resistance ρc, the element equivalent surface series resistance r_cnt originating from the contact resistance, the element surface series resistance rs, and the element characteristics in the experimental conditions 1 to 10 determined as described above.

  7 shows the relationship between ρc and FF characteristics, FIG. 8 shows the relationship between rs and FF characteristics, and FIG. 9 shows the relationship between ρc and rs. In the measurement method, rs indicates the average value of the entire element, whereas ρc and r_cnt are represented by the average value of the measured values in a partial area in the element plane. Such quantitative relationships are often difficult. However, as shown in FIGS. 7 to 9, a proportional relationship is recognized between the two, and there is no practical trouble in discussing the relationship between the contact resistance and the characteristics.

  7, 8 and 9, a linear inverse proportionality or proportionality is confirmed in any case. As a result, it is clear that the contact resistance of the surface electrode part affects the element characteristics as one of the main components of the series resistance component.

Next, structural analysis was performed on the contact resistance measurement point having the value closest to the contact resistance evaluation value by TEM observation of the surface electrode / silicon interface. In the structural analysis, pay attention to the glass layer thickness t, silver particle thickness m, silver particle length n, uneven height o, and uneven pitch length p from the TEM photograph. And read the value. As a TEM photograph for analysis, a photograph taken at a magnification such that the maximum photograph length was about 5 μm was used. FIG. 10 shows TEM photographs of experimental conditions 9, 7, and 4 and FIGS. 11-1 to 11-4 under experimental conditions 1, 5, 8, and 10, respectively. Table 2 summarizes the cross-sectional TEM observation results and the contact resistance evaluation results.

  The thickness of the glass layer is the maximum value of the length of the glass layer in the direction perpendicular to the semiconductor main surface of the semiconductor, and the thickness of the metal particles is the direction perpendicular to the main surface of the semiconductor substrate. The maximum value among the lengths of metal particles in the above, the length particle size of the metal particles is the maximum value among the lengths of metal particles in the direction parallel to the main surface of the semiconductor substrate, and the height of the irregularities is the substrate of the semiconductor The maximum value of the height difference between the apex of the adjacent convex part and the bottom point of the concave part in the direction perpendicular to the main surface, the length of the concave and convex pitch, in the direction parallel to the main surface of the semiconductor substrate, The maximum value among the lengths between the vertices of adjacent convex portions.

  FIG. 3 shows a plot of the relationship between the contact resistance evaluation value and the silver particle thickness m / glass layer thickness t (m / t). A very clear inverse relationship is evident. It can also be seen that when m / t is smaller than about 0.5, the contact resistance value rapidly increases. That is, to realize a sufficiently small contact resistance, m / t needs to be 0.5 or more, preferably 0.6 or more, more preferably 0.7 or more.

  FIG. 5 shows the relationship between the contact resistance evaluation value and the length of silver particles / the thickness of the glass layer (n / t). It is clear that the contact resistance evaluation value and the silver length particle size / glass layer thickness (n / t) have an inversely proportional relationship. It can also be seen that when n / t is smaller than about 1.0, the contact resistance value rapidly increases. That is, it is understood that n / t needs to be 1.0 or more, and preferably 2.0 or more in order to realize a sufficiently small contact resistance.

  FIG. 4 is a graph showing the relationship between the contact resistance evaluation value and the height of the unevenness / the thickness of the glass layer (o / t). Again, a clear inverse relationship is evident. It can also be seen that the contact resistance value increases abruptly when o / t is less than about 0.25. That is, in order to realize a sufficiently small contact resistance, it is necessary to set o / t to 0.25 or more, preferably 0.5 or more.

  Further, FIG. 6 shows the relationship between the contact resistance evaluation value and the length of the uneven pitch / the thickness of the glass layer (p / t). It is clear that there is an inverse relationship between the contact resistance and the ratio between the length of the uneven pitch and the thickness of the glass layer. It can also be seen that when the p / t is smaller than about 1.5, the contact resistance value rapidly increases. That is, in order to realize a sufficiently small contact resistance, p / t needs to be 1.5 or more, and preferably 2.0 or more.

  As described above, it is possible to realize a sufficiently low contact resistance by controlling the thickness of the glass layer and the uneven structure obtained by RIE, and to realize a high-performance photoelectric conversion element and photoelectric conversion module. It has been shown.

FIG. 3 is a diagram showing a metal electrode / semiconductor interface structure according to the present invention, using a surface electrode / crystalline Si as an example. It is a local enlarged view of FIG. It is a figure which shows the relationship between contact resistance and the thickness particle size of precipitation silver particle / thickness of a glass layer. It is a figure which shows the relationship between contact resistance and the height of the unevenness | corrugation of a semiconductor substrate / thickness of a glass layer. It is a figure which shows the relationship between contact resistance and the length particle size of precipitation silver particle / thickness of a glass layer. It is a figure which shows the relationship between contact resistance and the height of the unevenness | corrugation of a semiconductor substrate / thickness of a glass layer. It is a figure which shows the relationship between (rho) c and FF characteristic. It is a figure which shows the relationship between rs and FF characteristic. It is a figure which shows the relationship between (rho) c and rs. FIG. 4 is a TEM photograph of a cross section under (a) experimental condition 9, (b) experimental condition 7, and (c) experimental condition 4, respectively. 4 is a TEM photograph of a cross section under experimental condition 1. 10 is a TEM photograph of a cross section under experimental condition 5. 10 is a TEM photograph of a cross section under experimental condition 8. 4 is a TEM photograph of a cross section under experimental condition 10. It is sectional drawing which shows an example of the structure of the photoelectric conversion element of this invention. FIG. 13 is a top view showing an example in which the electrode shape of the photoelectric conversion element of FIG. 12 is viewed from the light incident surface side. It is a bottom view which shows an example which looked at the electrode shape of the photoelectric conversion element of FIG. 12 from the back surface side. It is sectional drawing which shows an example of the structure of the photoelectric conversion module of this invention. It is the top view which looked at the photoelectric conversion module of FIG. 15 from the light-incidence surface side.

Explanation of symbols

111 surface electrode 111a bus bar electrode 111b finger electrode 113 semiconductor 114 reverse conductivity type region 115 p type bulk region 116 antireflection film 117 p + type region 118 back surface collecting electrode 119 back surface output electrode 11 solar cell element (photoelectric conversion element)
141 Wiring member 142 Transparent member 143 Back surface protective material 144 Front side filling material 145 Back side filling material 146 Output extraction wiring 147 Terminal box 148 Frame H Heating heater / heat insulation member

Claims (6)

A semiconductor substrate having irregularities formed on the surface;
A metal electrode formed on the irregularities on the surface of the semiconductor substrate;
A glass layer present in at least a part of the interface between the semiconductor substrate surface and the metal electrode;
A photoelectric conversion element having a metal particle in the glass layer and present along the recess on the surface of the semiconductor substrate and partially protruding from the recess ,
The thickness t of the glass layer, the thickness particle size m of the metal particles, the length particle size n of the metal particles, the height o of the unevenness, and the length p of the pitch of the unevenness satisfy the following relationship: A photoelectric conversion element characterized by the above.
m / t ≧ 0.5, n / t ≧ 1, o / t ≧ 0.25, p / t ≧ 1.5
(150 nm ≦ t ≦ 400 nm, m ≦ 330 nm, n ≦ 800 nm, o ≦ 300 nm, p ≦ 800 nm) The glass layer is composed of a microcrystalline layer, and the thickness particle diameter m of the metal particles, the length particle diameter n of the metal particles, the height o of the unevenness, and the length p of the unevenness pitch are the photoelectric conversion device according to claim 1 which satisfies the following relationship.
(M ≧ 150 nm, n ≧ 480 nm, o ≧ 70 nm, p ≧ 500 nm) The photoelectric conversion element according to claim 1, wherein the microcrystalline layer is disposed in contact with the semiconductor substrate, and an amorphous layer is disposed on the microcrystalline layer. The photoelectric conversion device according to any one of claims 1 to 3 wherein the metal electrode is a silver (Ag) electrode. It said semiconductor substrate is a photoelectric conversion device according to any one of constituted claims 1 to 4 from crystalline silicon (Si). The photoelectric conversion module comprised from the photoelectric conversion element in any one of Claims 1 thru | or 5 .

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