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JP4629284B2 - Semiconductor device and manufacturing method thereof - Google Patents

Semiconductor device and manufacturing method thereof Download PDF

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Publication number
JP4629284B2
JP4629284B2 JP2001273738A JP2001273738A JP4629284B2 JP 4629284 B2 JP4629284 B2 JP 4629284B2 JP 2001273738 A JP2001273738 A JP 2001273738A JP 2001273738 A JP2001273738 A JP 2001273738A JP 4629284 B2 JP4629284 B2 JP 4629284B2
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JP
Japan
Prior art keywords
substrate
wire
semiconductor chip
metal wire
bonding
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Expired - Fee Related
Application number
JP2001273738A
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Japanese (ja)
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JP2003086621A (en
Inventor
良彦 牟田口
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Rohm Co Ltd
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Rohm Co Ltd
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Publication of JP2003086621A publication Critical patent/JP2003086621A/en
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Publication of JP4629284B2 publication Critical patent/JP4629284B2/en
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    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]

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Description

【0001】
【発明の属する技術分野】
この発明は、基板と半導体チップとが金属細線により接続された半導体装置およびその製造方法に関する。
【0002】
【従来の技術】
半導体チップと金属配線部等を有する基板とを電気的に接続する方法の一つに、ワイヤボンディング法がある。
ワイヤボンディング法においては、基板と半導体チップを金属細線で接続することによって、それらの間の電気接続が達成される。ワイヤボンディング装置には、金属細線を送出および圧接するためのキャピラリが備えられている。このキャピラリは、水平に載置された基板に対して近接するように下降したり、基板から離反するように上昇したり、基板と水平に移動したりして、基板と半導体チップとの間を金属細線で接続する。
【0003】
図4は、一般的なワイヤボンディング法を用いて、半導体チップと基板とを接続した半導体装置の図解的な側面図である。
半導体チップ12は、基板11上に接着剤19によって固定されている。一般的なワイヤボンディングは、金属細線18の一端15を半導体チップ12側に接続する第1接続と、金属細線の他端17を基板11側に接続する第2接続とを含む。
【0004】
半導体チップ12側に金属細線18を圧接する前に、金属細線18の先端部15は、キャピラリ先端による圧接の都合上、球状に加工される。金属細線18の他端17は、金属細線18を切断する前にキャピラリで配線部14に圧接できるので、球状加工は不要である。
接続後、金属細線18は、弧状のワイヤループ18aを形成する。半導体チップ12の電極パッド13と金属細線18の先端部15との接続面からワイヤループ18aの頂点までの高さは、ループ高さ18bと呼ばれる。
【0005】
通常のワイヤボンディングでは、ループ高さ18bが高くなってしまい、金属細線18が基板11に水平な方向に湾曲し易くなる。そのため、近接したワイヤ同士が接近する、カールと呼ばれる現象が生じ、半導体チップ12と基板11との間の電気接続が不安定になる場合がある。
そこで、ループ高さ18aを低く抑えて、カールを防止するために、逆ワイヤボンディング法が開発されている。
【0006】
図5は、逆ワイヤボンディング法により、半導体チップと基板とを電気的に接続した半導体装置の図解的な側面図である。
逆ワイヤボンディング法は、金属細線18の先端部15を基板11側と接続する第1接続と、金属細線18の他端17を半導体チップ12側に接続する第2接続とを含む。金属細線18の先端部15は、球状に加工されるが、金属細線18の他端17は、特に加工を施されない。
【0007】
この逆ワイヤボンディング法では、半導体チップ12の上面から金属細線18が垂直に立ち上がらないので、通常のワイヤボンディング法と比較して、ループ高さ18bを低く抑えることができる。したがって、カールを防止できる。
【0008】
【発明が解決しようとする課題】
ところが、逆ワイヤボンディング法では、第1接続は、金属細線18の先端部15を球状にしてから基板11と接続するボールボンディングとなる。このボールボンディングは、金属細線18に球状加工をしないで接続を行うステッチボンディングに比較して、密着力が低い。
一方、基板11は、製造プロセスなどの熱履歴による影響を受けやすいので、ボールボンディング部である先端部15は、基板11の配線部14から剥がれやすいという問題がある。
【0009】
図6は、ボンディング面積の違いによるボンディングパワーの伝わり方の違いを概念的に表した断面図である。図6(a)は、キャピラリ先端部10から送出される金属細線18を、基板11上に形成された配線部14にステッチボンディングする様子を示し、図6(b)は、キャピラリ先端部10から送出される金属細線18を、基板11上に形成された配線部14にボールボンディングする様子を示す。
【0010】
ボンディング面積とは、金属細線18と配線部14との接触部の面積である。
キャピラリからの圧接力(ボンディングパワー)は、このボンディング面積の全域に分散する。そのため、ボンディング面積が小さい方が単位面積当たりのボンディングパワーが大きくなり、強い密着力が得られる。
図6(a),(b)の比較から明らかなように、ボールボンディングの場合のボンディング面積90は、ステッチボンディングの場合のボンディング面積80よりもはるかに大きい。したがって、ボールボンディングの場合、ボンディングパワーが大面積に分散し、ボンディング強度が弱くなる。そのため、基板11側にボールボンディングを施す逆ワイヤボンディング法の場合、金属細線18が基板11上の配線部14から剥がれやすくなるのである。
【0011】
そこで、本発明の目的は、前述の技術的課題を解決し、基板と半導体装置との接続安定性に優れた半導体装置およびその製造方法を提供することである。
【0012】
【課題を解決するための手段および発明の効果】
上記の目的を達成するための請求項1記載の発明は、基板(1)と、表面に電極パッド(3)を備えた半導体チップ(2)と、上記基板(1)上の第1の位置にボールボンディングされた先端部(5)、上記基板(1)上の上記第1の位置とは異なる第2の位置にステッチボンディングされた途中部(6)、および上記半導体チップ(2)の電極パッド(3)上にステッチボンディングされた終端部(7)を有する金属細線(8)とを含み、上記第2の位置は、上記第1の位置よりも、上記半導体チップ(2)から遠い位置であることを特徴とする半導体装置である。なお、括弧内の数字は後述の実施形態における対応構成要素等を表す。以下この項において同じ。
【0013】
上記の構成によれば、1本の金属細線の先端部と途中部と終端部との3点を使って、半導体チップと基板とが接続される。
3点の接続のうち、金属細線の先端部はボールボンディングで基板上の第1の位置に圧接され、金属細線の途中部は、基板上の第1の位置とは異なる第2の位置にステッチボンディングされている。よって、位置および接続方式の異なる2点の接続が基板上で行われているので、接続安定性に優れており、金属細線と基板との電気接続が断たれるおそれはない。
【0014】
また、半導体チップ表面の電極パッド上には金属細線の終端部がステッチボンディングされているので、半導体チップと基板との間の安定な電気接続を実現することができる。
請求項2記載の発明は、基板(1)上の第1の位置に金属細線(8)の先端部(5)を接続する第1工程と、この第1工程の後に、上記基板(1)上の上記第1の位置とは異なる第2の位置に上記金属細線(8)の途中部(6)を接続する第2工程と、この第2工程の後に、半導体チップ(2)表面の電極パッド(3)上に上記金属細線(8)の終端部(7)を接続する第3工程とを含み、上記第2工程は、上記第2の位置が、上記第1の位置よりも上記半導体チップ(2)から遠い位置となるように上記金属細線(8)の上記途中部(6)を接続する工程を含むことを特徴とする半導体装置の製造方法である。
【0015】
上記の構成によれば、金属細線を基板側に先に接続し(第1工程、第2工程)、その後に当該金属細線を半導体チップ側に接続(第3工程)するので、逆ワイヤボンディングによる低ループのワイヤボンディングが実現可能である。したがって、カールの起こらない電気接続安定性に優れた半導体装置を提供することができる。
また、基板上の第1の位置に金属細線の先端部を接続し、その後に、基板上の第1の位置とは異なる第2の位置に金属細線の途中部を接続するため、基板側の接続安定性の向上が達成される。
【0016】
請求項3記載の発明は、上記第1工程は、上記金属細線(8)の先端部(5)に球状部を形成し、この球状部を上記基板(1)上の第1の位置に圧接するボールボンディングを含み、上記第2工程は、上記金属細線(8)の途中部(6)を上記基板(1)上の第2の位置に圧接するステッチボンディングを含み、上記第3工程は、上記金属細線(8)の終端部(7)を上記半導体チップ(2)表面の電極パッド(3)上に圧接するステッチボンディングを含むことを特徴とする請求項2記載の半導体装置の製造方法である。
【0017】
上記の構成により、第1工程において、基板側にボールボンディングによる金属細線先端部の圧接を施し、第2工程において、基板側にステッチボンディングによる金属細線途中部の圧接を行うことにより、基板側での接続安定性が向上する。また、半導体チップ上の電極パッドに、ステッチボンディングによって金属細線終端部の圧接を施すため、低ループの接続がなされて、電気接続安定性の向上が達成される。
【0018】
上記第2の位置は、上記第1の位置よりも半導体チップから遠い位置である。これにより、金属細線の途中部と終端部との間のワイヤループ形状を安定化できる。
【0019】
【発明の実施の形態】
以下では、この発明の実施の形態を、添付図面を参照して詳細に説明する。
図1は、この発明の一実施形態に係る半導体装置の図解的な側面図である。
基板1上に半導体チップ2が接着剤9により固定されている。基板1上の別の領域には、金属で配線部4が形成されており、基板1の配線部4と半導体チップ2表面の電極パッド3とは、金属細線8を介して電気接続されている。
【0020】
金属細線8の先端部5は、その先端部5を球状に加工した後、基板1上の第1の位置P1に圧接されて形成されたボールボンディング部である。そして、金属細線8の途中部6は、基板1上の第1の位置P1とは異なる第2の位置P2にステッチボンディングされている。上記第1の位置P1および第2の位置P2は、いずれも配線部4上であることが好ましい。ワイヤループ8a(とくに途中部6と電極パッド3との間)の形状安定化のためには、上記第2の位置P2は、第1の位置P1よりも、半導体チップ2から遠い位置であるほうがよい。金属細線8の終端部7は、半導体チップ2表面の電極パッド3上にステッチボンディングされている。
【0021】
金属細線8の先端部5と途中部6との間、および途中部6と終端部7との間には、それぞれ金属細線8で形成されたワイヤループ8aが存在する。逆ワイヤボンディング法を基本にした接続であるので、金属細線8の途中部6と終端部7との間のループ高さ8bは、通常のワイヤボンディングに比較して、低くなっている。
上記基板1には、無機材料から高分子材料まで幅広い材料が使用可能である。
基板1は、プリント配線板であってもよい。上記金属細線8は、電気伝導性の良い金属を使用することが好ましい。詳細には、Au細線を使用することが好ましい。金属細線としては、一般的にはAlやCuやAuなどが使用されるが、これらの中でもAuは特に電気伝導性に優れ、雰囲気中の水分等で腐食されない金属であるため、金属細線材料としての安定性及び信頼性が最も高い。
【0022】
この実施形態に係る半導体装置では、基板1上の配線部4と金属細線8との接続を2箇所で実施することにより、基板1側でのボンディング強度が向上する。基板1に圧接されたボールボンディング部は、通常、製造工程での熱影響を受けて、剥がれやすいが、密着力の強いステッチボンディングを配線部4に追加で実施することにより、電気接続の安定性が確保されている。
金属細線8の終端部7は、半導体チップ2表面の電極パッド3上にステッチボンディングにより圧接されている。よって、半導体チップ2側の接続信頼性は十分である。
【0023】
図2(a)〜(d)および図3(e)〜(g)は、上記半導体装置の製造工程を工程順に示す模式的な側面図である。
金属細線8を使って、基板1と半導体チップ2とを電気接続するために、ワイヤボンディング装置が用いられる。この装置には、金属細線8を送出および圧接するためのキャピラリ20が備えられている。このキャピラリ20は、基板1と半導体チップ2との間を金属細線8で接続するために、基板1に平行な方向である水平方向と基板1に接離する方向である垂直方向とに移動することが可能である。
【0024】
配線部4が形成され、かつ、半導体チップ2が接着剤9等により固定された状態の基板1は、ワイヤボンディング装置内に水平に置かれる。基板1から上方に離れた位置でキャピラリ20が待機しており、キャピラリ20を通って、キャピラリ先端部へと金属細線8が送出可能である。
まず、キャピラリ20先端部から金属細線8が若干量突出させられ、その先端部5が、電気トーチ等を用いて球状に加工される。この球状先端部5を保持したキャピラリ20が、上方から基板1に接近する方向20aへ移動する(図2(a))。
【0025】
キャピラリ20が基板1にさらに接近すると、キャピラリ20の先端部から突出している金属細線8の先端部5と配線部4とが接触する。このとき、キャピラリ20から荷重(さらに必要に応じて熱および/または超音波振動)が加えられ、球状先端部5は、配線部4に圧接されて、配線部4の第1の位置P1に接合される。この接続は、金属細線8の先端部5を球状に加工して接続したボールボンディングである(図2(b))。
【0026】
第1の位置P1への接合が終了した後、キャピラリ20は基板1から垂直上方に離反する方向20bへ移動する。それに伴って金属細線8が送出される(図2(c))。所定長の金属細線8が送出されると、キャピラリ20は上方向20bへの動きを止める。
次に、キャピラリ20は基板1に対して第1の位置P1とは別の第2の位置P2に接続を行うために、水平方向20c(この実施形態では、半導体チップ2から遠ざかる方向)に移動をはじめる。
【0027】
キャピラリ20の移動に伴って、再び金属細線8が送出される。所定長の金属細線8を送出し、水平方向20cに所定距離移動した後、キャピラリ20は、水平方向20cへの移動と金属細線8の送出を止め、次に基板1に向かって垂直に接近する方向20aに移動方向を変える。このとき、キャピラリ20の動きに合わせて金属細線8が送出される。キャピラリ20は、基板1に接近する鉛直下方20aへの移動を続け、基板1と金属細線8が接触するまで基板1に向かって下降する。金属細線8と基板1とが接触したところで、キャピラリ20は、金属細線8の途中部6を配線部4に圧接し、第2の位置P2で接合する。
【0028】
第2の位置P2は、第1の位置P1よりも半導体チップ2から遠い配線部4上であることが好ましい。第2の位置P2への接続が終了した時点で、第1の位置P1と第2の位置P2との間に1つのワイヤループ8aが形成されている。
金属細線8の途中部6を使った第2の位置P2への接続は、ステッチボンディングであり、これにより、接続安定性が向上する(図2(d))。
第2の位置P2への接続後、再びキャピラリ20が基板1に対して垂直上方に離反する方向20bに、金属細線8を送出しながら移動する。キャピラリ20が所定距離移動し、所定長の金属細線8が送出されると、キャピラリ20は垂直上方20bへの動きを止める(図3(e))。
【0029】
さらにその後、キャピラリ20は、半導体チップ2表面の電極パッド3と金属細線8とを接続するため、水平方向20d(半導体チップ2に近づく方向)に移動をはじめる。このキャピラリ20の移動に伴って、再び金属細線8が送出される。所定長の金属細線8を送出し、水平方向20dに所定距離移動した後、キャピラリ20は水平方向20dへの移動と金属細線8の送出とを止め、半導体チップ2に向かって垂直に接近する方向20aに移動方向を変え、キャピラリ20の動きに合わせて金属細線8が再び送出される。
【0030】
キャピラリ20は、さらに半導体チップ2に接近する鉛直下方20aへの移動を続け、半導体チップ2の電極パッド3と金属細線8とが接触するまで半導体チップ2に向かって下降し、金属細線8と半導体チップ2の電極パッド3が接触したところで、金属細線8の終端部7を電極パッド3に圧接してステッチボンディングする。したがって、第2の位置P2と電極パッド3との間にも1つのワイヤループ8aが形成される。また、逆ワイヤボンディングとなるので、低ループのボンディングが実現できる(図3(f))。
【0031】
最後に、キャピラリ20から若干金属細線8を送出して、金属細線8を電極パッド3の近傍位置でクランプ等を用いて切断する。その後、キャピラリ20は上方へ退避し、1本のワイヤボンディング接続工程が完了する(図3(g))。
以上、この発明の一実施形態について説明したが、この発明は、他の形態で実施することもできる。
たとえば、上述の実施形態では、基板1上に形成された配線部4と金属細線8との2箇所の接続部のうち、第2の位置P2が、第1の位置P1よりも半導体チップ2に遠い位置である場合を例に挙げて説明したが、第2の位置P2は、第1の位置P1よりも半導体チップ2に近い位置であってもよいし、第1の位置P1および第2の位置P2は、半導体チップ2から等距離の位置にあってもよい。また、基板1と金属細線8との接合は、2箇所に限定するものではなく、接合点を3箇所以上にしてもよい。
【0032】
また、上記の実施形態では、絶縁材料の基板1上に配線部4が形成された例について説明したが、基板としてリードフレーム等の金属基板を適用してもよい。
その他、特許請求の範囲に記載された事項の範囲で種々の設計変更を施すことが可能である。
【図面の簡単な説明】
【図1】本発明の一実施形態に係る半導体装置の図解的な側面図である。
【図2】図1の半導体装置の製造工程を工程順に示す模式的な側面図である。
【図3】図2に続く工程を工程順に示す模式的な側面図である。
【図4】従来のワイヤボンディング法による接続構造を示す図解的な側面図である
【図5】逆ワイヤボンディング法による接続構造を示す図解的な側面図である。
【図6】ボンディング面積の相違によるボンディングパワーの伝播の違いを概念的に表した断面図である。
【符号の説明】
1 基板
2 半導体チップ
3 電極パッド
4 配線部
5 先端部
6 途中部
7 終端部
8 金属細線
8a ワイヤループ
9 接着剤
20 キャピラリ
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device in which a substrate and a semiconductor chip are connected by a thin metal wire, and a manufacturing method thereof.
[0002]
[Prior art]
One method for electrically connecting a semiconductor chip and a substrate having a metal wiring portion or the like is a wire bonding method.
In the wire bonding method, an electrical connection between the substrate and the semiconductor chip is achieved by connecting the substrate and the semiconductor chip with a fine metal wire. The wire bonding apparatus is provided with a capillary for feeding and press-contacting a fine metal wire. The capillary is lowered so as to be close to a horizontally mounted substrate, is lifted away from the substrate, or moved horizontally with respect to the substrate, so that the gap between the substrate and the semiconductor chip is reduced. Connect with fine metal wires.
[0003]
FIG. 4 is a schematic side view of a semiconductor device in which a semiconductor chip and a substrate are connected using a general wire bonding method.
The semiconductor chip 12 is fixed on the substrate 11 with an adhesive 19. General wire bonding includes a first connection that connects one end 15 of the fine metal wire 18 to the semiconductor chip 12 side, and a second connection that connects the other end 17 of the fine metal wire to the substrate 11 side.
[0004]
Before the metal thin wire 18 is pressed against the semiconductor chip 12 side, the tip 15 of the metal thin wire 18 is processed into a spherical shape for the convenience of pressure contact by the capillary tip. Since the other end 17 of the fine metal wire 18 can be pressed against the wiring part 14 with a capillary before cutting the fine metal wire 18, spherical processing is not necessary.
After the connection, the fine metal wire 18 forms an arc-shaped wire loop 18a. The height from the connection surface between the electrode pad 13 of the semiconductor chip 12 and the tip 15 of the thin metal wire 18 to the apex of the wire loop 18a is called the loop height 18b.
[0005]
In normal wire bonding, the loop height 18 b is increased, and the fine metal wires 18 are easily bent in a direction horizontal to the substrate 11. For this reason, a phenomenon called curl occurs in which adjacent wires approach each other, and the electrical connection between the semiconductor chip 12 and the substrate 11 may become unstable.
Therefore, in order to keep the loop height 18a low and prevent curling, a reverse wire bonding method has been developed.
[0006]
FIG. 5 is a schematic side view of a semiconductor device in which a semiconductor chip and a substrate are electrically connected by a reverse wire bonding method.
The reverse wire bonding method includes a first connection that connects the tip 15 of the metal thin wire 18 to the substrate 11 side, and a second connection that connects the other end 17 of the metal thin wire 18 to the semiconductor chip 12 side. The tip 15 of the fine metal wire 18 is processed into a spherical shape, but the other end 17 of the fine metal wire 18 is not particularly processed.
[0007]
In this reverse wire bonding method, since the fine metal wires 18 do not rise vertically from the upper surface of the semiconductor chip 12, the loop height 18b can be kept low compared to the normal wire bonding method. Therefore, curling can be prevented.
[0008]
[Problems to be solved by the invention]
However, in the reverse wire bonding method, the first connection is ball bonding in which the tip 15 of the fine metal wire 18 is made spherical and then connected to the substrate 11. This ball bonding has a lower adhesion than the stitch bonding in which the fine metal wires 18 are connected without spherical processing.
On the other hand, since the substrate 11 is easily affected by a thermal history such as a manufacturing process, there is a problem that the tip portion 15 which is a ball bonding portion is easily peeled off from the wiring portion 14 of the substrate 11.
[0009]
FIG. 6 is a cross-sectional view conceptually showing a difference in how the bonding power is transmitted due to a difference in bonding area. 6A shows a state in which the fine metal wire 18 delivered from the capillary tip 10 is stitch-bonded to the wiring part 14 formed on the substrate 11, and FIG. A state in which the fine metal wire 18 to be delivered is ball bonded to the wiring portion 14 formed on the substrate 11 is shown.
[0010]
The bonding area is the area of the contact portion between the fine metal wire 18 and the wiring portion 14.
The pressure contact force (bonding power) from the capillary is dispersed over the entire bonding area. Therefore, the smaller the bonding area, the larger the bonding power per unit area, and the stronger adhesion can be obtained.
As is apparent from the comparison between FIGS. 6A and 6B, the bonding area 90 in the case of ball bonding is much larger than the bonding area 80 in the case of stitch bonding. Therefore, in the case of ball bonding, the bonding power is dispersed over a large area, and the bonding strength is weakened. Therefore, in the case of the reverse wire bonding method in which ball bonding is performed on the substrate 11 side, the thin metal wires 18 are easily peeled off from the wiring portion 14 on the substrate 11.
[0011]
SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to solve the above-described technical problems and provide a semiconductor device excellent in connection stability between a substrate and a semiconductor device and a method for manufacturing the same.
[0012]
[Means for Solving the Problems and Effects of the Invention]
In order to achieve the above object, the invention according to claim 1 includes a substrate (1), a semiconductor chip (2) having an electrode pad (3) on the surface, and a first position on the substrate (1). A tip portion (5) ball-bonded to the substrate, an intermediate portion (6) stitch-bonded to a second position different from the first position on the substrate (1), and an electrode of the semiconductor chip (2) pad (3) seen containing a metal fine wire (8) having stitch bonded end portion (7) on, the second position, the than the first position, away from the semiconductor chip (2) The semiconductor device is characterized by being a position . The numbers in parentheses indicate corresponding components in the embodiments described later. The same shall apply hereinafter in this section.
[0013]
According to said structure, a semiconductor chip and a board | substrate are connected using three points, the front-end | tip part of one metal thin wire | line, the middle part, and the termination | terminus part.
Of the three connections, the tip of the fine metal wire is pressed into contact with the first position on the substrate by ball bonding, and the middle portion of the fine metal wire is stitched at a second position different from the first position on the substrate. Bonded. Therefore, since connection at two points with different positions and connection methods is performed on the substrate, the connection stability is excellent, and there is no possibility that the electrical connection between the fine metal wire and the substrate is broken.
[0014]
Further, since the terminal end of the fine metal wire is stitch-bonded on the electrode pad on the surface of the semiconductor chip, stable electrical connection between the semiconductor chip and the substrate can be realized.
According to the second aspect of the present invention, there is provided a first step of connecting the tip (5) of the thin metal wire (8) to a first position on the substrate (1), and the substrate (1) after the first step. A second step of connecting the middle portion (6) of the fine metal wire (8) to a second position different from the first position above, and an electrode on the surface of the semiconductor chip (2) after the second step look including a third step of connecting the end portion of the thin metal wire on the pad (3) (8) (7), the second step, the second position, the than the first position A method for manufacturing a semiconductor device, comprising a step of connecting the intermediate portion (6) of the thin metal wire (8) so as to be located far from the semiconductor chip (2) .
[0015]
According to the above configuration, the fine metal wire is connected to the substrate side first (first step, second step), and then the fine metal wire is connected to the semiconductor chip side (third step). Low loop wire bonding is feasible. Therefore, it is possible to provide a semiconductor device that is excellent in electrical connection stability without curling.
Moreover, in order to connect the front-end | tip part of a metal fine wire to the 1st position on a board | substrate, and to connect the middle part of a metal fine wire to the 2nd position different from the 1st position on a board | substrate after that, Improved connection stability is achieved.
[0016]
According to a third aspect of the present invention, in the first step, a spherical portion is formed at the tip (5) of the fine metal wire (8), and the spherical portion is pressed against the first position on the substrate (1). The second step includes stitch bonding that presses the middle part (6) of the fine metal wire (8) to the second position on the substrate (1), and the third step includes: 3. The method of manufacturing a semiconductor device according to claim 2, further comprising stitch bonding that presses the terminal portion (7) of the thin metal wire (8) onto the electrode pad (3) on the surface of the semiconductor chip (2). is there.
[0017]
With the above configuration, in the first step, the metal fine wire tip is pressed by ball bonding on the substrate side in the first step, and in the second step, the metal fine wire intermediate portion is pressed on the substrate side by stitch bonding. Improved connection stability. In addition, since the metal wire end portion is press-contacted to the electrode pads on the semiconductor chip by stitch bonding, a low-loop connection is achieved, and electrical connection stability is improved.
[0018]
It said second position, Ru farther der from the semiconductor chip than the first position. Thereby, the wire loop shape between the middle part and the terminal part of a metal fine wire can be stabilized.
[0019]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a schematic side view of a semiconductor device according to an embodiment of the present invention.
The semiconductor chip 2 is fixed on the substrate 1 with an adhesive 9. In another area on the substrate 1, a wiring portion 4 is formed of metal, and the wiring portion 4 of the substrate 1 and the electrode pad 3 on the surface of the semiconductor chip 2 are electrically connected via a thin metal wire 8. .
[0020]
The tip portion 5 of the metal thin wire 8 is a ball bonding portion formed by pressing the tip portion 5 into a spherical shape and then being pressed against the first position P1 on the substrate 1. The middle portion 6 of the fine metal wire 8 is stitch-bonded at a second position P2 different from the first position P1 on the substrate 1. It is preferable that both the first position P1 and the second position P2 are on the wiring portion 4. In order to stabilize the shape of the wire loop 8a (particularly between the midway portion 6 and the electrode pad 3), the second position P2 is farther from the semiconductor chip 2 than the first position P1. Good. The terminal portion 7 of the thin metal wire 8 is stitch bonded on the electrode pad 3 on the surface of the semiconductor chip 2.
[0021]
Between the front-end | tip part 5 and the intermediate part 6 of the metal fine wire 8, and between the intermediate part 6 and the termination | terminus part 7, the wire loop 8a formed with the metal fine wire 8 exists, respectively. Since the connection is based on the reverse wire bonding method, the loop height 8b between the middle portion 6 and the end portion 7 of the thin metal wire 8 is lower than that in the normal wire bonding.
A wide range of materials from inorganic materials to polymer materials can be used for the substrate 1.
The substrate 1 may be a printed wiring board. The metal thin wire 8 is preferably made of a metal having good electrical conductivity. In detail, it is preferable to use Au fine wire. Al, Cu, Au, etc. are generally used as the fine metal wires, but among these, Au is a metal that is particularly excellent in electrical conductivity and is not corroded by moisture in the atmosphere. Has the highest stability and reliability.
[0022]
In the semiconductor device according to this embodiment, the bonding strength on the substrate 1 side is improved by connecting the wiring portion 4 and the metal thin wire 8 on the substrate 1 at two locations. The ball bonding part pressed against the substrate 1 is usually easily peeled off due to the heat effect in the manufacturing process. However, by additionally performing stitch bonding with strong adhesion on the wiring part 4, the stability of electrical connection Is secured.
The terminal portion 7 of the thin metal wire 8 is pressed against the electrode pad 3 on the surface of the semiconductor chip 2 by stitch bonding. Therefore, the connection reliability on the semiconductor chip 2 side is sufficient.
[0023]
2A to 2D and 3E to 3G are schematic side views showing the manufacturing steps of the semiconductor device in the order of steps.
A wire bonding apparatus is used to electrically connect the substrate 1 and the semiconductor chip 2 using the fine metal wires 8. This apparatus is provided with a capillary 20 for feeding and press-contacting the fine metal wire 8. The capillary 20 moves in a horizontal direction that is parallel to the substrate 1 and a vertical direction that is in contact with and away from the substrate 1 in order to connect the substrate 1 and the semiconductor chip 2 with the thin metal wires 8. It is possible.
[0024]
The substrate 1 in which the wiring portion 4 is formed and the semiconductor chip 2 is fixed by the adhesive 9 or the like is placed horizontally in the wire bonding apparatus. The capillary 20 stands by at a position away from the substrate 1 upward, and the fine metal wire 8 can be sent through the capillary 20 to the tip of the capillary.
First, a small amount of the thin metal wire 8 is protruded from the tip of the capillary 20, and the tip 5 is processed into a spherical shape using an electric torch or the like. The capillary 20 holding the spherical tip 5 moves in the direction 20a approaching the substrate 1 from above (FIG. 2A).
[0025]
When the capillary 20 further approaches the substrate 1, the tip 5 of the thin metal wire 8 protruding from the tip of the capillary 20 and the wiring part 4 come into contact with each other. At this time, a load (and heat and / or ultrasonic vibration as necessary) is applied from the capillary 20, and the spherical tip 5 is pressed against the wiring part 4 and joined to the first position P 1 of the wiring part 4. Is done. This connection is ball bonding in which the tip 5 of the thin metal wire 8 is processed into a spherical shape and connected (FIG. 2B).
[0026]
After the bonding to the first position P1 is completed, the capillary 20 moves in a direction 20b that is separated vertically upward from the substrate 1. Accordingly, the fine metal wire 8 is sent out (FIG. 2C). When the metal wire 8 having a predetermined length is delivered, the capillary 20 stops moving upward 20b.
Next, the capillary 20 moves in the horizontal direction 20c (in this embodiment, the direction away from the semiconductor chip 2) in order to connect the substrate 1 to the second position P2 different from the first position P1. Begin.
[0027]
As the capillary 20 moves, the fine metal wire 8 is sent out again. After the predetermined length of the fine metal wire 8 is delivered and moved by a predetermined distance in the horizontal direction 20c, the capillary 20 stops moving in the horizontal direction 20c and the delivery of the fine metal wire 8, and then approaches the substrate 1 vertically. The moving direction is changed to the direction 20a. At this time, the fine metal wire 8 is sent out in accordance with the movement of the capillary 20. The capillary 20 continues to move vertically downward 20a approaching the substrate 1 and descends toward the substrate 1 until the substrate 1 and the metal thin wire 8 come into contact with each other. When the fine metal wire 8 and the substrate 1 are in contact, the capillary 20 presses the middle portion 6 of the fine metal wire 8 to the wiring portion 4 and joins at the second position P2.
[0028]
The second position P2 is preferably on the wiring part 4 farther from the semiconductor chip 2 than the first position P1. When the connection to the second position P2 is completed, one wire loop 8a is formed between the first position P1 and the second position P2.
The connection to the second position P2 using the middle portion 6 of the fine metal wire 8 is stitch bonding, and this improves the connection stability (FIG. 2D).
After the connection to the second position P2, the capillary 20 moves again while feeding the fine metal wire 8 in the direction 20b that is separated from the substrate 1 vertically upward. When the capillary 20 moves a predetermined distance and the metal thin wire 8 having a predetermined length is sent out, the capillary 20 stops moving upward vertically 20b (FIG. 3E).
[0029]
After that, the capillary 20 starts to move in the horizontal direction 20 d (direction approaching the semiconductor chip 2) in order to connect the electrode pad 3 on the surface of the semiconductor chip 2 and the thin metal wire 8. As the capillary 20 moves, the fine metal wire 8 is sent out again. After the predetermined length of the fine metal wire 8 is delivered and moved in the horizontal direction 20d by a predetermined distance, the capillary 20 stops moving in the horizontal direction 20d and the delivery of the fine metal wire 8, and approaches the semiconductor chip 2 vertically. The moving direction is changed to 20a, and the fine metal wire 8 is sent again in accordance with the movement of the capillary 20.
[0030]
The capillary 20 continues to move downward vertically 20a closer to the semiconductor chip 2, and descends toward the semiconductor chip 2 until the electrode pad 3 of the semiconductor chip 2 and the metal thin wire 8 come into contact with each other. When the electrode pad 3 of the chip 2 comes into contact, the terminal portion 7 of the fine metal wire 8 is pressed against the electrode pad 3 and stitch-bonded. Accordingly, one wire loop 8a is also formed between the second position P2 and the electrode pad 3. Moreover, since reverse wire bonding is used, low-loop bonding can be realized (FIG. 3 (f)).
[0031]
Finally, the fine metal wires 8 are slightly sent out from the capillaries 20, and the fine metal wires 8 are cut using a clamp or the like near the electrode pad 3. Thereafter, the capillary 20 is retracted upward, and one wire bonding connection step is completed (FIG. 3G).
As mentioned above, although one Embodiment of this invention was described, this invention can also be implemented with another form.
For example, in the above-described embodiment, among the two connection portions of the wiring portion 4 and the fine metal wire 8 formed on the substrate 1, the second position P2 is closer to the semiconductor chip 2 than the first position P1. Although the case where it is a far position has been described as an example, the second position P2 may be a position closer to the semiconductor chip 2 than the first position P1, or the first position P1 and the second position The position P2 may be at a position equidistant from the semiconductor chip 2. Moreover, joining of the board | substrate 1 and the metal fine wire 8 is not limited to two places, You may make a joint point into three or more places.
[0032]
In the above embodiment, the example in which the wiring portion 4 is formed on the substrate 1 made of an insulating material has been described. However, a metal substrate such as a lead frame may be applied as the substrate.
In addition, various design changes can be made within the scope of matters described in the claims.
[Brief description of the drawings]
FIG. 1 is a schematic side view of a semiconductor device according to an embodiment of the present invention.
2 is a schematic side view showing manufacturing steps of the semiconductor device of FIG. 1 in order of steps.
FIG. 3 is a schematic side view showing steps subsequent to FIG. 2 in the order of steps.
FIG. 4 is a schematic side view showing a connection structure by a conventional wire bonding method. FIG. 5 is a schematic side view showing a connection structure by a reverse wire bonding method.
FIG. 6 is a cross-sectional view conceptually showing a difference in propagation of bonding power due to a difference in bonding area.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Substrate 2 Semiconductor chip 3 Electrode pad 4 Wiring part 5 Tip part 6 Middle part 7 Termination part 8 Metal thin wire 8a Wire loop 9 Adhesive 20 Capillary

Claims (3)

基板と、
表面に電極パッドを備えた半導体チップと、
上記基板上の第1の位置にボールボンディングされた先端部、上記基板上の上記第1の位置とは異なる第2の位置にステッチボンディングされた途中部、および上記半導体チップの電極パッド上にステッチボンディングされた終端部を有する金属細線とを含み、
上記第2の位置は、上記第1の位置よりも、上記半導体チップから遠い位置であることを特徴とする半導体装置。
A substrate,
A semiconductor chip with electrode pads on the surface;
A tip portion ball-bonded to a first position on the substrate, a middle portion stitch-bonded to a second position different from the first position on the substrate, and a stitch on an electrode pad of the semiconductor chip look containing a fine metal wire having a bonded end portion,
The semiconductor device according to claim 1, wherein the second position is farther from the semiconductor chip than the first position .
基板上の第1の位置に金属細線の先端部を接続する第1工程と、
この第1工程の後に、上記基板上の上記第1の位置とは異なる第2の位置に上記金属細線の途中部を接続する第2工程と、
この第2工程の後に、半導体チップ表面の電極パッド上に上記金属細線の終端部を接続する第3工程とを含み、
上記第2工程は、上記第2の位置が、上記第1の位置よりも上記半導体チップから遠い位置となるように上記金属細線の上記途中部を接続する工程を含むことを特徴とする半導体装置の製造方法。
A first step of connecting the tip of the thin metal wire to a first position on the substrate;
After the first step, a second step of connecting the middle part of the fine metal wire to a second position different from the first position on the substrate;
After this second step, seen including a third step of connecting the end portion of the metal thin wire on the electrode pads of the semiconductor chip surface,
The second step includes a step of connecting the intermediate portion of the thin metal wire so that the second position is farther from the semiconductor chip than the first position. Manufacturing method.
上記第1工程は、上記金属細線の先端部に球状部を形成し、この球状部を上記基板上の第1の位置に圧接するボールボンディングを含み、
上記第2工程は、上記金属細線の途中部を上記基板上の第2の位置に圧接するステッチボンディングを含み、
上記第3工程は、上記金属細線の終端部を上記半導体チップ表面の電極パッド上に圧接するステッチボンディングを含むことを特徴とする請求項2記載の半導体装置の製造方法。
The first step includes ball bonding in which a spherical portion is formed at a tip portion of the thin metal wire, and the spherical portion is pressed against a first position on the substrate,
The second step includes stitch bonding that presses a middle portion of the fine metal wire to a second position on the substrate,
3. The method of manufacturing a semiconductor device according to claim 2, wherein the third step includes stitch bonding in which a terminal portion of the thin metal wire is pressed onto an electrode pad on the surface of the semiconductor chip.
JP2001273738A 2001-09-10 2001-09-10 Semiconductor device and manufacturing method thereof Expired - Fee Related JP4629284B2 (en)

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US8373264B2 (en) 2008-07-31 2013-02-12 Skyworks Solutions, Inc. Semiconductor package with integrated interference shielding and method of manufacture thereof
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