JP3145937B2 - Runaway detection method for microcomputer - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a runaway detection method for detecting a runaway of a program and returning the program to a normal operation in a microcomputer controlled by the program. More particularly, the present invention relates to a runaway detection method for detecting when an infinite loop is entered at an arbitrary point in a program and returning to a normal operation.

[0002]

2. Description of the Related Art At present, as a method of detecting runaway of a microcomputer, a system called a watchdog has been generalized. In this method, a timer that always counts time (interval timer) is frequently reset (cleared) in a program, so that a timer overflow does not occur in normal program operation. Because the routine does not work,
In this method, when a timer overflow occurs, runaway is detected, and the program is returned to normal processing. FIG.
FIG. 1 shows a configuration example of a general watchdog timer.

[0003]

Usually, when a microcomputer runs away, the same part of a program is often executed repeatedly. If the repetitive execution does not include the timer reset routine,
The above method (watchdog timer method) is effective. However, in the above-described method, when the microcomputer is running out of control, if a process including a timer reset routine is executed, a timer overflow does not occur, that is, the program is executed without the watchdog timer operating. There is a problem that normal processing cannot be returned.

Further, in consideration of a runaway in a state where a process including a timer reset routine is executed, a counter for counting execution of a timer reset instruction is separately provided.
A method has also been proposed in which the program is returned to normal processing when the counter reaches a predetermined count (Japanese Patent Laid-Open No. 5-73361). According to this method, the disadvantages of the watchdog timer method can be largely eliminated, but it is necessary to devise a program design to determine where to place the timer reset routine and the counter reset processing, which places a burden on the programmer. A new problem arises. Also in this method, there is a problem that runaway cannot be detected when the program goes into an infinite loop including a counter reset routine and an interval timer reset routine due to runaway of the program.

The present invention has been made to solve the above-mentioned conventional problems.

[0006]

A runaway detection method for a microcomputer according to the present invention detects that a microcomputer controlled by a program has repeatedly executed the same address of the program a predetermined number of times at the same time interval. Then, runaway detection is performed.

Further, the runaway detection method for a microcomputer according to the present invention includes a program counter contents saving means, and detects a match / mismatch between the contents of the program counter and the contents of the program counter contents saving means and outputs a match detection signal. First comparing means, timer means for measuring an elapsed time from an arbitrary coincidence detection signal output from the first comparing means to the next coincidence detection signal, means for saving the contents of time counted by the timer means, Detecting, based on the coincidence detection signal from the first comparing means, a match / mismatch between the clock content of the timer means and the content of the timer clock saving means;
Second comparing means for outputting a coincidence detection signal or a non-coincidence detection signal, counting means for counting the coincidence detection signal from the second comparison means, and timer means in response to the coincidence detection signal from the second comparison means Means for resetting the count value, executing the saving of the time count of the timer means to the timer count content saving means and resetting the timer means in response to the mismatch detection signal from the second comparing means, And an initialization means for executing the preset, wherein the overflow signal from the counting means is used as a runaway detection signal.

Further, the runaway detection method for a microcomputer according to the present invention is characterized in that the program counter saving means detects a match / mismatch between the contents of the program counter and the contents of the program counter contents saving means and outputs a match detection signal. First comparing means, a first counting means for counting the number of command execution steps from an arbitrary coincidence detection signal output from the first comparing means to the next coincidence detection signal, Based on the coincidence detection signal from the first comparing means, the coincidence between the counted content of the first counting means and the content of the counted content saving means is performed.
Second comparing means for detecting a mismatch and outputting a match detection signal or a mismatch detection signal, a second counting means for counting the match detection signal from the second comparison means, and a match from the second comparison means Means for resetting the first counting means in response to the detection signal, saving of the contents of the first counting means to the counting contents saving means in response to the mismatch detection signal from the second comparing means, Initialization means for resetting the first counting means and presetting the second counting means, wherein an overflow signal from the second counting means is used as a runaway detection signal. Is what you do.

According to the microcomputer runaway detection method of the present invention, when an infinite loop is entered due to runaway of a program, runaway is detected when the same address is repeatedly executed a predetermined number of times at the same time interval. Based on this, a reset signal or an interrupt signal can be generated to return the program to normal processing.

[0010]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 is a block diagram of a first embodiment of the present invention.

In the figure, 1 is a program counter (PC1) indicating the execution address of a program, 2 is a save area (PC2) of the contents of the program counter 1, (3)
Is a first comparator that detects a match / mismatch between the contents of the program counter 1 and the contents of the program counter contents save area 2 and outputs a match detection signal. It is a first counter (timer) that measures the elapsed time from the signal output to the next match detection signal output. Based on the overflow signal from the first counter 4, an address transfer operation from the program counter 1 to the program counter contents saving area 2 is executed. Reference numeral 5 denotes an oscillator (OSC) that generates a clock serving as a time reference of the first counter 4, and reference numeral 6 denotes a frequency divider that generates and outputs a count signal of the first counter 4 by dividing the clock output from the oscillator 5. (Divider). 7
Is a register for saving the contents of the first counter 4;
Is a detection of a match / mismatch between the contents of the first counter 4 and the contents of the first counter contents saving register 7 at the time when the match detection signal is output from the first comparator 3. A second comparator 9 that outputs a detection signal or a mismatch detection signal is a second counter that counts the match detection signal from the second comparator 8. Based on the coincidence detection signal from the second comparator 8, the second counter 9 counts up and the first counter 4 is reset. on the other hand,
Based on the mismatch detection signal from the second comparator 8, presetting (initial value setting) of the second counter 9 is executed, and transfer operation from the first counter 4 to the first counter contents saving register 7 is performed. Then, the first counter 4 is reset. In addition, based on the overflow signal from the first counter 4, the presetting of the second counter 9 is executed together with the above-described transfer operation from the program counter 1 to the program counter contents saving area 2. The overflow signal from the second counter 9 becomes a runaway detection signal.

With the above configuration, when the same address of a program is executed a predetermined number of times at the same time interval, an overflow of the second counter 9 occurs and a runaway of the program can be detected.

Based on the overflow signal of the second counter 9, a predetermined interrupt signal is generated, and the program returns to normal processing. Alternatively, a reset signal is generated based on the overflow signal of the second counter,
Initialize the microcomputer.

FIG. 2 is a flowchart showing the flow of the processing described above. However, in this drawing, the processing is illustrated serially in order to make the flow of the processing easy to understand, but in actuality, as illustrated in FIG. The comparison process between the program counter 1 (PC1) and the program counter content saving area 2 (PC2) and the overflow process of the first counter 4 (counter 1) are allowed to occur simultaneously and in parallel.

In the first embodiment, timer means for measuring the elapsed time from the output of an arbitrary coincidence detection signal from the first comparator 3 to the output of the next coincidence detection signal is provided. However, instead of this, a configuration may be provided in which a counting means for counting the number of instruction execution steps from the output of an arbitrary match detection signal from the first comparator to the output of the next match detection signal is provided.

FIG. 3 is a block diagram of a second embodiment of the present invention configured as described above.

In the figure, 1 is a program counter (PC1) indicating the execution address of a program, 2 is a save area (PC2) for the contents of the program counter 1, 3
Is a first comparator that detects a match / mismatch between the contents of the program counter 1 and the contents of the program counter contents save area 2 and outputs a match detection signal. This is a first counter that counts the number of instruction execution steps from the signal output to the next match detection signal output. Based on the overflow signal from the first counter 4, an address transfer operation from the program counter 1 to the program counter contents saving area 2 is performed.
Reference numeral 5 denotes an oscillator (OSC) that generates a clock serving as a time reference of the microcomputer. Reference numeral 6 denotes a frequency divider that divides a clock output from the oscillator 5 to generate and output a system clock. Based on the system clock from the frequency divider 6, the program counter 1 counts up and the first counter 4 counts up. 7 is a register for saving the contents of the first counter 4, and 8 is a register for saving the contents of the first counter 4 and the contents of the first counter when the match detection signal is output from the first comparator 3. A second comparator 9 for detecting a match / mismatch of the contents of the register 7 and outputting a match detection signal or a mismatch detection signal; a second counter 9 for counting the match detection signal from the second comparator 8 It is. Based on the coincidence detection signal from the second comparator 8, the second counter 9 counts up and the first counter 4 is reset. On the other hand, based on the non-coincidence detection signal from the second comparator 8, the presetting (initial value setting) of the second counter 9 is executed, and at the same time, the first counter 4 transfers the first counter content saving register 7 The transfer operation and the reset of the first counter 4 are executed. In addition, the first
Based on the overflow signal from the counter 4, the above-described transfer operation from the program counter 1 to the program counter content saving area 2 is performed, and the second counter 9 is preset. The overflow signal from the second counter 9 becomes a runaway detection signal.

With the above configuration, when the same address of a program is executed a predetermined number of times at the same time interval, an overflow of the second counter 9 occurs and a runaway of the program can be detected.

According to this embodiment, the counting operation of the first counter 4 is controlled based on the system clock of the microcomputer, so that more accurate measurement of the time interval can be performed as compared with the first embodiment. Is possible.

[0021]

As described above in detail, according to the present invention, when a runaway state occurs in which a microcomputer program repeatedly executes the same part by a relatively small-scale circuit, the execution is performed. Regardless of the location, it is possible to provide a very useful runaway detection method that can recognize a runaway state and return a program to normal processing. Also, by using the watchdog in combination with the conventional technique, the reliability of runaway detection can be increased, and a more secure microcomputer system can be realized.

Japanese Patent Application Laid-Open No. 3-292545 discloses a method of determining an infinite loop when the upper address does not change for a predetermined time during execution of a program. However, in this method, for example, when an infinite loop occurs under the following conditions, it cannot be detected (for example, the program counter is 12 bits, and the upper 4 bits are compared for runaway detection). .

(Example 1) Addresses 5F0H and 610H
Runaway, that is, when an infinite loop is formed across the boundary where the upper address changes.

(Example 2) When a runaway occurs at an address of 7xxH, and a subroutine having an address of 3xxH is called.

Such a case occurs frequently, and therefore, the detection method disclosed in the publication is insufficient.

On the other hand, in the present invention, when an address of a program is repeatedly executed at equal time intervals, it is determined that the loop is an infinite loop. It is a system that does not burden the program.

[Brief description of the drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a flowchart showing a processing flow in the embodiment.

FIG. 3 is a block diagram of a second embodiment of the present invention.

FIG. 4 is a diagram illustrating a configuration example of a general watchdog timer.

[Explanation of symbols]

 1 Program counter 2 Program counter contents saving area 3 First comparator 4 First counter 5 Oscillator 6 Divider 7 First counter contents saving register 8 Second comparator 9 Second counter

Claims (3)

(57) [Claims] 1. A microcomputer controlled by a program, wherein runaway detection is performed by detecting that the same address of the program is repeatedly executed a predetermined number of times at the same time interval. , Microcomputer runaway detection method. Means for saving program counter contents, first comparing means for detecting a match / mismatch between the contents of the program counter and the contents of the program counter contents saving means, and outputting a match detection signal; Timer means for measuring an elapsed time from an arbitrary coincidence detection signal output from the comparison means to the next coincidence detection signal, means for evacuating the time content of the timer means, based on the coincidence detection signal from the first comparison means Detecting the coincidence / mismatch between the clock content of the timer means and the content of the timer clock content saving means,
Second comparing means for outputting a coincidence detection signal or a non-coincidence detection signal, counting means for counting the coincidence detection signal from the second comparison means, and timer means in response to the coincidence detection signal from the second comparison means Means for resetting the count value, executing the saving of the time count of the timer means to the timer count content saving means and resetting the timer means in response to the mismatch detection signal from the second comparing means, The runaway detection method for a microcomputer according to claim 1, further comprising initialization means for executing the preset of (1), wherein the overflow signal from the counting means is used as a runaway detection signal. 3. A program counter contents saving means, a first comparing means for detecting a match / mismatch between the contents of the program counter and the contents of the program counter contents saving means and outputting a match detection signal, First counting means for counting the number of instruction execution steps from an arbitrary match detection signal output from the comparison means to the next match detection signal, saving means for counting the contents of the first counting means, and the first comparison means Based on the coincidence detection signal from the means, the coincidence between the content of the first counting means and the content of the content saving means is determined.
Second comparing means for detecting a mismatch and outputting a match detection signal or a mismatch detection signal, a second counting means for counting the match detection signal from the second comparison means, and a match from the second comparison means Means for resetting the first counting means in response to the detection signal, saving of the contents of the first counting means to the counting contents saving means in response to the mismatch detection signal from the second comparing means, Initialization means for resetting the first counting means and presetting the second counting means, wherein an overflow signal from the second counting means is used as a runaway detection signal. The method for detecting runaway of a microcomputer according to claim 1.