JP2929850B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates also relates <br/> to a method of manufacturing a semiconductor device, relates to a particular method of forming a multilayer metal wiring formed by electrolytic plating.

[0002]

2. Description of the Related Art A conventional method for forming a multilayer wiring will be described with reference to the drawings.

First, as shown in FIG. 3A, a first conductive film 2 using a titanium tungsten alloy as an adhesion metal and a second conductive film 3 using gold as a main wiring material are formed on the first conductive film. A silicon oxide film, a silicon nitride film, a planarization coating film, and the like are formed on a semiconductor substrate 1 on which a lower gold wiring to be formed is formed, using a known technique such as a CVD technique, a photolithography technique, or a dry etching technique. Then, an interlayer insulating film 4 having a thickness of 0.5 to 1.0 μm is formed. Next, the interlayer insulating film 4 is patterned to a thickness of 0.4 to
A connection hole 5 having a diameter of 1.0 μm is formed.

Further, titanium is added to tungsten in an amount of 5-10.
% Of a titanium-tungsten alloy added to the third conductive film 6, which is a known technique. C. Using a magnetron sputtering method, a film forming power of 1.0 to 5.0 kW, a film forming pressure of 2 to 10 mTorr, and 0.05 to 0.2 μm
Is formed on the interlayer insulating film 4 and the second conductive film 3.
Subsequently, for the purpose of protecting the surface of the third conductive film 6 from the plating solution, improving the adhesion, and supplying the plating current, gold, platinum,
A base metal film 7 made of palladium or the like is C.
A film forming power of 0.5 to 0.5 using a magnetron sputtering method
Under the conditions of 1.0 kW and a film forming pressure of 2 to 10 mTorr,
It is formed on the third conductive film 6 with a thickness of 0.01 to 0.1 μm.

Next, as shown in FIG. 3B, a photolithography technique is used to form a mask film 9 for forming a wiring made of a positive type photoresist film from 1.0 to 2.0.
A mesh in which the base metal film 7 is selectively formed on the base metal film 7 with a thickness of μm, and the base metal film 7 is coated with a cathode, platinum or titanium by using an electrolytic gold plating solution composed of sodium gold sulfate, sulfuric acid, phosphoric acid, or the like. An electric current is applied using the electrode as an anode, gold plating is performed under the conditions of a plating temperature of 30 to 60 ° C. and a current density of 1 to 4 mA / cm ² , and the fourth conductive film 8 having a low electric resistance formed of a gold plating film is removed. 0.5-2.0μ
m, and the wiring forming mask film 9 is removed using an organic solvent. The fourth conductive film 8 is formed for the purpose of reducing the electric resistance of the entire wiring.

Subsequently, as shown in FIG. 3C, the fourth conductive film 8 is etched by a milling method using an argon gas as a source or a reactive ion etching method using CF ₄ or SF ₆ as an etching gas. Then, only unnecessary portions of the lower third conductive film 6 and the underlying metal film 7 are removed to form a metal wiring of a semiconductor device including the third conductive film 6, the underlying metal film 7, and the fourth conductive film 8. I was

[0007]

The above-described conventional method for forming a metal wiring of a semiconductor device has the following drawbacks.

In the conventional wiring forming method, the upper wiring and the lower wiring are connected via an adhesive metal film having a large resistivity of the upper wiring, and the interlayer connection resistance increases.
It is difficult to obtain stable and good electrical characteristics and high long-term reliability of metal wiring. Therefore, it is difficult to obtain a semiconductor device having high long-term reliability and stable characteristics, and a high yield in the manufacturing process cannot be realized.

[0009]

[0010]

SUMMARY OF THE INVENTION Manufacturing of a semiconductor device according to the present invention
The method includes the steps of sequentially forming a first conductive film made of a metal for adhesion and a second conductive film made of a main wiring material on a semiconductor substrate, and then patterning to form a lower wiring, and an interlayer insulating film formed on the lower wiring. Forming a film and then patterning to form a connection hole; forming a third conductive film made of a metal for adhesion on the entire surface including the connection hole; and performing anisotropic etching to form the second hole in the connection hole. A step of exposing the conductive film and an ion milling method of the exposed second conductive film.
And etch back the entire surface while leaving the third conductive film.
The putted second conductive film is attached to the side wall of the connection hole,
Next, a fourth conductive film made of a main wiring material is formed on the entire surface including the second conductive film, and then patterned to form an upper wiring together with the third conductive film.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIGS. 1A to 1D are cross-sectional views of a semiconductor chip for explaining a technical example related to the present invention.

First, as shown in FIG.
A first conductive film 2 of titanium-tungsten alloy and a second conductive film 3 of gold as a main wiring material formed by electrolytic plating are formed on the first conductive film 2 by sputtering as an adhesion metal, and then patterned to form a lower gold wiring. Next, using a known technique such as CVD technology, photolithography technology, dry etching technology, etc., the entire surface including the lower metal wiring is formed of a silicon oxide film, a silicon nitride film, a planarization coating film, and the like. An interlayer insulating film 4 having a thickness of 0.5 to 1.0 μm is formed. Next, the interlayer insulating film 4 is patterned to form a connection hole 5 having a diameter of 0.4 to 1.0 μm. Next, a third conductive film 6 made of a titanium tungsten alloy in which 5 to 10% of titanium is added to tungsten as an adhesion metal
Is a known technology. C. Using a magnetron sputtering method, a film forming power of 1.0 to 5.0 kW and a film forming pressure of 2
The film is formed on the interlayer insulating film 4 and the second conductive film 3 at a thickness of 0.05 to 0.2 μm under a condition of 10 to 10 mTorr. The step coverage of the third conductive film 6 formed by sputtering in a fine connection hole having a diameter of 1 μm or less is about 30%.

Subsequently, as shown in FIG. 1B, CF ₄ ,
Anisotropic dry etching using O ₂ , Cl _2, or the like as a reaction gas is performed to remove only the third conductive film 6 at the bottom of the connection hole while leaving the flat portion and the third conductive film 6 at the side wall of the connection hole 5. Then, the second conductive film 3 is exposed.

Next, as shown in FIG. 1C, for the purpose of adhesion of the gold plating film and supply of plating current, the underlying metal film 7 made of gold is C. Using magnetron sputtering,
Deposition power 0.5 to 1.0 kW, deposition pressure 2 to 10 mT
orr conditions, 0.01 to 0. 2 μm thick
It is formed on the conductive film 3 and the third conductive film 6.

Further, as shown in FIG. 1D, a wiring forming mask composed of a photoresist film is selectively formed on the underlying metal film 7 with a thickness of 1.0 to 2.0 μm by using a photolithography technique. And sodium gold sulfate, sulfuric acid,
Using an electrolytic gold plating solution composed of phosphoric acid or the like,
The cathode, platinum or a mesh-like electrode of titanium coated with platinum as an anode, a plating temperature of 30 to 60 ° C.
Gold plating is performed under the conditions of a current density of 1 to 4 mA / cm ² , and a fourth conductive film 8 composed of a gold plated film and having a low electric resistance is selectively formed with a thickness of 0.5 to 2.0 μm. Next, the mask film for wiring formation is removed using an organic solvent. The fourth conductive film 8 is formed for the purpose of reducing the electric resistance of the entire wiring.

Next, the third conductive film 6 and the underlying metal film are formed by using the fourth conductive film 8 as an etching mask by a milling method using an argon gas as a source or a reactive ion etching method using CF ₄ and SF ₆ as an etching gas. By removing only unnecessary portions of the semiconductor device 7, an upper gold wiring of the semiconductor device including the second conductive film 6, the underlying metal film 7, and the fourth conductive film 8 is formed.

In the metal wiring thus formed, in the connection between the upper gold wiring and the lower gold wiring, the gold plating film of the upper gold wiring and the gold of the lower gold wiring are connected without the interposition of an adhesive metal having a large resistivity. Because it is directly connected, the connection resistance is lower than before,
The wiring structure has high reliability. 0.6 connection hole
FIG. 4 shows the resistance in the case of .about.1.4 .mu.m together with that of the conventional example. Although the titanium-tungsten alloy has been described as an example of the first conductive film and the third conductive film, a titanium / titanium nitride laminated film having excellent heat resistance and oxidation resistance may be used. The metal wiring structure and the manufacturing method of the semiconductor device according to the present technical example are applicable regardless of the type of the semiconductor integrated circuit device such as a MOS and a bipolar.

FIGS. 2A to 2D are cross-sectional views of a semiconductor chip for explaining an embodiment of the present invention .

First, as shown in FIG. 2A, a first conductive film 2 and a first conductive film using a titanium-tungsten alloy as an adhesion metal, using the same technique and material as in the technical example. An interlayer insulating film 4, an interlayer connection hole 5, and a third conductive film 6 are formed on a semiconductor substrate 1 on which a lower gold wiring composed of a second conductive film 3 using gold as a main wiring material is formed. The second conductive film 3 is removed by removing only the third conductive film 6 at the bottom of the interlayer connection hole while leaving the third conductive film 6 at the flat portion and the sidewall of the interlayer connection hole.
To expose.

Subsequently, as shown in FIG. 2B, ion milling is performed by using argon gas while leaving the third conductive film 6 on the flat portion and the side wall portion of the interlayer connection hole. The reverse-sputtered gold is deposited again on the side wall of the interlayer connection hole.

Next, as shown in FIG. 2C, for the purpose of adhesion of the gold plating film and supply of plating current, the underlying metal film 7 made of gold is C. Using a magnetron sputtering method, a film forming power of 0.5 to 1.0 kW and a film forming pressure of 2 to 10 mT
It is formed on the third conductive film 6 and the second conductive film 3 with a thickness of 0.01 to 0.1 μm under the condition of orr.

Further, as shown in FIG. 2D, a fourth conductive film 8 is formed using the same technique and material as in the technical example .

[0023] In this way, the resulting metal wiring, technology
As in the example , since the upper layer wiring and the lower layer wiring are connected without the interposition of the adhesion metal, the wiring structure has a lower connection resistance and higher reliability than before. Also, in the step of forming the base metal film, it is easy to form gold on the entire connection hole because gold is re-adhered to the side wall of the connection hole. Is possible, and the etching in the subsequent process becomes easy.

In the above embodiment, the case where gold is used as the main wiring material has been described. However, the same effect can be obtained by using copper.

[0025]

As described above, according to the metal wiring structure and the manufacturing method of the semiconductor device of the present invention, in the connection between the upper wiring and the lower wiring having a laminated structure, the main wiring material of the upper wiring and the lower wiring is used. Are the same, and the main wiring material of the upper wiring and the lower wiring is directly connected without the intervention of a close contact metal having a large resistivity, so that the interlayer connection resistance can be reduced as compared with the related art. Therefore, there is an effect that a semiconductor device having stable characteristics and high long-term reliability can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view of a semiconductor chip for explaining a technical example related to the present invention .

FIG. 2 is a sectional view of a semiconductor chip for explaining an embodiment of the present invention .

FIG. 3 is a sectional view of a semiconductor chip for explaining a conventional example.

FIG. 4 is a diagram showing a relationship between a connection hole diameter and a connection resistance in a conventional example and an example.

[Explanation of symbols]

 Reference Signs List 1 semiconductor substrate 2 first conductive film 3 second conductive film 4 interlayer insulating film 5 connection hole 6 third conductive film 7 underlying metal film 8 fourth conductive film 9 mask film

Claims (1)

(57) [Claims] A step of sequentially forming a first conductive film made of a metal for adhesion and a second conductive film made of a main wiring material on a semiconductor substrate and then patterning to form a lower wiring;
Forming a connection hole by patterning after forming an interlayer insulating film on the lower layer wiring, forming a third conductive film made of a metal for adhesion on the entire surface including the connection hole, and performing anisotropic etching. Exposing the second conductive film in the connection hole ;
Etch the entire surface using the etching method while leaving the third conductive film.
A second conductive film sputtered reversely is attached to the side wall of the connection hole.
Is deposited, the semiconductor device characterized in that it comprises a step of forming the following in upper wiring with the entire surface and patterning after forming a fourth conductive film made of a main wiring material and the third conductive film and a second conductive film Manufacturing method.