JP2011114282A - Soi substrate and method of manufacturing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an SOI substrate suitable for an MEMS field. <P>SOLUTION: The SOI substrate includes: an Si substrate; an SiO<SB>2</SB>layer arranged on one principal surface of the Si substrate; and an Si layer which is arranged on the SiO<SB>2</SB>layer and has adhesion strength with the SiO<SB>2</SB>layer smaller than the adhesion strength between the Si substrate and the SiO<SB>2</SB>layer and further has a thickness thinner compared with the Si substrate. Productivity is thereby improved when adapted for the MEMS field. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an SOI substrate and a manufacturing method thereof.

In recent years, applications of SOI (Silicon on Insulator) substrates in which Si as a handle layer, SiO ₂ as an insulating layer, and Si as a device layer are stacked in this order have been applied to the MEMS field in addition to semiconductor fields such as LSI and CPU. (See, for example, Patent Document 1).

In general, in the MEMS field, after a SiO ₂ layer to be an insulating layer 102 is formed on a Si substrate to be a handle layer 101, another Si substrate to be a device layer 103 and an SiO ₂ layer are bonded. An SOI substrate manufactured by bonding at a high temperature (about 1000 ° C.) is used. FIG. 3 is a cross-sectional view showing a manufacturing method in the case where a MEMS device having a movable part is manufactured using such an SOI substrate. Specifically, it is a MEMS device in which the device layer 103 in the A part becomes a movable part by removing the insulating layer 102 immediately below the device layer 103 in the A part.

  First, as shown in FIG. 3A, the through hole 200 is formed in the device layer around the portion A. Next, as shown in FIGS. 3B to 3E, the HF (hydrofluoric acid) solution or HF vapor is brought into contact with the insulating layer 102 through the through-hole 200 and etched, so that the device layer 103 immediately below the portion A is directly underneath. The MEMS device can be manufactured by removing all the insulating layer 102 and terminating the etching.

  In general, since the adhesion strength between the handle layer 101 and the insulating layer 102 and the adhesion strength between the insulating layer 102 and the device layer 103 are substantially equal, the etching of the insulating layer 102 proceeds isotropically. That is, the etching proceeds isotropically in the thickness direction and the planar direction (left-right direction in the figure) of the insulating layer 102.

JP 2005-283393 A

  However, when such a conventional SOI substrate is used, since the removal rate (etching rate) of the insulating layer 102 is low, a long-time treatment is required and the productivity of the MEMS device is lowered. was there. Such a problem becomes more prominent as the area of the movable part increases.

  The present invention has been devised to solve the above-described problems in the prior art, and an object thereof is to provide an SOI substrate suitable for use in the MEMS field and a method for manufacturing the same. .

SOI substrate of the present invention, a Si substrate, and the Si SiO ₂ layer disposed on one main surface of the substrate, the disposed on the SiO ₂ layer, the adhesion strength between the said Si substrate SiO ₂ layer In comparison, it includes a Si layer having a low adhesion strength with the SiO ₂ layer and a thickness smaller than that of the Si substrate.

The method for manufacturing an SOI substrate of the present invention includes forming a SiO ₂ layer on one principal surface of the Si single crystal substrate by thermally oxidizing the Si single crystal substrate, a first step of a region excluding the SiO ₂ layer and the Si substrate, the a SiO ₂ layer and the Si layer disposed face to face, by heating at a temperature lower than the heat treatment temperature for the thermal oxidation, the SiO ₂ A second step of bonding the layer and the Si layer together.

According to the SOI substrate of the present invention, since the adhesion strength between the SiO ₂ layer and the Si layer is smaller than the adhesion strength between the Si substrate and the SiO ₂ layer, the etching rate is low at the interface between the SiO ₂ layer and the Si layer. Therefore, the Si layer can be separated from the SiO ₂ layer at a desired site with high productivity, and etching can proceed from the separated interface. For this reason, since only the SiO ₂ layer in a desired region can be processed at a higher etching rate than other portions, it is suitable for use in the MEMS field.

According to the method for manufacturing an SOI substrate of the present invention, since the adhesion strength between the SiO ₂ layer and the Si layer can be reduced as compared with the adhesion strength between the Si substrate and the SiO ₂ layer, it is suitable for use in the MEMS field. Can be manufactured.

It is sectional drawing which shows an example of the SOI substrate of this invention. (A)-(d) is sectional drawing which shows each process of manufacturing a MEMS device, respectively using the SOI substrate shown in FIG. (A)-(e) is sectional drawing which shows each process of manufacturing a MEMS device using the conventional SOI substrate, respectively.

  Hereinafter, an SOI substrate of the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same location in drawing, and the overlapping description is abbreviate | omitted.

FIG. 1 is a cross-sectional view showing an example of an embodiment of an SOI substrate of the present invention. In FIG. 1, reference numeral 1 denotes a Si substrate that serves as a handle layer, 2 denotes a SiO ₂ layer that serves as an insulating layer, and 3 denotes a Si layer that serves as a device layer.

  The Si substrate 1 serves as a support portion of the SOI substrate, and is generally formed by polishing single crystal Si.

The SiO ₂ layer 2 is formed on the Si substrate 1 and is formed by polishing the surface of single crystal Si and then thermally oxidizing the surface or by ion implantation. Thus, by forming integrally with the Si substrate 1, the adhesion strength between the Si substrate 1 and the SiO ₂ layer 2 is increased.

The Si layer 3 is formed on the SiO ₂ layer 2 so that the adhesion strength between the SiO ₂ layer 2 and the Si layer 3 is smaller than the adhesion strength between the Si substrate 1 and the SiO ₂ layer 2. For example, when another single crystal Si substrate is bonded, a heat treatment temperature, a heat treatment time, a bonding pressure, or the like may be adjusted.

Bonding the Si layer 3 by heat treatment is realized by forming water molecules from the OH groups formed on the surfaces of the surfaces to be bonded together by heating and bonding Si and oxygen molecules. For this reason, the bonding temperature is not particularly limited as long as it is a temperature at which such a reaction can proceed. For example, when the thermal oxidation temperature for forming the SiO ₂ layer 2 is 1000 ° C. to 1300 ° C., the bonding temperature may be about 700 ° C. If the heat treatment temperature is increased, the heat treatment time is set longer, and the bonding pressure is set higher, the adhesion strength is improved. Therefore, the bonding temperature in the range in which the above reaction proceeds, the treatment time, according to the desired adhesion strength, Adjust pressure.

Thus an SOI substrate of this embodiment is constructed by sequentially stacking the Si substrate 1, SiO ₂ layer 2, Si layer 3.

Note that, when the conventional SOI substrate is formed by bonding, heat treatment at the same level as the thermal oxidation temperature for forming the SiO ₂ layer 2 is performed, and the adhesion between the Si substrate 1 and the SiO ₂ layer 2 is performed. The strength and the adhesion strength between the SiO ₂ layer 2 and the Si layer 3 were equivalent. In addition, there is a method of manufacturing an SOI substrate by implanting oxygen into a Si substrate so as to have an oxygen concentration peak at a depth position away from the surface and performing a heat treatment. The adhesion strength between the SiO ₂ layer 2 and the adhesion strength between the SiO ₂ layer 2 and the Si layer 3 were equivalent.

The case where the SOI substrate described in this embodiment as described above is applied to the MEMS field will be described with reference to FIG. FIG. 2 is a cross-sectional view showing a manufacturing method in the case where a MEMS device having a movable part is manufactured using the SOI substrate shown in FIG. Specifically, it is a MEMS device in which the Si layer 3 in the A part becomes a movable part by removing the SiO ₂ layer 2 immediately below the Si layer 3 in the A part.

  First, as shown in FIG. 2A, the through hole 20 is formed in the device layer (Si layer 3) around the portion A. The through-hole 20 is formed by wet etching such as KOH (potassium hydroxide) and TMAH (4-methyl ammonium hydroxide), or dry etching by RIE.

Next, as shown in FIGS. 2B to 2D, an HF (hydrofluoric acid) solution or HF vapor is introduced through the through hole 20 to etch the SiO ₂ layer 2. Then, as shown in FIG. 2 (d), can be produced MEMS device by removing all the SiO ₂ layer 2 just below the Si layer 3 in the A unit terminates the etching.

Here, although the SiO ₂ layer 2 is etched in the thickness direction and the planar direction (left and right direction in the figure), in the SOI substrate shown in FIG. 1, the SiO ₂ layer 2 has SiO ₂ strength higher than the adhesion strength between the Si substrate 1 and the SiO ₂ layer 2. _Since the adhesion strength between the _two layers 2 and the Si layer 3 is reduced, the etching progresses in the left-right direction at the interface between the SiO ₂ layer 2 and the Si layer 3 selectively. As a result, it is possible to quickly separate the SiO ₂ layer 2 and the Si layer 3 immediately below the A portion, and thereby it is possible to selectively increase the area where the SiO ₂ layer 2 is in contact with the etchant directly below the A portion. . Note that since the etchant penetrates directly from the periphery (from both the left and right directions in the figure) directly under the A part, the SiO ₂ layer 2 and the Si layer 3 can be selectively separated only under the A part. Since the etchant to a surface that is separated from the Si layer 3 of SiO ₂ layer 2 is in contact can be improved only etching rate of the desired site. For this reason, the processing time required for the step of making the A portion having the same area the movable portion can be remarkably shortened as compared with the conventional isotropic etching as shown in FIG. As described above, the productivity of the MEMS device can be increased by manufacturing the MEMS device using the SOI substrate illustrated in FIG. 1. That is, the SOI substrate is suitable for use in the MEMS field.

Further, as shown in FIG. 3, in the conventional SOI substrate, since etching proceeds isotropically, not only the insulating layer 102 immediately below the A portion to be removed but also the insulating layer 102 immediately below the B portion serving as a fixing portion. Since the region (b region in FIG. 3 (e)) is also removed at the same speed, it is necessary to increase the area of the fixed portion, and there is a problem in that the MEMS device device is increased in size. On the other hand, according to the SOI substrate shown in FIG. 1, as described above, the area where the SiO ₂ layer 2 is in contact with the etchant is selectively enlarged immediately below the A portion, so that the SiO ₂ layer in the region immediately below the A portion is formed. The etching rate of only 2 can be improved. As a result, the removal of the SiO ₂ layer 2 (b region in FIG. 2 (d)) immediately below the B portion, which becomes the fixing portion around the A portion, can be greatly reduced, so that the area required for the fixing portion B can be reduced. Therefore, the MEMS device can be reduced in size.

  Thus, the SOI substrate shown in FIG. 1 can be made suitable for the MEMS field.

  Note that the structure of the present invention is not limited to the above-described embodiments, and various modifications and improvements can be made without departing from the scope of the present invention.

For example, in FIG. 1, the adhesive strength between the SiO ₂ layer 2 and the Si layer 3 is adjusted according to the manufacturing conditions at the time of bonding, but by providing an intermediate layer between the SiO ₂ layer 2 and the Si layer 3 You may adjust.

For example, when an intermediate layer containing Na is provided, anodic bonding that can be performed at a lower temperature than the direct bonding by the heat treatment described above can be used for bonding the SiO ₂ layer 2 and the Si layer 3 together. The adhesive strength between the SiO ₂ layer 2 and the Si layer 3 can be adjusted to be smaller than the adhesive strength between the integrally formed Si substrate 1 and the Si layer 3.

Such an intermediate layer can be formed, for example, by forming a SiO ₂ layer 2 by thermal oxidation and then depositing borosilicate glass (for example, Pyrex (trademark) glass) containing Na by sputtering using a sputtering apparatus. Thereby, the presence of Na contained in the intermediate layer enables anodic bonding, for example, at a heat treatment temperature of 400 ° C.

Further, by bonding the bonded surfaces of the SiO ₂ layer 2 and the Si layer 3 with plasma and activating the OH groups, the bonding can be performed at room temperature. In this case as well, the adhesive strength between the SiO ₂ layer 2 and the Si layer 3 can be adjusted to be smaller than the adhesive strength between the integrally formed Si substrate 1 and the Si layer 3.

The adhesion strength between the Si substrate 1 and the SiO ₂ layer 2 and the adhesion strength between the SiO ₂ layer 2 and the Si layer 3 can be confirmed by a normal tensile test that is measured by peeling directly. That is, it can be realized by bonding the back surface of the Si substrate 1 to a member such as stainless steel that can be chucked by a tensile tester.

  Next, a method for manufacturing an SOI substrate according to the present invention will be described.

(First step)
The SiO ₂ layer 2 is formed on one main surface of the Si single substrate by thermally oxidizing the Si single substrate. Note that a portion of the Si single crystal substrate excluding the SiO ₂ layer 2 is the Si substrate 1. Thermal oxidation may be performed at about 1000 ° C. in an oxygen atmosphere, for example. The heat treatment time in this step is adjusted by the film thickness of the SiO ₂ layer 2.

(Second step)
The SiO ₂ layer 2 and the Si layer 3 are arranged opposite to each other and bonded together by heating at a temperature lower than the heat treatment temperature during thermal oxidation. For example, when thermal oxidation is performed at 1000 ° C., both may be brought into contact at 700 ° C. for 10 to 60 minutes.

The Si layer 3 may be bonded by contacting a material having a thickness smaller than that of the Si substrate 1 or by polishing the surface not in contact with the SiO ₂ layer 2 after bonding the thick Si layer. The thickness may be adjusted.

  Next, an embodiment of the SOI substrate shown in FIG. 1 will be described.

First, a SiO ₂ layer 2 having a thickness of 1 μm was formed on a Si substrate 1 having a thickness of 500 μm by thermal oxidation. The temperature of the thermal oxidation treatment was 1050 ° C., and the treatment time was 5 hours. Next, another Si substrate with a thickness of 200 μm was brought into contact with the SiO ₂ layer 2 and treated at 750 ° C. for 20 minutes to bond them together, and then polished to a thickness of 20 μm to obtain the Si layer 3. Thus, the SOI substrate shown in FIG. 1 was formed.

Next, a mask was formed on the Si layer 3 and patterned into a desired shape by a normal photolithography technique. Next, the Si layer 3 was etched by an RIE apparatus to form a through hole 20 and expose the SiO ₂ layer 2. Next, etching with HF vapor was performed to remove the SiO ₂ layer 2 in a desired region, and a MEMS device as shown in FIG. 2 was formed.

When the SOI substrate of this example as described above was used, a movable part with a width of 20 μm could be formed by removing the SiO ₂ layer 2 directly under the processing time of 30 minutes. . In contrast, when similar processing was performed using a conventional SOI substrate, it took 3 hours. Thus, it was confirmed that the removal of the SiO ₂ layer 2 in a desired region can be realized in a short time by using the SOI substrate of this example.

1 Si substrate 2 SiO ₂ layer 3 Si layer

Claims (3)

A Si substrate;
A SiO ₂ layer disposed on one principal surface of the Si substrate;
Said disposed on the SiO ₂ layer, the Si compared with the adhesion strength between the substrate and the SiO ₂ layer, the adhesion strength between the SiO ₂ layer is small and a small Si layer thicker than that of the Si substrate, SOI substrate including The SOI substrate according to claim 1, further comprising an intermediate layer containing Na between the SiO ₂ layer and the Si layer. By thermally oxidizing the Si single crystal substrate, a SiO ₂ layer is formed on one main surface of the Si single crystal substrate, and a region excluding the SiO ₂ layer in the Si single crystal substrate is defined as a Si substrate. 1 process,
A _{second step in} which the SiO ₂ layer and the Si layer are disposed opposite to each other and heated at a temperature lower than the heat treatment temperature during the thermal oxidation to bond the SiO ₂ layer and the Si layer together. Manufacturing method of SOI substrate.

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