JP2010191449A - Liquid crystal display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of obtaining good display images. <P>SOLUTION: The liquid crystal display device displays an image on a display 100 according to display signals D1-D300 supplied through a data signal line DL, and includes a driver IC 29 including at least two buffers which simultaneously drive the data signal line DL. <P>COPYRIGHT: (C)2010,JPO&amp;INPIT

Description

  The present invention relates to a liquid crystal display device.

  An active matrix liquid crystal display device typified by a TFT (Thin Film Transistor) liquid crystal panel is expected to be widely used as a display device for general home television and OA equipment. This is because according to the active matrix liquid crystal display device, it is possible to easily realize a reduction in thickness and weight as compared with a CRT and to obtain an image display having a quality comparable to that of a CRT.

  Taking advantage of the fact that it is easy to reduce the thickness and weight, not only portable information devices such as notebook computers but also various multimedia information devices are required. Development of a liquid crystal display device using a block sequential method that achieves high definition and a large screen in a space frame is underway.

  Here, a panel structure of an active matrix liquid crystal display device capable of obtaining a high-quality image display among flat panel displays will be described. As shown in FIG. 1, a TFT substrate having pixel electrodes 110 provided in a matrix and switching elements (TFTs) 112 provided corresponding to the pixel electrodes 110, and a common electrode on one side. The liquid crystal is sealed between the common substrate and the common substrate.

  Data signal lines DL and scanning lines (scanning electrodes) 114 intersect in a matrix on the TFT substrate, and TFTs are connected as switching elements 112 to all the intersections. At this time, the TFT of the row selected by the scanning line 114 is turned on, the video signal voltage applied to the data signal line DL is written to each pixel electrode 110, and the electric charge is held until the next row is selected. Information is retained.

  Here, since the inclination of the liquid crystal molecules corresponds to the stored information, the amount of transmitted light can be controlled, and gradation display can be performed. Further, when performing color display, light is mixed by using RGB color filters.

  FIG. 2 is a schematic diagram showing a configuration of a conventional liquid crystal display device. Here, in the liquid crystal display device shown in FIG. 2A, an upper data signal line / driver 3 and a lower data signal line / driver in which the scanning line driver 1 and display data are supplied to the periphery of the display unit 100. 5 is disposed. In the liquid crystal display device shown in FIG. 2B, the data signal line / driver 7 is disposed only on one side of the display unit 100.

  Thus, in most conventional liquid crystal panels, driver ICs for data signal lines and scanning lines are arranged in the form of TAB crimping and COG (Chip On Glass) mounting on the periphery of the panel. Each bus line is driven to realize image display.

  Recently, development of a liquid crystal display device of a polysilicon LCD type in which a driving circuit is directly formed on a glass substrate (a TFT substrate of a liquid crystal panel) using a polycrystalline silicon material has been advanced. Since this polysilicon LCD type liquid crystal display device forms a drive circuit on a glass substrate, it is effective in reducing a so-called frame space around the display screen. In addition, since the circuit is created in the TFT substrate creation process, there is an advantage that the number of steps for incorporating an IC later is reduced. Due to the contents as described above, since the screen and the resolution of the polysilicon LCD are increasing more and more, the polysilicon LCD is expected to greatly penetrate into the future liquid crystal display market.

  Here, in the driving circuit for the liquid crystal panel of the polysilicon LCD system as described above, display data is sequentially sent to each block constituting the display unit via the data signal line (block sequential system), and the panel is divided. Adoption of a driving system is being studied.

  FIG. 3 is a diagram showing a configuration of a conventional liquid crystal display device adopting a block sequential method. As shown in FIG. 3, the conventional liquid crystal display device adopting the block sequential method includes a display unit 100, a driver IC 9, a shift register 11, a multiplexer 13, a buffer 15, a video line VL, and an analog switch AS. Is provided. In the example shown in FIG. 3, the number of pixels of the display unit 100 is (800 × RGB × 600) and is divided into blocks BL1 to BL8, and the driver IC 9 has eight block selection signals SBL1 to SBL1. SBL8, display signals D1 to D300, and gate control signal GC are input.

  The analog switch AS is turned on in response to the block selection signal, and the display signal is supplied to the corresponding block through the video line VL and the data signal line DL.

  Here, as an advantage of the liquid crystal display device adopting the block sequential system having the above-described configuration, first, the circuit formed on the glass substrate is about the selector unit in which the analog switch AS is arranged in parallel. The circuit constituting the circuit can be simplified, and the yield of the liquid crystal panel can be improved.

  Furthermore, since a conventional general-purpose data driver can be used, a polysilicon LCD can be produced at a low cost. In addition, with the increase in the number of divided blocks and the use of a multi-output IC as a general-purpose data driver, development toward the realization of an even larger screen and high-definition polysilicon LCD is underway.

  However, when proceeding with the development as described above, when using a general-purpose driver, it is essential to improve the driving capability of the driver. In other words, in the conventional driver, the data bus or video line charge-up time corresponding to each block does not match the timing of the division drive, so that the data switching cannot be performed smoothly. There was a problem of becoming.

  On the other hand, a liquid crystal panel formed by an amorphous silicon process is provided with only pixel cells, switching elements, data signal lines, and scanning lines that are arranged in a matrix to form a display portion. Here, the pixel cell includes a pixel electrode 110, a common electrode facing the pixel electrode 110, and a liquid crystal layer provided between these electrodes.

  A data driver for driving the display of the panel receives an analog or several bits digital gradation signal from a personal computer or the like, and converts it into an analog gradation voltage of 64 gradations or 256 gradations in the case of a digital gradation signal. By supplying to the liquid crystal panel, multi-gradation display is performed.

  Here, in a liquid crystal panel (hereinafter also simply referred to as a “panel”) formed using polysilicon, a driving circuit or a part thereof may be simultaneously formed on a panel glass as a peripheral circuit of the display portion together with the display portion. it can. On the scanning line side, it is possible to configure a scanning line driver as the driving circuit, and on the data signal line side, a part of the driving circuit is formed on the panel glass, and the control created by the control circuit outside the panel The data signal line side peripheral circuit is controlled by the signal to enable block sequential driving.

  However, in the case of a peripheral circuit provided on a panel formed using polysilicon, the voltage for operating the peripheral circuit is at an IC logic level such as 3.3 V because of the characteristics of the transistors included in the peripheral circuit. And a high voltage, for example, 10 V or more is required. Therefore, there is a problem that level conversion is required between the logic level of the control signal used outside the panel and the operating voltage of the peripheral circuit formed on the panel.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide a liquid crystal display device capable of obtaining a good display image.

  An object of the present invention includes a peripheral circuit that supplies image display data to a display unit in response to a supplied first control signal, and a driving unit that supplies the first control signal and image display data to the peripheral circuit. What is claimed is: 1. A liquid crystal display device, comprising: a level conversion unit that is built in a driving unit and generates a first control signal by converting a level of a supplied second control signal. Achieved by providing. According to such means, the first control signal having a level suitable for the operation of the peripheral circuit can be generated with a simple configuration.

  In particular, when the display unit and the peripheral circuit are integrally formed on the same substrate, level conversion corresponding to the characteristics of the substrate is required.

  In addition, if the display unit further includes a division control signal generation unit that generates a second control signal that is incorporated in the drive unit and controls the display unit according to a signal supplied from the outside of the drive unit, the display unit It can be driven in a divided manner.

  Here, if it is further provided with a selection unit that is built in the driving unit and selectively supplies the second control signal generated by the divided control signal generation unit to the level conversion unit, it corresponds to the resolution of the display unit. It becomes possible to set the number of divisions.

  If the level conversion means generates the first control signal in accordance with the voltage supplied to the drive means in the above, the power supply for the level conversion means becomes unnecessary and is supplied from the outside of the liquid crystal display device. If the first control signal is generated according to the applied voltage, the level of the first control signal can be easily adjusted by changing the level of the voltage supplied from the outside.

  Another object of the present invention is a liquid crystal display device that displays an image on a display unit in accordance with image display data supplied via a plurality of data signal lines, and a plurality of the same image display data that are simultaneously output are shared. This is achieved by providing a liquid crystal display device comprising a driving means for driving the data signal line. According to such means, the drive capability of the data signal line can be increased.

  Here, the driving means may supply image display data corresponding to each data signal line.

  According to the liquid crystal display device of the present invention, the drive capability of the data signal line can be increased, and thus a good display image can be obtained.

  Here, if the number of driving means for driving the data signal line is switched in accordance with the type of the display portion, the driving capability of the data signal line can be easily optimized, so that versatility is improved. Can do.

  Further, according to the liquid crystal display device of the present invention, a control signal having a level suitable for the operation of the peripheral circuit can be generated with a simple configuration, so that the circuit scale and manufacturing cost can be reduced.

  Further, in a panel that is driven by dividing the display unit into a plurality of blocks, the display unit includes a unit that generates a control signal for block selection and a unit that selects the number of block divisions. It is possible to easily realize image display according to the resolution and size.

  If the level conversion means generates a control signal in accordance with the voltage supplied to the drive means, the power supply for the level conversion means becomes unnecessary, so that the circuit scale can be suppressed.

  Further, if the level conversion means generates a control signal according to the voltage supplied from the outside of the liquid crystal display device, the level of the control signal can be easily adjusted by changing the level of the voltage supplied from the outside. Therefore, it is possible to easily optimize the level of the control signal and reduce power consumption.

It is a top view which shows the panel structure of the conventional active matrix-type liquid crystal display device. It is the schematic which shows the structure of the conventional liquid crystal display device. It is a figure which shows the structure of the conventional liquid crystal display device which employ | adopted the block sequential system. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 1 of this invention. FIG. 5 is a schematic diagram illustrating a configuration of a driver IC illustrated in FIG. 4. 5 is a timing chart illustrating an operation of the liquid crystal display device illustrated in FIG. 4. It is an enlarged view which shows the waveform of the TAB output shown by FIG. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 2 of this invention. It is a figure explaining the structure of the output buffer contained in the data driver which concerns on Embodiment 2 of this invention. It is a graph explaining operation | movement of the output buffer which concerns on Embodiment 2 of this invention. It is a figure which shows the structure of the driver IC which concerns on Embodiment 3 of this invention. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 4 of this invention. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 5 of this invention. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 6 of this invention. It is a figure which shows the structure of the liquid crystal display device containing the liquid crystal panel by the conventional amorphous silicon. It is a figure which shows the structure of the liquid crystal display device which concerns on Embodiment 7 of this invention. FIG. 17 is a diagram for explaining the operation of the level shift circuit shown in FIG. 16. It is a figure which shows the structure of the data driver IC which concerns on Embodiment 8 of this invention. FIG. 19 is a timing chart showing an operation of the data driver IC shown in FIG. 18. FIG. It is a figure which shows the other structural example of the liquid crystal display device which concerns on Embodiment 8 of this invention. It is a figure explaining the structure of the level shift circuit which concerns on Embodiment 9 of this invention. It is a figure explaining the structure of the level shift circuit which concerns on Embodiment 10 of this invention.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same reference numerals indicate the same or corresponding parts.

  In the liquid crystal display device according to the embodiment of the present invention, in the output unit included in the driving circuit of the liquid crystal panel, one output line is driven by a plurality of output buffers, and is output from the data driver. The switching of the data signal on the video line and the data signal line is facilitated.

  By increasing the driving capability as described above, the charge-up time of the video line and the data signal line is shortened, and the charge-up can be performed without problems even when the display data is switched for each block. A driving circuit suitable for a sequential type polysilicon LCD can be created, and a good display can be obtained.

  In other words, the liquid crystal display device according to the embodiment of the present invention relates to a drive circuit for a polysilicon LCD capable of displaying an image using a general-purpose data driver, and is particularly effective for block sequential driving. Note that the “block sequential method” is a method in which the data output from the data driver as described above is associated with the number of divisions of the liquid crystal panel, and data is supplied to and held on the data signal lines of each block as needed. It is.

  Here, since the charge-up time of data to each block according to the number of divisions is one horizontal period / number of divisions, the conventional general-purpose data driver does not charge up data in a short time as described above. It was considered impossible.

  Therefore, in the liquid crystal display device according to the embodiment of the present invention, as described above, by connecting a plurality of output lines of the general-purpose data driver to one video line or data signal line, data is obtained using a plurality of buffers. Is output.

  Alternatively, the output circuit included in the driver to be used is equipped with a plurality of output buffer circuits in advance, and the output buffer circuit is switched according to the type of the liquid crystal panel, so that the liquid crystal panel is charged with an optimum driving capability. A driving circuit capable of performing the above is provided.

  By using a plurality of output buffers in this way, the data charge-up time can be significantly shortened compared to when data is output from one buffer. Furthermore, by realizing short-time data charge-up, it is possible to sufficiently perform writing for each block in the liquid crystal panel, to improve the quality of the liquid crystal image display, and to achieve high performance on a large screen. Even in a fine liquid crystal panel, a good liquid crystal image display can be obtained.

  The liquid crystal display device according to the embodiment of the present invention will be specifically described below.

[Embodiment 1]
FIG. 4 is a diagram showing a configuration of the liquid crystal display device according to Embodiment 1 of the present invention. As shown in FIG. 4, the liquid crystal display device according to the first embodiment has the same configuration as the liquid crystal display device shown in FIG. 3, but the configuration of the driver IC 29 is different.

  Here, the output circuit portion of the driver IC 29 is provided with a plurality of output buffers BF in order to drive the display signals D1 to D300 as shown in FIG. For example, every two output buffers BF are connected to the common data signal line DL via the video line VL, and arranged on the same side with respect to the common data signal line DL.

  At this time, although the number of buffers to be used is increased, a block sequential method is adopted in which data is held by sequentially driving each part of the display unit 100 divided by equal division. The number of driver ICs to be reduced is small.

  Next, the operation of the liquid crystal display device according to the first embodiment will be described with reference to the timing chart shown in FIG. First, the timing at which the display signals D1 to D300 are output from the driver IC 29 to the video line VL is controlled by the latch signal (latch pulse) LP shown in FIG. 6A, and FIG. 6B and FIG. As shown in c), display signals supplied from the block BL1 to the block BL8 of the display unit 100 are sequentially output to the video line VL. Therefore, the waveform of the TAB output shown in FIGS. 6B and 6C is the same as the waveform of the signal transmitted through the video line VL.

  Then, as shown in FIGS. 6 (d) to 6 (g), the block selection signals SBL1 to SBL8 are sequentially written from the video line VL to the data signal line included in each block. It is executed by being activated to a high level. That is, when the block selection signals SBL1 to SBL8 are activated to a high level, the analog switches AS corresponding to the selected blocks BL1 to BL8 are turned on, so that the data signal line groups included in the blocks are sequentially transferred. The display signal is held.

  Here, the TFT is turned on for each horizontal line (row) in accordance with the gate control signal GC supplied from the driver IC 29 to the shift register 11 and the multiplexer 13, and data is written to each pixel cell of the display unit 100. The image is displayed.

  Further, as shown in FIGS. 6B and 6C, in order to prevent the so-called flickering of the display unit 100, the odd-numbered and even-numbered dots (pixel cells) in the TAB output supplied to each block. ), The polarity of the display signal is always reversed, and the TAB output supplied to each block at the same time is subjected to AC control of the applied voltage in order to prevent pixel cells from burning.

  Here, as shown in FIG. 7, for example, when black is written in the pixel cell of the block BL1 and white is written in the pixel cell of the block BL2, the display signal is set to the black level at the time t1 for the odd-numbered pixel cell. And the applied voltage is set to the white level voltage VwH at time t2. At this time, a time t is required to make a transition from the white level voltage VwH to the black level voltage VbH at time t1, and a time t is made to make the transition from the black level voltage VbH to the white level voltage VwH at time t2. In addition, at time t3, it takes time t to make a transition from voltage VwH to voltage VbH.

  Similarly, for the even-numbered pixel cells, the display signal is set to the black level voltage VbL at time t1, and the applied voltage is set to the white level voltage VWL at time t2. At this time, a time t is required to make a transition from the white level voltage VwL to the black level voltage VbL at time t1, and a time t to make the transition from the black level voltage VbL to the white level voltage VwL at time t2. It will be necessary.

  In the above, according to the liquid crystal display device according to the first embodiment of the present invention, the display signals D1 to D300 are driven by the plurality of output buffers, so the data charge-up time is shortened and the time t is set to (1 horizontal). (Period / number of divisions). Thereby, writing for each block in the display unit 100 can be performed at high speed and sufficiently, and the quality of the liquid crystal image display can be improved. Therefore, a good liquid crystal image display can be obtained even on a large-screen and high-definition liquid crystal panel.

[Embodiment 2]
FIG. 8 is a diagram showing a configuration of a liquid crystal display device according to Embodiment 2 of the present invention. As shown in FIG. 8, the liquid crystal display device according to the second embodiment includes a shift register unit 20, a data input unit 21, a data register unit 22, a latch unit 23, a decoder unit 24, a reference power generation unit 25, a selector. A data driver unit 19 including a unit 26 and an output unit 27, a scanning line driver unit 28, and a display unit 100 are provided.

  Here, a data signal is supplied to the data input unit 21 and the shift register unit 20, and a control signal such as a data clock signal CLK is further supplied to the shift register 20. The data register unit 22 is connected to the data input unit 21 and the shift register unit 20, and the latch unit 23 is connected to the data register unit 22. The decoder unit 24 is connected to the latch unit 23, and the selector unit 26 is connected to the decoder unit 24 and the reference power source generating unit 25. The output unit 27 is connected to the selector unit 26, and the display unit 100 is connected to the output unit 27 and the scanning line driver unit 28.

  In the liquid crystal display device according to the second embodiment of the present invention having the above-described configuration, a plurality, for example, two of each are connected to each data signal line DL laid on the display unit 100 in the output unit 27. Output buffer BF. Each output buffer BF is connected to the data signal line DL according to the switch control signal SW supplied to the output unit 27.

  That is, in the liquid crystal display device according to the second embodiment, each of the data signal lines DL1 to DL3 is driven by one output buffer BF as shown in FIG. 9 (i) in response to the switch control signal SW. As shown in FIG. 9 (ii), each of the data signal lines DL1 to DL3 can be driven by two output buffers BF. Furthermore, as shown in FIG. 9 (iii), each of the data signal lines DL1 and DL2 can be driven by four output buffers BF. Here, the switch control signal SW is a signal for activating or deactivating each output buffer BF.

  Therefore, the number of output buffers BF for driving each data signal line DL is switched by the switch control signal SW according to the required driving capability. Note that the required number of output buffers BF varies depending on, for example, the type of the display unit 100 (depending on the resolution and size of the display unit 100).

  As shown in FIG. 10, when each data signal line DL is driven by one output buffer BF, the time variation of the potential VDL of the data signal line DL is indicated by a solid line L1, and each data signal line DL is Is driven by two output buffers BF, the time variation of the potential VDL of the data signal line DL is indicated by a broken line L2, and when each data signal line DL is driven by three output buffers BF, the data signal The time fluctuation of the potential VDL of the line DL is indicated by a one-dot chain line L3. As shown in FIG. 10, the potential VDL of the data signal line DL increases exponentially so as to converge to the target potential Vid.

  Accordingly, as each data signal line DL is driven by more output buffers BF, the driving capability increases and the time for the potential VDL to reach the target potential Vid is shortened. Therefore, the driving capability is optimized according to the type of the display unit 100. Can be Further, as described above, according to the liquid crystal display device according to the second embodiment, since each data signal line DL can be driven by one output buffer BF, a driver IC including the output buffer BF is used as a general-purpose driver. It can also be used as

  In the liquid crystal display device according to the second embodiment, the data driver unit 19 is formed on a substrate different from the substrate on which the display unit 100 is formed as shown in FIG. At least one portion included may be formed on the same substrate as the substrate on which the display unit 100 is formed.

[Embodiment 3]
FIG. 11 is a diagram showing a configuration of a driver IC according to the third embodiment of the present invention. As shown in FIG. 11, the driver IC 32 according to the third embodiment is connected to the TAB substrate 31, and includes a data input unit 33, a data rearrangement circuit 34, a data holding circuit 35, and an output unit 36. Including. As shown in FIG. 11, the control board 30 is connected to the TAB board 31.

  Here, the data input unit 33 is connected to the TAB substrate 31, and the data rearrangement circuit 34 is connected to the data input unit 33. The data holding circuit 35 is connected to the data rearrangement circuit 34, and the output unit 36 is connected to the data holding circuit 35.

  As shown in FIG. 11, the output unit 36 includes a plurality of output buffers BF connected in parallel to each data signal line DL. That is, the driver IC 32 shown in FIG. 11 has a data rearrangement function, and each data signal line DL is driven by a plurality of output buffers BF, so that the drive capability of the data signal line DL can be increased.

  Similarly to the output unit 27 according to the second embodiment shown in FIG. 8, if the on / off of each output buffer BF included in the output unit 36 can be switched, the data signal line DL is connected. On the other hand, since the data signal lines DL can be driven by one to one or the number of output buffers BF corresponding to the liquid crystal panel, versatility can be improved.

  In the above description, the data rearrangement circuit 34 shown in FIG. 11 is provided on the control board 30 and the output unit 36 is provided on the glass substrate on which the liquid crystal panel is formed, so that a general-purpose driver is used instead of the driver IC 32. be able to.

[Embodiment 4]
FIG. 12 is a diagram showing a configuration of a liquid crystal display device according to Embodiment 4 of the present invention. As shown in FIG. 12, the liquid crystal display device according to the fourth embodiment of the present invention includes a display unit 101, a scanning line driver 1, three drivers ICDRV1 to DRV3, and a wiring unit 37. The display unit 101 includes data signal lines DL1 to DL6.

  Here, in the liquid crystal display device according to the fourth embodiment, the wiring unit 37 is provided on one side with respect to the display unit 101, and the three drivers ICDRV 1 to DRV 3 are all connected to the wiring unit 37. In the liquid crystal display device according to the fourth embodiment, the data signal lines DL1 to DL6 are connected to three general-purpose drivers in the wiring section 37, respectively.

  According to the configuration as described above, each data signal line DL1 to DL6 can be driven simultaneously by three drivers (output buffers included in the driver), so that the driving capability of the data signal lines DL1 to DL6 is increased, Data charge-up can be performed sufficiently.

  The wiring portion 37 may be provided on a driver TAB printed board attached to the glass substrate in addition to being provided on the glass substrate on which the display portion 100 is formed.

[Embodiment 5]
FIG. 13 is a diagram showing a configuration of a liquid crystal display device according to Embodiment 5 of the present invention. As shown in FIG. 13, the liquid crystal display device according to the fifth embodiment includes a driver IC 39, a video line VL, an analog switch (A-Sw) unit 43, and a display unit 101. An output unit 41 is included. Here, as an example, a case where the number of outputs of the output unit 41 is 300 and 100 video lines VL are laid is shown.

  Here, since a plurality of output buffers are connected to each of the plurality of video lines VL arranged in parallel, the driving capability is increased. For example, as shown in FIG. 13, three output buffers are provided for each video line VL. When connected, the driving capability is tripled. Therefore, the drive capability can be increased as the number of output buffers connected to each video line VL is increased.

  More specifically, output buffers BF1, BF101, and BF201 are connected to the video line VL1, and the data signal supplied to the video line VL1 is output to the data signal line DL1.

  If the analog switch unit 43 shown in FIG. 13 can be switched, the display unit 101 can be divided and driven.

  The video lines VL are formed on a glass substrate on which the display unit 101 is formed or on a TAB substrate attached to the glass substrate.

  As described above, according to the liquid crystal display device according to the fifth embodiment of the present invention, each video line VL is driven by a plurality of output buffers, and display signals are supplied to the data signal lines DL and DL1 through the video lines VL. Therefore, the driving capability of the data signal lines DL and DL1 can be increased.

[Embodiment 6]
FIG. 14 is a diagram showing a configuration of a liquid crystal display device according to Embodiment 6 of the present invention. As shown in FIG. 14, the liquid crystal display device according to the sixth embodiment includes a two-port input driver IC 45 for simultaneously inputting two sets of signals corresponding to RGB colors. In this liquid crystal display device, the same data is supplied to the two ports.

  Here, as shown in FIG. 14, on the glass substrate or the driver TAB substrate, each output line OL is connected to a plurality of video lines VL that transmit the same color signal, and the video lines VL and data signals of the polysilicon LCD. Line DL is driven. In this case, however, a 2-port input type general-purpose driver is used in consideration of a combination of input data signals.

  Then, if RGB display signals of the same color (for example, display signals D1 and D4) are transmitted through a common output line OL, and the same data is input at, for example, two ports, driving for each data signal line DL via the analog switch AS. Ability can be increased. That is, the driver IC 45 can supply a display signal corresponding to each data signal line DL.

  Further, unlike the liquid crystal display device shown in FIG. 13, the liquid crystal display device according to the sixth embodiment has the output line OL connected to the data signal line DL connected to the video line VL at a plurality of locations as described above. Therefore, it is possible to expect an effect that also serves as redundancy. The sixth embodiment can be similarly applied not only to a 2-port input but also to a multi-port input driver.

  As described above, according to the first to sixth embodiments of the present invention, since one video line VL and data signal line DL are driven by a plurality of output buffers, the drive capability is improved and the data charge up time is shortened. Can be

  That is, in the prior art, the minimum time required for data charge-up by the block sequential method is one horizontal period / the number of divisions or longer than that. However, in the liquid crystal display device according to the embodiment of the present invention, Accordingly, the actual data charge-up time can be shorter than one horizontal period / number of divisions.

  Therefore, it is possible to avoid the problem that the driving ability is insufficient and the data does not reach the expected value, and a good liquid crystal image display can be obtained. Note that since the above-described embodiment can be realized using a general-purpose driver, a liquid crystal image display with good quality can be obtained in a liquid crystal display device that is increasing in screen size and resolution, and costs are reduced. You can also.

[Embodiment 7]
In the case of a peripheral circuit integrated panel, a data signal line group can be divided into several blocks by forming a peripheral circuit including an analog switch in the data signal line side input portion of the panel and controlling the peripheral circuit. Then, block sequential driving in which a display voltage is applied to the display unit for each block is possible. A general-purpose liquid crystal display driver IC can be used as a drive circuit for realizing this drive.

  Incidentally, it is necessary to supply a control signal to the dividing circuit provided on the data signal line side, the shift register circuit provided on the scanning line side, and the like. Here, the control signal is required to be a high voltage instead of a low voltage logic level which is standard in a general integrated circuit. Therefore, in the liquid crystal display device according to the seventh embodiment, a level shift circuit is used to generate such a control signal, and the level shift circuit is built in the data driver IC.

  Since the digital data driver has, for example, a logic level of about 3V on the input side and a high voltage level of 10V or more on the output side gradation voltage, the digital data driver has a withstand voltage even if the above-described level shift circuit is incorporated. There is no problem with this aspect.

  The level shift circuit may be of any type as long as the input side transistor operates with a low voltage power source and the output side transistor operates with a high voltage power source.

  On the other hand, in the conventional liquid crystal panel 103 made of amorphous silicon, as shown in FIG. 15, the data driver IC (DD) provided on the data signal line side for driving the display unit 101 is constituted only by the driver unit. That is, in the conventional liquid crystal display device, the drive circuits are arranged in parallel, and analog voltages of 64 gradations or 256 gradations are output from the drive circuit group. As shown in FIG. 15, a scanning line driver IC (GD) for driving the scanning line is arranged in parallel on the scanning line side.

  On the other hand, as shown in FIG. 16, the liquid crystal display device according to the seventh embodiment has a data side peripheral circuit 51 and a gate side peripheral in addition to the display unit 101 including pixel cells arranged in a matrix. A peripheral circuit integrated liquid crystal panel 102 including a circuit 53 and a data driver IC 46 for driving the liquid crystal panel 102 by incorporating a level shift circuit 49 together with the driver unit 47 are provided.

  The control signals for the peripheral circuits of the display unit 101 include block division signals on the data signal line side, and gate clock signals and shift-in signals for the scanning line drivers formed on the liquid crystal panel 102 on the scanning line side. However, these signals are generated by an external control circuit 55 provided outside the liquid crystal panel 102.

  Since the control signal generated by the external control circuit 55 has a low voltage logic level, the peripheral circuit of the display unit 101 cannot be directly controlled. Therefore, since the level of the signal needs to be converted into a high voltage signal capable of controlling the data side peripheral circuit 51 and the gate side peripheral circuit 53 as described above, the level shift circuit 49 is incorporated in the data driver IC 46. Let

  Here, since the power supply voltage of the general-purpose data driver is 10 V or more, if the power supply voltage of the level shift circuit 49 is the same as the power supply voltage of the general-purpose data driver, as shown in FIG. Levels VIH and VIL can be converted to output levels VOH and VOL, and a control signal having a high voltage can be generated.

  Therefore, in the liquid crystal display device according to the seventh embodiment, the circuit scale and manufacturing cost of the entire liquid crystal display device are reduced as compared with the conventional device in which the external control circuit 55 performs level conversion of the control signal. be able to.

[Embodiment 8]
In general, in a liquid crystal display device including a liquid crystal panel integrated with a peripheral circuit as described above, an analog switch is included in the drive input unit on the data signal line side as the peripheral circuit. Then, the circuit corresponding to the number of data signal lines is divided into several blocks, and sequentially driven for each block. At this time, in order to realize the driving for each block, a signal for controlling the analog switch group is required.

  Here, although the control signal may be several tens, for example, depending on the number of divided blocks, a shift register circuit is built in the data driver IC as means for generating the control signal. That is, as shown in FIG. 18, the data driver IC 57 has a shift register unit 59 to which the clock signal CLK and the shift-in input signal SI are supplied, and a level connected to the shift register unit 59 to output the selection signals SS1 to SS16. And a shift unit 61.

  According to the data driver IC 57 having such a configuration, the number of input terminals can be reduced, so that the yield in mounting can be improved.

  The shift register unit 59 operates with a signal having a logic level, such as a shift-in input signal SI, but the signal output from the shift register unit 59 is converted into a high voltage range via the level shift unit 61, and the selection signal SS1. ~ SS16 is generated.

  Then, for example, as shown in FIGS. 19A to 19C, the selection signal SS1 is activated to a high level between time T1 and time T2, and the selection signal SS2 between time T2 and time T3. By supplying the selection signals SS1 to SS16 sequentially activated for a predetermined period to the analog switch group so as to be activated at a high level, the analog switch group is driven for each block, thereby realizing block sequential driving. be able to.

  FIG. 20 is a diagram showing another configuration example of the liquid crystal display device according to Embodiment 8 of the present invention. As shown in FIG. 20, the liquid crystal display device according to the eighth embodiment further includes a stage number setting / reset circuit 65 and a reset selection circuit 67 connected to the stage number setting / reset circuit 65. Can do.

  In the liquid crystal display device having such a configuration, the number of block divisions of the liquid crystal panel can be selected. That is, for example, if 2-bit signal setting 0 and setting 1 are input to the stage number setting / reset circuit 65, four types of predetermined block division numbers can be selected according to the combination of the logic levels of the signals.

  More specifically, the reset selection circuit 67 supplies the reset signal RS to the shift register unit 63 in accordance with the signal supplied from the stage number setting / reset circuit 65.

  As described above, according to the liquid crystal display device including the circuit shown in FIG. 20, it is possible to set the optimum number of block divisions for the resolution of the display unit of the liquid crystal panel, and image display according to the resolution and size of the liquid crystal panel. Can also be realized easily.

[Embodiment 9]
In the level shift unit according to the seventh and eighth embodiments, the level shift circuit 69 shown in FIG. 21 can be used.

  That is, as shown in FIG. 21, the maximum voltage and the minimum voltage of the gradation voltage output range output from the gradation voltage generation unit 71 are used as the power source of the transistors constituting the level shift circuit 69. The output levels VOH and VOL of 69 are the gradation voltage range of the driver unit 47.

  From the above, according to the level shift circuit 69 according to the ninth embodiment, since the voltage generated by the gradation voltage generation unit 71 is used as a power supply, the necessity of providing a separate power supply is avoided, so that the liquid crystal The circuit scale of the entire display device can be reduced.

[Embodiment 10]
In the level shift unit according to the seventh and eighth embodiments, the level shift circuit 73 shown in FIG. 22 can be used.

  That is, as shown in FIG. 22, an input terminal for inputting a power supply voltage for level shift is provided in the level shift circuit 73, and external power supply voltages VHH and VLL are supplied to the input terminal from the outside of the liquid crystal display device. The output levels VOH and VOL of the level shift circuit 69 are set to the external power supply voltages VHH and VLL.

  Therefore, according to the level shift circuit 73 according to the tenth embodiment, the voltage supplied from the outside of the liquid crystal display device is optimized as a low voltage within a range in which the peripheral circuit of the liquid crystal panel can operate, whereby the liquid crystal display device Power consumption can be reduced.

1 Scanning line driver 3 Upper data signal line / driver 5 Lower data signal line / driver 7 Data signal line / driver 9, 29, 32, 39, 45, DRV1 to DRV3 driver IC
11 Shift register 13 Multiplexer 15 Buffer 19 Data driver unit 20, 59, 63 Shift register unit 21 Data input unit 22 Data register unit 23 Latch unit 24 Decoder unit 25 Reference power source generation unit 26 Selector units 27, 36, 41 Output unit 28 Scan Line driver section 30 Control board 31 TAB board 33 Data input section 34 Data rearrangement circuit 35 Data holding circuit 37 Wiring section 43 Analog switch (A-Sw) sections 46, 57 Data driver IC
47 Driver unit 49 Level shift circuit 51 Data side peripheral circuit 53 Gate side peripheral circuit 55 External control circuit 61 Level shift unit 65 Stage setting / reset circuit 67 Reset selection circuit 69, 73 Level shift circuit 71 Gradation voltage generation unit 100, 101 Display units 102 and 103 Liquid crystal panel 110 Pixel electrode 112 Switching element 114 Scan line BF, BF1 to BF300 Output buffer AS Analog switch VL, VL1 Video line DL, DL1 to DL6 Data signal line OL Output line Cd Data signal line capacitance

Claims (8)

A liquid crystal display device comprising: a peripheral circuit that supplies image display data to a display unit in response to a supplied first control signal; and a driving unit that supplies the first control signal and the image display data to the peripheral circuit Because
A liquid crystal display device, comprising: a level conversion unit that is built in the driving unit and generates the first control signal by converting the level of the supplied second control signal.   The liquid crystal display device according to claim 1, wherein the display unit and the peripheral circuit are integrally formed on the same substrate.   The division control signal generation unit that generates the second control signal that is incorporated in the drive unit and that controls the display unit according to a signal supplied from the outside of the drive unit. Liquid crystal display device.   4. The liquid crystal display device according to claim 3, further comprising a selection unit that is built in the driving unit and selectively supplies the second control signal generated by the division control signal generation unit to the level conversion unit.   The liquid crystal display device according to claim 1, wherein the level conversion unit generates the first control signal in accordance with a voltage supplied to the driving unit.   The liquid crystal display device according to claim 1, wherein the level conversion unit generates the first control signal in accordance with a voltage supplied from outside the liquid crystal display device. A liquid crystal display device that displays an image on a display unit according to image display data supplied via a plurality of data signal lines,
A liquid crystal display device comprising: a driving unit that drives the data signal lines by supplying a plurality of the same image display data to be simultaneously output to the common data signal line.   The liquid crystal display device according to claim 7, wherein the driving unit supplies the image display data corresponding to each data signal line.

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