JP2008171882A - Storage element and memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a storage element capable of accelerating its operation with a low current. <P>SOLUTION: The storage element 1 is constituted so that a storage layer 17 for storing information with the magnetization state of a magnetic body is disposed, a magnetization fixing layer 31 is provided via an intermediate layer made of an insulator for the storage layer 17, electrons that are spin-polarized in a laminating direction are implanted so that the direction of magnetization M1 of the storage layer 17 is changed and information is recorded into the storage layer 17, and a magnetic layer 22, having a magnetization component M22 of a laminate direction, is disposed around the external periphery of the storage layer 17. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a memory element that changes the magnetization direction of a memory layer by injecting spin-polarized electrons and a memory including the memory element, and is suitable for application to a nonvolatile memory.

In information devices such as computers, DRAMs with high speed and high density are widely used as random access memories.
However, since DRAM is a volatile memory in which information disappears when the power is turned off, a nonvolatile memory in which information does not disappear is desired.

  As a candidate for a nonvolatile memory, a magnetic random access memory (MRAM) that records information by magnetization of a magnetic material has attracted attention and is being developed.

  In the MRAM, current is supplied to two types of address lines (word lines and bit lines) that are substantially orthogonal to each other, and the magnetization of the magnetic layer of the magnetic memory element at the intersection of the address lines is caused by a current magnetic field generated from each address line. Inverted information is recorded.

A schematic diagram (perspective view) of a general MRAM is shown in FIG.
A drain region 108, a source region 107, and a gate electrode 101 constituting a selection transistor for selecting each memory cell are formed in a portion separated by the element isolation layer 102 of the semiconductor substrate 110 such as a silicon substrate. Has been.
A word line 105 extending in the front-rear direction in the figure is provided above the gate electrode 101.
The drain region 108 is formed in common to the left and right selection transistors in the drawing, and a wiring 109 is connected to the drain region 108.
A magnetic storage element 103 having a storage layer whose magnetization direction is reversed is disposed between the word line 105 and the bit line 106 disposed above and extending in the horizontal direction in the drawing. The magnetic memory element 103 is composed of, for example, a magnetic tunnel junction element (MTJ element).
Further, the magnetic memory element 103 is electrically connected to the source region 107 via the horizontal bypass line 111 and the vertical contact layer 104.
By applying current to each of the word line 105 and the bit line 106, a current magnetic field is applied to the magnetic memory element 103, thereby reversing the magnetization direction of the memory layer of the magnetic memory element 103 and recording information. be able to.

In order to stably hold recorded information in a magnetic memory such as MRAM, it is necessary that a magnetic layer (storage layer) for recording information has a certain coercive force.
On the other hand, in order to rewrite the recorded information, a certain amount of current must be passed through the address wiring.
However, as the elements constituting the MRAM become finer, the address wiring becomes thinner, so that a sufficient current cannot flow.

Accordingly, attention has been paid to a memory having a configuration using magnetization reversal by spin injection as a configuration capable of performing magnetization reversal with a smaller current (for example, Patent Document 1, Patent Document 2, Non-Patent Document 1, and Non-Patent Document 2). reference).
Magnetization reversal by spin injection is to cause magnetization reversal in another magnetic material by injecting spin-polarized electrons that have passed through the magnetic material into another magnetic material.

  For example, when a current is passed through a giant magnetoresistive element (GMR element) or a magnetic tunnel junction element (MTJ element) in a direction perpendicular to the film surface, magnetization of at least a part of the magnetic layer of these elements is performed. Can be reversed.

  Magnetization reversal by spin injection has an advantage that magnetization reversal can be realized without increasing current even if the element is miniaturized.

Schematic diagrams of a memory having a configuration using the above-described magnetization reversal by spin injection are shown in FIGS. 5 is a perspective view, and FIG. 6 is a cross-sectional view.
A drain region 58, a source region 57, and a gate electrode 51 constituting a selection transistor for selecting each memory cell are formed in a portion separated by the element isolation layer 52 of the semiconductor substrate 60 such as a silicon substrate. Has been. Of these, the gate electrode 51 also serves as a word line extending in the front-rear direction in FIG.
The drain region 58 is formed in common with the left and right selection transistors in FIG. 5, and a wiring 59 is connected to the drain region 58.
A storage element 53 having a storage layer whose magnetization direction is reversed by spin injection is disposed between the source region 57 and the bit line 56 disposed above and extending in the left-right direction in FIG.
The storage element 53 is configured by, for example, a magnetic tunnel junction element (MTJ element). In the figure, reference numerals 61 and 62 denote magnetic layers. Of the two magnetic layers 61 and 62, one magnetic layer is a magnetization fixed layer whose magnetization direction is fixed, and the other magnetic layer is a magnetization direction. A changing magnetization free layer, that is, a storage layer is used.
The storage element 53 is connected to the bit line 56 and the source region 57 via the upper and lower contact layers 54, respectively. As a result, a current can be passed through the memory element 53 to reverse the magnetization direction of the memory layer by spin injection.

Such a memory using a magnetization reversal by spin injection has a feature that the device structure can be simplified as compared with the general MRAM shown in FIG.
Further, by utilizing magnetization reversal by spin injection, there is an advantage that the write current does not increase even when the element is miniaturized as compared with a general MRAM in which magnetization reversal is performed by an external magnetic field.

Phys. Rev. B 54.9353 (1996) J. et al. Magn. Mat. 159. L1 (1996) JP 2003-17782 A US Pat. No. 6,256,223

  In the case of an MRAM, a write wiring (word line or bit line) is provided separately from a memory element, and information is written (recorded) by a current magnetic field generated by passing a current through the write wiring. Therefore, a sufficient amount of current required for writing can be passed through the write wiring.

On the other hand, in a memory configured to use magnetization reversal by spin injection, it is necessary to reverse the magnetization direction of the storage layer by performing spin injection with a current flowing through the storage element.
Since the current is directly supplied to the memory element and information is written (recorded) as described above, the memory cell is configured by connecting the memory element to a selection transistor in order to select a memory cell to be written. In this case, the current flowing through the memory element is limited to the magnitude of the current that can flow through the selection transistor (the saturation current of the selection transistor).
Therefore, it is necessary to perform writing with a current lower than the saturation current of the selection transistor, and it is necessary to improve the efficiency of spin injection and reduce the current flowing through the memory element.

Also, in order to increase the read signal, it is necessary to secure a large rate of change in magnetoresistance. To that end, a memory element having a tunnel insulating layer (tunnel barrier layer) as an intermediate layer in contact with both sides of the memory layer is required. The configuration is effective.
When the tunnel insulating layer is used as the intermediate layer as described above, the amount of current flowing through the memory element is limited in order to prevent the tunnel insulating layer from being broken down. From this viewpoint, it is necessary to suppress the current during spin injection.

In a memory configured to use magnetization reversal by spin injection, spin injection is usually performed by passing a pulse current through a storage element.
However, when the pulse width of the pulse current is 50 ns (nanoseconds) or less, the amount of current (magnetization reversal current) required to reverse the magnetization direction of the storage layer increases rapidly as the pulse width decreases. A trend is observed (see, eg, IEDM 2005 Technical Digest (2005)).

For this reason, if the pulse width is shortened to increase the operation speed, the magnetization reversal current increases.
As the magnetization reversal current increases, the power consumed when recording information increases.
If the magnetization reversal current is larger than the saturation current of the selection transistor, the information write operation cannot be performed.
Therefore, it is difficult to increase the operation speed.

  In order to solve the above-described problem, the present invention provides a memory element that can increase the operation speed with a low current, and a memory including the memory element.

The memory element of the present invention has a memory layer that retains information according to the magnetization state of a magnetic material, and a magnetization pinned layer is provided to the memory layer via an intermediate layer, the intermediate layer is made of an insulator, and is laminated. By injecting spin-polarized electrons in the direction, the direction of magnetization of the storage layer changes, and information is recorded on the storage layer, around the outer periphery of the storage layer or the outer periphery of the storage layer A magnetic layer having a magnetization component in the stacking direction is disposed in the vicinity of the portion.
The memory of the present invention includes a memory element having a memory layer that holds information according to the magnetization state of the magnetic material, and two types of wirings that intersect each other, and the memory element has the configuration of the memory element of the present invention. A storage element is arranged near the intersection of two types of wiring and between the two types of wiring, a current in the stacking direction flows through the two types of wiring, and spin-polarized electrons are injected. .

According to the configuration of the above-described storage element of the present invention, the storage layer that holds information by the magnetization state of the magnetic material is provided, and the magnetization fixed layer is provided to the storage layer via the intermediate layer. By injecting electrons that are made of an insulator and spin-polarized in the stacking direction, the magnetization direction of the storage layer changes and information is recorded on the storage layer. Information can be recorded by injecting spin-polarized electrons.
Further, by arranging a magnetic layer having a magnetization component in the stacking direction around the outer periphery of the storage layer or in the vicinity of the outer periphery of the storage layer, from the magnetic layer having a magnetization component in the stacking direction, Since the magnetization in the outer peripheral portion of the storage layer can be tilted in the stacking direction by applying a magnetic field in the stacking direction, the magnetization direction of the storage layer can be easily reversed.
As a result, the pulse width of the write current can be shortened without increasing the amount of write current required to reverse the magnetization direction of the storage layer.

According to the configuration of the memory of the present invention described above, the memory element includes a memory element having a memory layer that holds information according to the magnetization state of the magnetic material, and two types of wiring intersecting each other. The memory element is arranged near the intersection of two types of wiring and between the two types of wiring, and a current in the stacking direction flows through the memory element through these two types of wiring, and spin-polarized electrons are injected. Accordingly, information can be recorded by flowing current in the stacking direction of the memory elements through two types of wiring.
Further, since the magnetization direction of the storage layer can be easily reversed, the pulse width of the write current can be shortened without increasing the write current amount.

According to the present invention described above, the pulse width of the current passed through the storage element when recording information can be reduced without increasing the amount of current (magnetization reversal current) required to reverse the magnetization direction of the storage layer. Since the pulse width can be shortened, the pulse width can be shortened and a higher-speed write operation can be performed.
Therefore, a memory that operates at a high speed with a low current can be realized.
In addition, the power consumption of the memory can be reduced with a low current.

  Note that the memory element of the present invention can be manufactured in the same manner as in the past (material, film thickness, magnitude of magnetization, etc.) in each layer other than the magnetic layer having a magnetization component in the stacking direction. It is not necessary to change the conditions and the like, and it can be easily manufactured.

First, an outline of the present invention will be described prior to description of specific embodiments of the present invention.
In the present invention, information is recorded by reversing the magnetization direction of the storage layer of the storage element by the spin injection described above. The memory layer is made of a magnetic material such as a ferromagnetic layer, and holds information by the magnetization state (magnetization direction) of the magnetic material.

The basic operation of reversing the magnetization direction of the magnetic layer by spin injection is perpendicular to the film surface of a storage element composed of a giant magnetoresistive element (GMR element) or a magnetic tunnel junction element (MTJ element). A current of a certain threshold value (Ic) or more flows in the direction. At this time, the polarity (direction) of the current depends on the direction of magnetization to be reversed.
When a current having an absolute value smaller than this threshold is passed, magnetization reversal does not occur.

  The above-described current threshold (Ic) can be referred to as a magnetization reversal current, for example.

Here, when recording information by spin injection, the pulse width of the pulse current flowing through the storage element and the magnetization reversal current, that is, the amount of current required to reverse the direction of magnetization of the storage layer (the above-described current The relationship with (threshold) is shown in FIG.
FIG. 8 shows that the magnetization reversal current increases rapidly when the pulse width is 50 ns (nanoseconds) or less, as described above.

On the other hand, for example, when the storage layer itself has a magnetization in the stacking direction (a direction perpendicular to the film surface), the magnetization direction of the storage layer can be reversed at a high speed. It is considered that a sudden increase in the magnetization reversal current can be suppressed.
However, with such a configuration, the magnetization of the storage layer becomes large, so that the magnetization reversal current itself becomes large regardless of the pulse width, that is, even if the pulse width is increased.

  Therefore, as a result of various studies by the inventors of the present application, the magnetization of the storage layer remains the same as the film surface direction as in the past, and the magnetization reversal is performed only by providing the magnetization component in the stacking direction only on the outer peripheral portion. It has been found that the pulse width can be shortened without increasing the current.

For this purpose, a magnetic layer having a magnetization component in the stacking direction, more preferably a hard magnetic layer (hard bias layer) is arranged around or in the vicinity of the outer periphery of the storage layer, directly or via an insulating layer. .
Thereby, a magnetic field in the stacking direction can be applied only to the outer peripheral portion of the storage layer, and the magnetization of the storage layer can be tilted in the stacking direction so as to be easily reversed.

Furthermore, in the present invention, in consideration of the saturation current value of the selection transistor, a magnetic tunnel junction (MTJ) using a tunnel insulating layer made of an insulator as a nonmagnetic intermediate layer between the storage layer and the magnetization fixed layer. Configure the element.
By constructing a magnetic tunnel junction (MTJ) element using a tunnel insulating layer, a magnetoresistance change rate (MR ratio) is compared with a case where a giant magnetoresistive effect (GMR) element is constructed using a nonmagnetic conductive layer. This is because the read signal intensity can be increased.

In addition, by using magnesium oxide (MgO) as a material of the tunnel insulating layer, the magnetoresistance change rate (MR ratio) is made larger than when aluminum oxide that has been generally used so far is used. be able to.
In general, the spin injection efficiency depends on the MR ratio, and the higher the MR ratio, the higher the spin injection efficiency and the lower the magnetization reversal current density.
Therefore, by using magnesium oxide as the material of the tunnel insulating layer which is an intermediate layer, the write threshold current by spin injection can be reduced, and information can be written (recorded) with a small current. In addition, the read signal intensity can be increased.
As a result, the MR ratio (TMR ratio) can be ensured, the write threshold current by spin injection can be reduced, and information can be written (recorded) with a small current. In addition, the read signal intensity can be increased.

  When the tunnel insulating layer is formed of a magnesium oxide (MgO) film, it is more desirable that the MgO film is crystallized and the crystal orientation is maintained in the 001 direction.

In the present invention, the intermediate layer (tunnel insulating layer) between the storage layer and the magnetization fixed layer is made of magnesium oxide, for example, aluminum oxide, aluminum nitride, SiO ₂ , Bi ₂ O ₃ , MgF ₂ , CaF, SrTiO ₂ , AlLaO ₃ , Al—N—O, and other various insulators, dielectrics, and semiconductors can also be used.

The magnetization fixed layer preferably has unidirectional anisotropy, and the storage layer preferably has uniaxial anisotropy.
Moreover, it is preferable that each film thickness of a magnetization fixed layer and a memory layer is 1 nm-30 nm.

  The other configuration of the storage element can be the same as a conventionally known configuration of the storage element that records information by spin injection.

The magnetization fixed layer has a configuration in which the magnetization direction is fixed only by the ferromagnetic layer or by using the antiferromagnetic coupling between the antiferromagnetic layer and the ferromagnetic layer.
In addition, the magnetization fixed layer has a single-layered ferromagnetic layer structure or a laminated ferrimagnetic structure in which a plurality of ferromagnetic layers are stacked via a nonmagnetic layer.
When the magnetization pinned layer has a laminated ferrimagnetic structure, the sensitivity of the magnetization pinned layer to the external magnetic field can be reduced. Therefore, unnecessary magnetization fluctuations in the magnetization pinned layer due to the external magnetic field are suppressed, and the memory element operates stably. Can be made. Furthermore, the film thickness of each ferromagnetic layer can be adjusted, and the leakage magnetic field from the magnetization fixed layer can be suppressed.
Co, CoFe, CoFeB, or the like can be used as the material of the ferromagnetic layer constituting the magnetization fixed layer having the laminated ferrimagnetic structure. Moreover, Ru, Re, Ir, Os etc. can be used as a material of a nonmagnetic layer.

Examples of the material of the antiferromagnetic layer include magnetic materials such as FeMn alloy, PtMn alloy, PtCrMn alloy, NiMn alloy, IrMn alloy, NiO, and Fe ₂ O ₃ .
In addition, nonmagnetic elements such as Ag, Cu, Au, Al, Si, Bi, Ta, B, C, O, N, Pd, Pt, Zr, Hf, Ir, W, Mo, and Nb are included in these magnetic materials. Can be added to adjust the magnetic properties and other physical properties such as crystal structure, crystallinity and material stability.

  In addition, the film configuration of the storage element has no problem whether the storage layer is disposed above the magnetization fixed layer or the lower layer.

  As a method for reading information recorded in the memory layer of the memory element, a ferromagnetic layer that flows through the insulating layer is provided by providing a magnetic layer serving as a reference of information via a thin insulating film in the memory layer of the memory element. Reading may be performed by a tunnel current or may be performed by a magnetoresistive effect.

Next, specific embodiments of the present invention will be described.
As an embodiment of the present invention, FIG. 1 shows a schematic configuration diagram (cross-sectional view) of a memory element.
In this storage element 1, a magnetization fixed layer 31 is provided as a lower layer with respect to the storage layer 17 in which the direction of the magnetization M1 is reversed by spin injection. The antiferromagnetic layer 12 is provided under the magnetization fixed layer 31, and the magnetization direction of the magnetization fixed layer 31 is fixed by the antiferromagnetic layer 12.
A tunnel insulating layer 16 serving as a tunnel barrier layer is provided between the storage layer 17 and the magnetization fixed layer 31. The storage layer 17 and the magnetization fixed layer 31 constitute an MTJ element.
A base layer 11 is formed below the antiferromagnetic layer 12, and a cap layer 18 is formed on the storage layer 17.

The magnetization fixed layer 31 has a laminated ferrimagnetic structure.
Specifically, the magnetization fixed layer 31 has a configuration in which two ferromagnetic layers 13 and 15 are stacked via a nonmagnetic layer 14 and antiferromagnetically coupled.
Since each of the ferromagnetic layers 13 and 15 of the magnetization fixed layer 31 has a laminated ferrimagnetic structure, the magnetization M13 of the ferromagnetic layer 13 is directed to the right, and the magnetization M15 of the ferromagnetic layer 15 is directed to the left. It has become. Thereby, the magnetic fluxes leaking from the ferromagnetic layers 13 and 15 of the magnetization fixed layer 31 cancel each other.

In the present embodiment, in particular, the perpendicular magnetization layer 22, which is a magnetic layer having a magnetization M 22 in a direction perpendicular to the film surface of the storage layer 17 (stacking direction of each layer), is provided around the storage layer 17.
The direction of the magnetization M22 of the perpendicular magnetic layer 22 is upward as shown in FIG.
As shown in the plan view of the memory element 1 in FIG. 2, the perpendicular magnetic layer 22 is formed in a donut shape on the outer side of the elliptical memory layer 17 with a thin insulating layer 21 interposed therebetween, and the entire outer periphery of the memory layer 17 is formed. It is formed to cover.
An insulating layer 23 covers the outside of the perpendicular magnetization layer 22.
Unlike the other layers 12 to 18 of the laminated film of the memory element 1, the underlayer 11 is formed in a wide planar pattern, and the upper layer 11 extends from the other layers 12 to 18 to the left and right. In addition, an insulating layer 21, a perpendicular magnetic layer 22, and an insulating layer 23 are disposed.

As a material of the perpendicular magnetization layer 22, a general hard magnetic material conventionally used for a hard magnetic layer can be used.
For example, CoCrPt is applicable.
Alternatively, the memory element may be directly covered with an insulating hard magnetic material such as an oxide such as γ-Fe ₂ O ₃ without sandwiching the thin insulating layer 21.

The memory element 1 of the present embodiment can be manufactured as follows, for example.
First, the layers from the base layer 11 to the cap layer 18 are sequentially stacked.
Next, each layer from the antiferromagnetic layer 12 to the cap layer 18 is patterned into a predetermined pattern.
Next, the insulating layer 21 is formed so as to cover the upper surface and the periphery of the patterned laminated film.

Next, a hard magnetic layer to be the perpendicular magnetization layer 22 is formed using a hard magnetic material. It is desirable that the insulating layer 21 sandwiched therebetween has a thickness of 5 nm to 50 nm, and the hard magnetic layer has a thickness of 3 nm to 30 nm.
For example, when CoCrPt or the like is used as the hard magnetic material of the perpendicular magnetization layer 22, the hard magnetic layer has its c-axis oriented in the direction (stacking direction) perpendicular to the film surface of the stacked film of the memory element. Form. In order to control the c-axis direction of CoCrPt in one direction, it is effective to form an underlayer such as Cr.
After that, the perpendicular magnetic layer 22 is formed by magnetizing the hard magnetic layer in the direction perpendicular to the wafer surface.
Next, the surface is shaved to expose the cap layer 18.
In this way, the memory element 1 shown in FIG. 1 can be manufactured.

According to the configuration of the storage element 1 of the above-described embodiment, by providing the perpendicular magnetization layer 22 having the magnetization M22 in the stacking direction around the storage layer 17, the outer periphery of the storage layer 17 from the perpendicular magnetization layer 22 is provided. Since the magnetic field in the stacking direction is applied to the portion, the magnetization of the outer peripheral portion of the storage layer 17 can be tilted in the stacking direction, and the direction of the magnetization M1 of the storage layer 17 can be easily reversed.
As a result, an increase in the magnetization reversal current when the pulse width is shortened can be suppressed, and the pulse width of the write current can be shortened without increasing the write current amount.
Thus, by shortening the pulse width of the write current, a higher-speed write operation can be performed.
Therefore, a memory that operates at a high speed with a low current can be realized.
Further, since information can be recorded with a low current, the power consumption of the memory can be reduced.

  In the memory element 1 of the present embodiment, the layers 11 to 18 other than the perpendicular magnetization layer 22 can adopt the same configuration (material, film thickness, magnitude of magnetization, etc.) as conventional, It is not necessary to change manufacturing conditions and the like, and it is possible to manufacture easily.

  In the storage element 1 of FIG. 1, the perpendicular magnetization layer 22 is also provided around the antiferromagnetic layer 12 and the fixed magnetization layer 31, but in the present invention, the perpendicular magnetization layer is provided at least around the storage layer. If so, it may or may not be around other layers.

  Further, in the present invention, if the magnetic field from the perpendicular magnetization layer extends to the outer periphery of the storage layer in the vicinity of the outer periphery of the storage layer, the perpendicular magnetization is not necessarily around the outer periphery of the storage layer (right side). The layer may not be arranged. This case is shown below.

As another embodiment of the present invention, FIG. 3 shows a schematic configuration diagram (cross-sectional view) of a memory element.
In the memory element 10 of the present embodiment, in particular, the perpendicular magnetic layer 22 and the insulating layer 21 are provided around the antiferromagnetic layer 12 and the magnetization fixed layer 31 in the laminated film (12 to 18).
On the other hand, there is no perpendicular magnetic layer 22 around the memory layer 17 (beside it), and an insulating layer 23 surrounding the entire memory element 10 is in direct contact therewith.

  Other configurations are the same as those of the memory element 1 of the previous embodiment shown in FIGS.

In the present embodiment, the perpendicular magnetization layer is not disposed around (right side) around the outer peripheral portion of the storage layer 17, but the perpendicular magnetization layer 22 is disposed around the fixed magnetization layer 31, and In the vicinity.
Even in such a configuration, since the magnetic field from the perpendicular magnetic layer 22 is applied to the outer peripheral portion of the storage layer 17, the magnetization of the outer peripheral portion of the storage layer 17 is tilted in the stacking direction, and the direction of the magnetization M1 of the storage layer 17 Can be easily reversed.

According to the storage element 10 of the present embodiment described above, the magnetization of the outer peripheral portion of the storage layer 17 is inclined in the stacking direction and the direction of the magnetization M1 of the storage layer 17 is the same as the storage element 1 of the previous embodiment. Can be easily reversed.
As a result, an increase in the magnetization reversal current when the pulse width is shortened can be suppressed, and the pulse width of the write current can be shortened without increasing the write current amount.
Thus, by shortening the pulse width of the write current, a higher-speed write operation can be performed.
Therefore, a memory that operates at a high speed with a low current can be realized.
Further, since information can be recorded with a low current, the power consumption of the memory can be reduced.

In the storage elements 1 and 10 of the above-described embodiments, the direction of the magnetization M22 of the perpendicular magnetic layer 22 is upward (the direction from the magnetization fixed layer 31 to the storage layer 17). May be downward (direction from the storage layer toward the magnetization fixed layer).
Furthermore, in the present invention, the magnetic layer that applies a magnetic field to the outer peripheral portion of the storage layer only needs to have a magnetization component in the stacking direction, and the magnetization direction of this magnetic layer is not limited to upward and downward, but the stacking direction It is good also as a diagonal direction.

  In addition, the magnetization fixed layer may be provided in the upper layer of the storage layer with the vertical relationship between the storage layer and the magnetization fixed layer being opposite to that of the storage elements 1 and 10 of the above-described embodiments.

Further, in the storage elements 1 and 10 of each of the above-described embodiments, the perpendicular magnetization layer 22 is disposed slightly apart from the storage layer 17 and the magnetization fixed layer 31 with the insulating layer 21 interposed therebetween. A perpendicular magnetization layer may be disposed so as to be in contact with the storage layer or the like.
However, in this configuration, if a conductor is used for the perpendicular magnetization layer, the spin injection current also flows to the perpendicular magnetization layer and short-circuits, so that there is no change in magnetoresistance. For example, γ-Fe ₂ O ₃ or the like is used.

Here, in the configuration of the memory element of the present invention, the hard magnetic material of the perpendicular magnetization layer was specifically selected and the characteristics were examined.
As shown in FIG. 5, the actual memory includes a semiconductor circuit for switching in addition to the memory element. Here, only the memory element is formed for the purpose of examining the magnetoresistance characteristics of the memory layer. Examination was performed using a wafer.

A thermal oxide film having a thickness of 2 μm was formed on a silicon substrate having a thickness of 0.575 mm, and the memory element 1 having the configuration shown in FIGS. 1 to 2 was formed thereon.
Specifically, in the memory element 1 having the configuration shown in FIG. 1, the material and thickness of each layer are as follows: the underlayer 11 is a Ta film with a thickness of 3 nm; the antiferromagnetic layer 12 is a PtMn film with a thickness of 20 nm; The ferromagnetic layer 13 constituting the fixed layer 31 is a CoFe film having a thickness of 2 nm, the ferromagnetic layer 15 is a CoFe film having a thickness of 2.5 nm, and the nonmagnetic layer 14 constituting the magnetization fixed layer 31 having a laminated ferrimagnetic structure is formed. A 0.8 nm Ru film, a tunnel insulating layer 16 as a 0.8 nm magnesium oxide film, a memory layer 17 as a 3 nm CoFeB film, a cap layer 18 as a 5 nm Ta film, and an underlayer A Cu film (not shown) having a film thickness of 100 nm (to be a word line described later) was provided between 11 and the antiferromagnetic layer 12 to form each layer.
In the above film configuration, the composition of the PtMn film was Pt50Mn50 (atomic%), the composition of the CoFe film was Co90Fe10 (atomic%), and the composition of the CoFeB film was Co40Fe40B20 (atomic%).

Each layer other than the tunnel insulating layer 16 made of a magnesium oxide film was formed using a DC magnetron sputtering method.
The tunnel insulating layer 16 made of a magnesium oxide film (MgO) was formed using an RF magnetron sputtering method.
Further, after each layer of the memory element 1 is formed, heat treatment is performed in a magnetic field heat treatment furnace at 10 kOe · 350 ° C. for 4 hours to control the crystal structure / interface of the MgO / ferromagnetic layer and PtMn of the antiferromagnetic layer 12. The film was subjected to ordered heat treatment.

  Next, after masking the word line portion by photolithography, the word line (lower electrode) was formed by performing selective etching with Ar plasma on the laminated film other than the word line. At this time, except for the word line portion, the substrate was etched to a depth of 5 nm.

Thereafter, a mask of the pattern of the memory element 1 was formed by an electron beam drawing apparatus, and selective etching was performed on the laminated film to form the memory element 1. Except for the memory element 1 portion, etching was performed up to the top of the base layer 11 immediately above the Cu layer of the word line, that is, up to the antiferromagnetic layer 12.
In addition, in order to generate the spin torque necessary for the magnetization reversal, it is necessary to flow a sufficient current through the storage element for the characteristic evaluation storage element, and thus it is necessary to suppress the resistance value of the tunnel insulating layer. Therefore, the pattern of the memory element 1 is an ellipse having a minor axis of 0.09 μm and a major axis of 0.18 μm, and the area resistance value (Ωμm ² ) of the memory element 1 is 20 Ωμm ² .

Next, an Al ₂ O ₃ insulating layer 21 having a thickness of 20 nm was formed by sputtering, and the portions other than the memory element 1 portion were insulated.
Thereafter, a CoCrPt film having a thickness of 20 nm was formed by ion beam sputtering to form a hard magnetic layer.
Then, the Al ₂ O ₃ insulating layer 21 and the CoCrPt hard magnetic layer on the laminated film (antiferromagnetic layer 12 to cap layer 18) constituting the MTJ element are removed, and the perpendicular magnetic layer 22 made of the hard magnetic layer is removed. Formed.
Further, a bit line to be an upper electrode and a measurement pad were formed by using photolithography.
Thus, the sample of the Example was produced.

In addition, the insulating layer 21 and the perpendicular magnetic layer 22 are not provided around the laminated film, the surroundings of the laminated film are covered only with the insulating layer 23, and the others are manufactured in the same manner as the sample of the example. A sample was used.
Note that the sample of this comparative example is the same as the conventional memory element whose measurement value of the inversion current value is shown in FIG. The characteristic values are not the same.

(Reverse current value measurement)
In order to evaluate the writing characteristics of the memory element according to the present invention, the inversion current value was measured.
A current having a pulse width of 1 ns (nanosecond) to 1 ms (millisecond) was passed through the memory element, and the resistance value of the memory element thereafter was measured. When measuring the resistance value of the memory element, the temperature was set to room temperature 25 ° C. and the bias voltage applied to the word line terminal and the bit line terminal was adjusted to 10 mV.
Further, the amount of current passed through the memory element was changed to obtain the reversal current value at which the magnetization of the memory layer was reversed.
Then, in order to take into account the variation between the storage elements, about 20 storage elements having the same configuration were produced, the above-described measurement was performed, and the average value of the reversal current values was taken.

Here, for convenience, an inversion current value when current flows from the word line to the bit line is denoted as Ic ^+, and an inversion current value when current flows from the bit line to the word line is denoted as Ic ⁻ . When current flows from the word line to the bit line, it is inverted from the parallel state to the antiparallel state, and when current is passed from the bit line to the word line, it is inverted from the antiparallel state to the parallel state. The Ic value at each pulse width was plotted with the horizontal axis pulse width.

  As a measurement result of the reversal current value, FIG. 4 shows the relationship between the pulse width of the current flowing through the memory element and the reversal current value. In FIG. 4, ◯ indicates the result of the sample of the example, and Δ indicates the result of the sample of the comparative example.

From FIG. 4, it can be seen that the inversion current value is smaller in the embodiment than in the comparative example, particularly with a short pulse width.
Therefore, by using the configuration of the present invention as in the above-described embodiment, it is possible to record information even when a current is passed with a short pulse width by reducing the inversion current value at a short pulse width. . This makes it possible to increase the speed of the memory operation.

  The present invention is not limited to the above-described embodiment, and various other configurations can be taken without departing from the gist of the present invention.

It is a schematic block diagram (sectional drawing) of the memory element of one embodiment of this invention. FIG. 2 is a plan view of the memory element in FIG. 1. It is a schematic block diagram (sectional drawing) of the memory element of other embodiment of this invention. It is a figure which shows the relationship between the pulse width of the electric current sent through the memory element of an Example and a comparative example, and an inversion current value. It is a schematic block diagram (perspective view) of a memory using magnetization reversal by spin injection. FIG. 6 is a cross-sectional view of the memory of FIG. 5. It is the perspective view which showed the structure of the conventional MRAM typically. It is a figure which shows the relationship between the pulse width of the electric current sent through a memory element, and an inversion electric current value.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1,10 Memory element, 11 Underlayer, 12 Antiferromagnetic layer, 13,15 Ferromagnetic layer, 14 Nonmagnetic layer, 16 Tunnel insulating layer, 17 Memory layer, 18 Cap layer, 21,23 Insulating layer, 22 Perpendicular magnetization Layer, 31 magnetization fixed layer

Claims (3)

It has a storage layer that holds information according to the magnetization state of the magnetic material,
A magnetization fixed layer is provided via an intermediate layer for the storage layer,
The intermediate layer is made of an insulator;
By injecting spin-polarized electrons in the stacking direction, the magnetization direction of the storage layer is changed, and information is recorded on the storage layer.
A storage element, wherein a magnetic layer having a magnetization component in the stacking direction is disposed around an outer periphery of the storage layer or in the vicinity of the outer periphery of the storage layer.   The memory element according to claim 1, wherein the magnetic layer having a magnetization component in the stacking direction is made of a hard magnetic material. A storage element having a storage layer for retaining information by the magnetization state of the magnetic material;
Two types of wiring crossing each other,
The storage element includes a storage layer that holds information according to a magnetization state of a magnetic material, and a magnetization fixed layer is provided via an intermediate layer with respect to the storage layer, and the intermediate layer is made of an insulator, and is laminated. By injecting spin-polarized electrons in the direction, the direction of magnetization of the storage layer changes, and information is recorded on the storage layer, around the outer periphery of the storage layer, or A configuration in which a magnetic layer having a magnetization component in the stacking direction is disposed in the vicinity of the outer peripheral portion of the storage layer,
The storage element is disposed near the intersection of the two types of wiring and between the two types of wiring,
A memory in which a current in the stacking direction flows in the memory element through the two types of wirings.

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