JP2008097132A - Memory controller, nonvolatile storage device, and nonvolatile storage system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a nonvolatile storage device and a nonvolatile storage system whose life is longer and whose processing speed is faster than a conventional manner. <P>SOLUTION: A rewrite frequency counting part 107 manages the rewrite frequency of each physical block. The physical block whose rewrite frequency is the highest or shortest is discriminated. When the number of unused blocks detected by an unused block detection part 106 reaches a threshold value or less in initialization processing, a data movement processing part 108 moves data between the highest rewrite frequency block and the shortest rewrite frequency block. Thus, it is possible to prevent the data whose rewrite frequency is high from being allocated only to the specific physical block. Therefore, it is possible to lengthen the life of a nonvolatile storage device 120 as a result. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a nonvolatile memory device such as a semiconductor memory card provided with a nonvolatile memory, a memory controller that controls the nonvolatile memory, and a nonvolatile memory system in which an access device is added as a configuration requirement to the nonvolatile memory device.

  The demand for nonvolatile memory devices including a rewritable nonvolatile memory is increasing, especially for semiconductor memory cards. Although semiconductor memory cards are very expensive compared to optical disks and tape media, they are portable devices such as digital still cameras and mobile phones due to their small size, light weight, earthquake resistance, and ease of handling. As a recording medium, the demand is growing. This semiconductor memory card includes a flash memory as a nonvolatile main memory, and has a memory controller for controlling the flash memory. The memory controller performs read / write control on the flash memory in response to a read / write instruction from an access device such as a digital still camera or a personal computer (personal computer) main body. Some portable audio devices are not only compatible with semiconductor memory cards, but also have a flash memory mounted in the portable audio body. In recent years, semiconductor memory cards are used not only for consumer use as described above, but also for professional video recording equipment for broadcasting stations, for example.

  Flash memory built into products such as semiconductor memory cards and portable audio devices requires a relatively long time to write to and erase from the memory cell array, which is a storage unit. It has a structure that can be written. Specifically, it is composed of a plurality of physical blocks (erase units), each physical block includes a plurality of pages (write units), erase is performed in units of physical blocks, and writing is performed in units of pages.

  In recent years, in response to the demand for larger capacity and lower cost, flash memories that can store 2 bits or more of information in one memory cell, such as multi-level NAND flash memory, have become mainstream. Yes. Such a multi-level NAND flash memory has a low guaranteed number of rewrites because it is difficult to ensure the reliability of the memory cells. In the conventional binary NAND flash memory, the guaranteed number of rewrites is, for example, 100,000, whereas in the multi-level NAND flash memory, the guaranteed number of rewrites is, for example, 10,000, approximately 10 times. It has dropped to 1 / min. In addition, it is difficult to manufacture a flash memory that can guarantee 10,000 times of rewriting.

  The guaranteed number of rewrites of the flash memory is directly related to the lifetime of the semiconductor memory card and the lifetime of the device itself such as portable audio. Conventionally, in order to extend this lifetime as much as possible, an address management method such as wear leveling in which rewriting is not concentrated on a specific physical block has been applied. For example, according to Patent Document 1, in data rewriting of a certain logical address, new data is written to an unused block, and a physical block in which old data before rewriting is stored is used as an unused block. There is a contrivance that data corresponding to a certain logical address is not fixedly allocated to a specific physical block.

  However, in Patent Document 1, when the number of remaining unused blocks decreases, when only a specific logical address is rewritten, the unused block and the physical block to which data corresponding to the logical address is allocated are allocated. Thus, data movement is frequently repeated. That is, rewriting of a specific physical block increases rapidly.

In order to deal with this problem, for example, in Patent Document 2, the number of rewrites of each physical block is held, and data is swapped based on the number of rewrites. Here, in the swap process, when both of the two physical blocks (physical blocks A and B) store valid data, the data A and B stored in the physical blocks A and B are read, and the physical processing is performed. This is a process of rewriting data A to physical block B and data B to physical block A after erasing blocks A and B.
JP 2003-263894 A Japanese Patent Laid-Open No. 5-282880

However, new problems such as the following (1) and (2) occur due to the swap processing.
(1) Since the number of rewrites is increased by the swap process itself, the life of the semiconductor memory card or the like is shortened.
(2) Since time is required for the swap processing, the processing speed in the normal operation, that is, the operation mode for reading and writing data from the access device is slow.

  In view of the above problems, an object of the present invention is to provide a non-volatile storage device, a memory controller, and a non-volatile storage system that have a longer lifetime and a higher processing speed than conventional ones.

  In order to solve this problem, a memory controller of the present invention is a memory controller that is connected to a nonvolatile memory and reads and writes data according to a logical address designated from the outside, and the logical address is stored in the nonvolatile memory. An address management unit that converts a physical address that is a storage location of data or the like in the memory, an unused block detection unit that detects the number of unused blocks in the nonvolatile memory, and a rewrite of each physical block that constitutes the nonvolatile memory When the unused block detected by the unused capacity detection unit in the initialization process at the time of power-on is less than or equal to a predetermined threshold value, it is selected based on the number of rewrites. A data movement processing unit for exchanging data between two physical blocks. A.

  In order to solve this problem, the nonvolatile memory device of the present invention is a nonvolatile memory device that reads and writes data according to a logical address designated from the outside, and is connected to the nonvolatile memory and the nonvolatile memory. A memory controller that reads and writes data according to a logical address designated from the outside, and the memory controller converts the logical address into a physical address that is a storage location of data in the nonvolatile memory. An address management unit that detects the capacity of an unused block in the nonvolatile memory, a rewrite count counter that counts the number of rewrites of each physical block that constitutes the nonvolatile memory, Unused blocks detected by the unused capacity detector in the initialization process Those having a data movement processing unit interchanging data between two physical blocks based on said number of times of rewriting is selected if it becomes less because determined threshold.

  In order to solve this problem, a nonvolatile storage system according to the present invention is a nonvolatile storage system having an access device and a nonvolatile storage device that reads and writes data according to a logical address specified by the access device. The nonvolatile storage device includes a nonvolatile memory, and a memory controller connected to the nonvolatile memory and reading and writing data according to a logical address designated from the outside. An address management unit that converts a logical address into a physical address that is a storage location of data or the like in the nonvolatile memory, an unused block detection unit that detects the number of unused blocks in the nonvolatile memory, and the nonvolatile memory A rewrite count counter for counting the number of rewrites of each physical block to be performed, Data is exchanged between two physical blocks selected based on the number of rewrites when an unused block detected by the unused capacity detection unit is equal to or lower than a predetermined threshold in the initialization process at the time of starting the source. And a data movement processing unit.

  Here, the data movement processing unit may execute data movement processing between the physical block having the largest number of rewrites and the physical block having the smallest number of rewrites.

  Here, the data movement processing unit performs data movement processing between an average value of the number of rewrites to the physical block, a randomly selected physical block larger than the average value, and an arbitrarily selected physical block smaller than the average value. You may make it perform.

  According to the present invention, wear leveling is performed by the logical / physical conversion process of the address management unit, and the data moving unit is rewritten when the unused capacity detected by the unused block detection unit falls below a predetermined threshold value. Since data movement processing is executed between two physical blocks specified based on the number of times, when a specific logical address is rewritten when there are fewer unused blocks, Concentration of rewriting can be avoided.

  As a further effect, since the data movement processing unit executes the data movement process in the initialization process when the power is turned on, the processing speed is lowered in the normal operation, that is, in the operation mode in which data is read / written from the access device. It can be avoided.

(Embodiment)
FIG. 1 is a block diagram showing a non-volatile storage system in an embodiment of the present invention. In FIG. 1, the nonvolatile storage system includes an access device 150 and a nonvolatile storage device 120, and the nonvolatile storage device 120 includes a memory controller 100 and a nonvolatile memory 110. The memory controller 100 includes a host interface 101, a buffer 102, a read / write control unit 103, a CPU unit 104, an address management unit 105, an unused block detection unit 106, a rewrite count counting unit 107, and a data movement processing unit 108.

  The nonvolatile memory 110 is a flash memory, and has a capacity of, for example, 1 GB as a user area. When the erasure unit is a physical block, the nonvolatile memory 110 is composed of a plurality of physical blocks PB0 to PB4095 as shown in FIG. Here, the hatched block is a physical block holding data. FIG. 3 is an explanatory diagram showing the configuration of one physical block. One physical block has a data recording size of 256 kbytes and is composed of 128 pages with page numbers PN0 to PN127. Each page is a unit of writing and comprises a 2 kbyte data area and a 64 byte management area. The data area is divided into four and is assigned sector numbers 0-3. Here, the management area of the page number PN0 holds file management information, that is, block status, logical block number, number of rewrites, and the like.

  The host interface 101 is connected to the access device 150 via an external bus. The host interface 101 receives commands, logical addresses, and data related to data writing and reading from the access device 150, and receives data from the access device 150 in data reading. Is the block to send to.

  The read / write control unit 103 is connected to the non-volatile memory 110 via a memory bus, and writes data temporarily stored in the buffer 102 to the non-volatile memory 110 or stores it in the non-volatile memory 110 according to an instruction from the address management unit 105. The read data is read out to the buffer 102. Further, data is moved between two physical blocks in the nonvolatile memory 110 according to an instruction from the data movement processing unit 108. The CPU unit 104 controls the entire memory controller 100.

  The address management 105 generates a physical address of the nonvolatile memory 110 based on the logical address received from the access device 150, and includes a physical area management table 105a and a logical-physical conversion table 105b described later. 4A and 4B are memory maps showing the physical area management table 105a, and block statuses are held for the physical block numbers PB0 to PB4095. Here, the value 0 indicates a used block, the value 1 indicates an unerased unused block, the value 2 indicates a defective block, and the value 3 indicates an erased unused block. In this embodiment, it is assumed that the value is 2, that is, there is no case of a bad block. 5A and 5B are memory maps showing the logical-physical conversion table 105b included in the address management unit 105. FIG. This conversion table shows the physical block number PBN corresponding to the logical block number LBN. FIG. 6 is an explanatory diagram showing the correspondence between the logical address LA and the physical address PA.

  The unused block detection unit 106 detects the number of unused blocks by referring to the physical area management table 105a every time data write processing is performed.

  The rewrite count counting unit 107 counts the number of rewrites for each physical block every time data writing processing is performed, and holds the number of rewrites in the rewrite number table 107a. FIG. 7 is a memory map showing an example of the rewrite count table 107a. This rewrite count table 107a holds the rewrite count for each physical block PBN. In this table, for example, the physical block number PBN0 is the maximum when the number of rewrites is 333 times, and the PB2 is the minimum when it is 99 times.

  The data movement processing unit 108 compares the number of unused blocks detected by the unused block detection unit 106 with a threshold value (for example, 5) stored in advance in the internal ROM, and determines whether or not to perform data movement processing. . In the case of execution, two physical blocks to be subjected to data movement processing are selected based on the rewrite count table 107 a and data movement processing is performed via the read / write control unit 103. Here, the data movement processing means that when two physical blocks (physical blocks A and B) are blocks storing valid data, the data (data A and B) stored in the physical blocks A and B are stored. B) refers to a process of rewriting data A to physical block B and data B to physical block A after erasing physical blocks A and B. If valid data is not stored in one physical block (for example, physical block B), that is, if the physical block B is an unused block, the data stored in the physical block A (data A) ) And erasing the physical block B, and then writing the data A into the physical block B.

  The access device 150 is a device that writes data to and reads data from the nonvolatile storage device 120.

  The nonvolatile memory system of the present invention configured as described above will be described with reference to flowcharts divided into initialization processing at power-on and data writing processing at normal operation. FIG. 8 is a flowchart showing processing of the memory controller 100.

[Initialization at power-on]
When the access device 150 is turned on, the nonvolatile storage device 120 is turned on via the external bus, and the nonvolatile storage device 120 shifts to an initialization process.

  In the initialization processing, the CPU unit 104 executes basic initialization processing such as clearing processing of the buffer 102 (S100), and then checks the management area of the first page of each physical block, and the physical area management table 105a and the logical-physical conversion table. 105b is created (S101). Specifically, the CPU unit 104 reads the block status stored in the management area of the first page of all physical blocks in the non-volatile memory 110 via the read / write control unit 102 and physically stores it on the RAM in the address management unit 105. The area management table 105a is created. At the same time, the logical block number LBN stored in the management area of the first page of all physical blocks in the nonvolatile memory 110 is read, and the logical / physical conversion table 105 b is created on the RAM in the address management unit 105. Thereafter, in reading and writing data, the physical address is determined using the physical area management table 105a and the logical-physical conversion table 105b.

  Further, the CPU unit 104 reads out the number of rewrites stored in the management area of the first page of all physical blocks in the non-volatile memory 110 via the read / write control unit 102, and rewrites the number of rewrites table 107a in the RAM in the rewrite number counting unit 107. Is created (S102). The CPU unit 104 passes control to the unused block detection unit 106 and the data movement processing unit 108. The unused block detection unit 106 counts the number of physical blocks whose block status is 1 or 3 from the physical area management table 105a, that is, the number of unused blocks (S103). In S104, it is determined whether the number of unused blocks is 5 or less. If the number of unused blocks exceeds 5, the control is returned to the CPU 104 without performing a data movement process described later. The CPU unit 104 is in a wait state until a read / write instruction is transferred from the access device 150 via the host interface 101 (S105). The initialization process SI includes a data movement process of S110 to S112 described later in addition to the processes of S100 to S104.

[Data write processing during normal operation]
If there is a read / write instruction in the wait state, data writing or data reading processing is executed (S106), and upon completion, the process returns to S105 again. S105 and S106 are processes SN during normal operation, and data write processing during normal operation will be described in detail with reference to the flowchart of FIG. Note that the data reading process is not related to the present invention and is omitted for simplicity.

  The nonvolatile storage device 120 receives data and a logical address in response to a data write instruction from the access device 150. When the access device 150 designates the value 0 as the logical address, the logical block number LBN becomes the value 0. In addition, data for 256 kbytes is continuously transferred. At this time, the address management unit 105 determines the physical block number PBN that is the write destination, and passes the physical block number PBN to the read / write control unit 103. Then, the read / write control unit 103 writes the data to the nonvolatile memory 110 via the buffer 102.

  When selecting the physical block number PBN of the write destination, the address management unit 105 first searches for a physical block having a block status value 1 or value 3 in ascending order from the top (PB0) of the physical area management table, and one unused block. A physical block PBN, for example, PB0 is acquired here (S200). The acquired PBN is temporarily held by the address management unit 105, and in the next writing, a search is performed in ascending order using the held PBN as a starting point. When the PBN 4095 is reached, the position returns to the PB0 position again. Thus, by searching for unused blocks in the physical area management table cyclically, wear leveling equivalent to that of Patent Document 1 can be realized.

  Next, the address management unit 105 erases the physical block to be written, here PB0, to the read / write control unit 103 and instructs writing to the block (S201). Further, the address management unit 105 designates PB0 to the rewrite count counter 107 (S202). Then, the rewrite count counter 107 increments the rewrite count of PB0 in the rewrite count table 107a (S203), and transfers the incremented rewrite count value to the read / write controller 103 (S204).

  Next, the address management unit 105 updates the physical area management table 105a and the logical / physical conversion table 105b (S205). Specifically, as shown in FIG. 5A, data corresponding to the logical block number LBN = 0 was stored in the physical block number PB1 stored at the position corresponding to LBN = 0 in the logical-physical conversion table. Confirm. Thereafter, as shown in FIG. 5B, the physical block number stored at the position corresponding to LBN = 0 in the logical-physical conversion table 105b is updated from the value 1 to the value 0. In this way, management is performed again assuming that data corresponding to the logical block LBN0 is stored in PB0. Next, the block status values 1 and 0 stored in PB0 and PB1 of the physical area management table 105a as shown in FIG. 4A are updated to values 0 and 1 respectively as shown in FIG. 4B. In this way, the block status of PB0 is changed from the unused block to the used block, and the block status of PB1 is changed from the used block to the unused block.

  Next, after the read / write control unit 103 erases the physical block PB0 to be written, the data transferred from the buffer 102 is written into the data area of PB0 in ascending order from page number 0. At the same time, the logical block number LBN, the block status of PB0 updated on the physical area management table, and the value of the number of rewrites are written into the management area of the physical block PB0 (S206). It is assumed that the writing of data to the nonvolatile memory 110 is completed through the above steps, and each physical block in the nonvolatile memory 110 is in a use state as shown in FIG. That is, it is assumed that five physical blocks PB1, PB15, PB18, PB4094, and PB4095 are unused blocks, and the other physical blocks are all used blocks.

  Here, it is considered that only a specific logical address is rewritten in a state where unused blocks are reduced as shown in FIG. For example, in a nonvolatile storage system based on a FAT file system using a file allocation table (hereinafter referred to as FAT), the FAT is allocated to the area of the logical block number LB0, and the FAT is frequently rewritten as data is written. .

  Therefore, when the FAT is frequently rewritten in the state as shown in FIG. 2, substitution processing is frequently performed only between the physical block corresponding to the logical block number LBN = 0 and a few unused blocks. A block is rewritten more times than other physical blocks. The increase speed of the number of rewrites becomes faster as the number of unused blocks is smaller. In order to cope with this situation, in this embodiment, in the initialization process at power-on, when the number of unused blocks has decreased, between a physical block with a large number of rewrites and a physical block with a small number of rewrites To move the data. For example, the physical block in which the logical block number LBN = 0 to which the FAT is allocated is moved to a physical block with a small number of rewrites. As a result, it is possible to avoid an increase in the number of rewrites of a specific physical block.

  Hereinafter, a data movement process executed in the initialization process will be described. In step S104 described above, when the number of unused blocks is equal to or less than a threshold value (value 5 in the present embodiment) preset in the ROM in the data movement processing unit 108, data movement processing is executed.

  In the data movement process, first, the data movement processing unit 108 specifies the physical block PBmax (for example, PB0) having the largest number of rewrites and the physical block PBmin (for example, PB2) having the smallest number of rewrites based on the rewrite number table 107a (S110). . Next, the data movement processing unit 108 performs data movement between PBmax and PBmin via the read / write control unit 103 (S111). For example, the data stored in the physical blocks PB0 and PB2 (respectively data 0 and data 1) are read and held in the buffer 102. After erasing PB0 and PB2, data 0 is changed to PB2 and data 2 is changed to PB0. Rewrite. The data movement processing unit 108 notifies the address management unit 105 and the rewrite count counting unit 107 of the physical block that is the target of data movement. The address management unit 105 updates the logical-physical conversion table 105b and finishes the writing process (S112). Specifically, assuming that the logical block number LBN of the data stored in PB0 is 0 and the logical block number LBN of the data stored in PB2 is 100, the position of LBN = 0 in the logical-physical conversion table 105b. A value 0 (a value corresponding to PB0) is written in the field, and a value 2 (a value corresponding to PB2) is written at the position of LBN = 100. The rewrite count counter 107 increments the number of rewrites of the two physical blocks that are the targets of data movement.

  As described above, the rewrite count counting unit 107 manages the number of rewrites of each physical block, thereby determining which physical block is the physical block having the largest or smallest number of rewrites at the time of initialization, and performs data movement processing. When the number of unused blocks detected by the unused capacity detection unit decreases (when the value becomes equal to or less than the threshold value), the unit 108 moves data between the most frequently rewritten block and the least rewritten block. As a result, for example, data with high rewrite frequency such as FAT can be prevented from being allocated only to a specific physical block. As a result, the lifetime of the nonvolatile memory device 120 can be extended.

  Further, since the data movement process is executed at the time of initialization, it is possible to avoid a decrease in processing speed during the normal operation, that is, in an operation mode in which data is read / written from the access device.

  Although the physical block PBmax having the largest number of rewrites and the physical block PBmin having the smallest number of rewrites are used as the physical blocks subject to data movement, the rewrite number counting unit 107 performs the processing for all physical blocks based on the rewrite number table 107a. The average value of the number of rewrites is calculated, and the physical block randomly selected from the physical blocks having the number of rewrites larger than the average value and the physical block randomly selected from the physical blocks having the number of rewrites smaller than the average value are data movement targets It may be a physical block.

  The data movement is not limited to one set of physical blocks, and data movement processing may be executed for a plurality of sets of physical blocks. Furthermore, data movement may be executed between physical blocks having the same number of upper order% and lower order% in the order of the number of rewrites.

  The non-volatile storage system according to the present invention proposes a method for achieving both a long life and a writing speed, and a still image recording / reproducing apparatus, a moving image recording / reproducing apparatus using a non-volatile storage device such as a semiconductor memory card, or the like. Useful in mobile phones.

The block diagram which shows the non-volatile memory system in the form of execution of this invention Explanatory drawing showing the configuration of the physical block Explanatory drawing which shows the use state of the physical block in the non-volatile memory 110 Memory map showing physical area management table included in address management unit 105 Memory map showing physical area management table included in address management unit 105 Memory map showing logical physical conversion table included in address management unit 105 Memory map showing logical physical conversion table included in address management unit 105 Explanatory diagram showing the correspondence between logical addresses and physical addresses A memory map showing a rewrite count table included in the rewrite count counting section 107 A flowchart showing processing of the memory controller 100 Flow chart showing write processing during normal operation

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Memory controller 101 Host interface 102 Buffer 103 Reading / writing control part 104 CPU part 105 Address management part 105a Physical area management table 105b Logical-physical conversion table 106 Unused block detection part 107 Rewrite number count part 107a Rewrite number table 108 Data movement process part 110 Non-volatile memory

Claims (9)

A memory controller that is connected to a non-volatile memory and reads and writes data according to a logical address designated from the outside,
An address management unit that converts the logical address into a physical address that is a storage position of data or the like in the nonvolatile memory;
An unused block detector for detecting the number of unused blocks in the nonvolatile memory;
A rewrite count counter for counting the number of rewrites of each physical block constituting the nonvolatile memory;
Data is exchanged between two physical blocks selected based on the number of rewrites when an unused block detected by the unused capacity detection unit is equal to or lower than a predetermined threshold in initialization processing at power-on. And a data movement processing unit.   The memory controller according to claim 1, wherein the data movement processing unit executes a data movement process between the physical block having the largest number of rewrites and the physical block having the smallest number of rewrites.   The data movement processing unit executes data movement processing between an average value of the number of rewrites to the physical block, a randomly selected physical block larger than the average value, and an arbitrarily selected physical block smaller than the average value. The memory controller according to claim 1. A nonvolatile storage device that reads and writes data according to a logical address designated from the outside,
A non-volatile memory, and a memory controller connected to the non-volatile memory and reading and writing data according to a logical address designated from the outside,
The memory controller is
An address management unit that converts the logical address into a physical address that is a storage position of data or the like in the nonvolatile memory;
An unused block detection unit for detecting a capacity of an unused block of the nonvolatile memory;
A rewrite count counter for counting the number of rewrites of each physical block constituting the nonvolatile memory;
Data is exchanged between two physical blocks selected based on the number of rewrites when an unused block detected by the unused capacity detection unit is equal to or lower than a predetermined threshold in initialization processing at power-on. And a data movement processing unit.   The non-volatile storage device according to claim 4, wherein the data movement processing unit performs a data movement process between the physical block having the largest number of rewrites and the physical block having the smallest number of rewrites.   The data movement processing unit executes data movement processing between an average value of the number of rewrites to the physical block, a randomly selected physical block larger than the average value, and an arbitrarily selected physical block smaller than the average value. The nonvolatile memory device according to claim 4. A nonvolatile storage system having an access device and a nonvolatile storage device that reads and writes data according to a logical address designated by the access device,
The nonvolatile memory device is
A non-volatile memory and a memory controller connected to the non-volatile memory and reading and writing data according to a logical address designated from the outside;
The memory controller is
An address management unit that converts the logical address into a physical address that is a storage position of data or the like in the nonvolatile memory;
An unused block detector for detecting the number of unused blocks in the nonvolatile memory;
A rewrite count counter for counting the number of rewrites of each physical block constituting the nonvolatile memory;
Data is exchanged between two physical blocks selected based on the number of rewrites when an unused block detected by the unused capacity detection unit is equal to or lower than a predetermined threshold in initialization processing at power-on. And a data movement processing unit.   The non-volatile storage system according to claim 7, wherein the data movement processing unit executes a data movement process between the physical block having the largest number of rewrites and the physical block having the smallest number of rewrites.   The data movement processing unit executes data movement processing between an average value of the number of rewrites to the physical block, a randomly selected physical block larger than the average value, and an arbitrarily selected physical block smaller than the average value. The non-volatile storage system according to claim 7.

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