JP2006237446A - Multilayer wiring board and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a multilayer wiring board which is suitable for avoiding a reduction in dimensional accuracy due to the formation of a resistive device and a dielectric body (capacitor device) on the same plane with a copper foil (wiring pattern), and for eliminating a reduction in electrical properties (generation of parasitic capacitance and inductance component) due to the enhancement of the length of an interconnect line forming an LCR circuit. <P>SOLUTION: The multilayer wiring board has a laminated configuration composed of an insulating resin layer and a wiring pattern layer, and includes built-in component parts, such as capacitors, resistors, and inductors. The multilayer wiring board has the wiring pattern layer which is configured in such a manner that at least the resistive elements are formed on the one surface of a layer out of the wiring pattern layers, and the capacitor elements are formed on the other surface of the layer. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

The present invention relates to an improvement of a wiring board in which passive element components (capacitors, resistors, inductors, etc.) mounted on a printed wiring board or a circuit board (hereinafter collectively referred to as “wiring board”) are built in the board.
In particular, an LCR circuit (resonance determined by a combination of L and C) in a multilayer wiring board using an organic resin material as an insulating layer constituting a multilayer wiring board that achieves a higher density by increasing the number of wiring patterns. The present invention relates to an improvement of a multilayer wiring board in which a resonant circuit having a frequency (L: inductor, C: capacitor) is previously incorporated.

  In recent years, in order to meet the demands for higher speed, higher functionality, smaller size, and lighter weight of electronic devices, passive elements are built (incorporated) in wiring boards used in electrical devices to increase the density. Technology is about to be widely deployed. (For example, see Patent Document 1)

As a method of building a passive element in a wiring board, after forming a resistor paste and a dielectric paste on a copper foil in a pattern by screen printing, a prepreg sheet (intermediate material in which carbon fiber is impregnated with resin) is used. A method of obtaining a resistance element and a dielectric element by using and laminating on an inner layer substrate and patterning a copper foil is known.
This method has the advantage that the material can be efficiently used and the number of steps can be reduced because the material can be arranged only in a necessary portion by screen printing.

  However, in the above method, since the resistance paste and the dielectric paste are formed by screen printing in the same plane of the copper foil, one of the materials is arranged first, and the next material to be arranged is screen printed. In addition, there is a problem that the height of the previously printed material becomes an obstacle and the film thickness and the vertical and horizontal dimensional accuracy are deteriorated. If both elements are formed on the same surface, they cannot be formed with high accuracy due to interference in the process.

In order to avoid this problem, it is conceivable to form resistor elements and capacitor elements on separate copper foils and laminate them. However, when an LCR circuit is formed, the wiring length becomes long, and parasitic capacitance (conductor and This leads to generation of an inductance component and an inductance component which are generated between the external conductors and are not originally intended in the circuit diagram, which is not preferable in terms of electrical characteristics.
Further, when the capacitor element is formed by the above-described method, since the counter electrode of the electrode obtained by processing the copper foil is formed of the conductive paste, there is a problem that the conductive paste easily absorbs moisture and the capacity is likely to fluctuate.
Further, when the resistance element is formed by the above-described method, the electrode made of copper wiring and the resistance paste are in direct contact (see FIG. 1), so the influence of the contact resistance at the interface is large, for example, high temperature and high humidity conditions (temperature = 40). It has been reported that the resistance value greatly increases due to interface corrosion or the like at 0 ° C. and relative humidity = 90%. (Reference 1)

  In order to avoid these problems, a resistance element (see Fig. 2) with a structure in which a silver paste with excellent electrical connectivity is sandwiched between the copper electrode and the resistance paste to reduce the contact resistance at the interface, and the copper electrode portion is subjected to gold plating treatment A structure related to a resistance element subjected to the above has been reported. (For example, see Non-Patent Document 1 and Patent Document 2)

JP 2003-318548 A Japanese Patent Laid-Open No. 11-340633 Isao Shioka: “Polymer Resistors Used in Embedded Passive Device Technology” Journal of Japan Institute of Electronics Packaging, Vol.6, No.4, p.294-299,2003

  The present invention avoids a decrease in dimensional accuracy due to the formation of a resistance element and a dielectric (capacitor element) in the same plane of a copper foil (wiring pattern) and increases the wiring length for forming an LCR circuit. The main object of the present invention is to propose a multilayer wiring board suitable for eliminating the deterioration of electrical characteristics (occurrence of parasitic capacitance and inductance components) caused by the above.

The present invention according to claim 1, which has been made to solve the above problems,
In a multilayer wiring board consisting of a laminated structure of insulating resin layer and wiring pattern layer, and built-in passive element parts such as capacitors, resistors, resistors, inductors, etc.
A multilayer wiring board having a structure in which a resistance element is formed on one surface and a capacitor element is formed on the other surface with at least one wiring layer interposed therebetween.
According to the above configuration, since the resistance element and the capacitor element are formed with one conductor layer interposed therebetween, the wiring length can be shortened when forming the LCR circuit.

The invention according to claim 2
The resistance element is connected to an electrode obtained by processing a part of the wiring layer, and the surface of the electrode has a configuration in which at least a surface in contact with the resistor is covered with substitutional electroless silver plating. The multilayer wiring board according to claim 1.
According to the above configuration, it becomes possible to reduce the contact resistance between the copper electrode and the resistance material, and it becomes unnecessary to set a clearance in consideration of the printing position shift required when printing the silver paste, and to reduce the element size. Is possible.

The invention according to claim 3
3. The multilayer wiring board according to claim 2, wherein the resistor is a material obtained by dispersing a conductive filler in a thermosetting resin.
According to the above configuration, in forming a resistor that generally requires high-temperature firing, firing can be performed at a low temperature of 250 ° C. or lower, and formation of a resistance element on an organic substrate having low heat resistance is facilitated.

The invention according to claim 4
The multilayer according to any one of claims 1 to 3, wherein the resistance element has a structure in which a protective layer made of a material in which an inorganic filler is dispersed in a thermosetting resin is coated on the surface of the resistance element. It is a wiring board.
According to the above configuration, when trimming from the electrode surface of the resistance element, damage to the insulating layer disposed under the resistance element can be avoided, and insulation reliability can be ensured.

The invention according to claim 5
5. The multilayer wiring according to claim 1, wherein the capacitor element has a structure in which a dielectric material is sandwiched between an electrode obtained by processing a part of the wiring layer and a copper electrode facing the capacitor element. It is a substrate.
According to the above configuration, it is possible to reduce the moisture absorption effect on the capacitor material.

The invention according to claim 6
6. The multilayer wiring board according to claim 5, wherein the dielectric material is a material obtained by dispersing an inorganic filler in a thermosetting resin.
According to the above configuration, the formation of a dielectric material that generally requires high-temperature firing eliminates the need for high-temperature firing, and allows capacitor elements to be formed on an organic substrate having low heat resistance.

The invention according to claim 7 provides:
The resistance element is formed on one side, the capacitor element is formed on the other side, and the inductor element is formed on either side of the wiring pattern layer formed on the other side. The multilayer wiring board according to any one of 7.
According to the above configuration, the wiring length can be shortened when forming the LCR circuit.

The invention according to claim 8 provides:
A manufacturing method of a multilayer wiring board comprising the following steps.
(A) In a copper foil of a dielectric sheet in which copper foil is laminated on both sides, a portion corresponding to a resistor electrode part is subjected to partial silver plating, and a resistor is formed into a pattern by a printing method, and patterned resistance The process of thermosetting the body.
(B) The process of laminating | stacking the surface by which the resistor of the dielectric sheet with a double-sided copper foil produced by (a) was patterned, and a core board | substrate through an adhesive layer.
(C) A step of patterning, as a top electrode of a capacitor element, a copper foil on a surface opposite to a surface on which a resistance element is formed in a dielectric sheet in which copper foil is laminated on both sides by a photolithography technique.
(D) A step of forming a dielectric pattern by blasting or etching using the upper electrode obtained in (c) as a mask.
(E) A step of patterning the surface of the upper electrode and dielectric pattern obtained in (d) as a lower electrode of the capacitor element by a photolithography technique.

The invention according to claim 9 is:
A manufacturing method of a multilayer wiring board comprising the following steps.
(A) A step of performing partial substitution silver plating on one surface of a copper foil, forming a resistor in a pattern by a printing method, and thermally curing the resistor.
(B) The process of laminating | stacking the surface in which the resistor of the copper foil produced in (a) was formed, and a core board | substrate through an contact bonding layer.
(C) A step of further laminating the laminate produced in (b) on the dielectric side surface of the dielectric sheet in which the copper foil is laminated on one side.
(D) A step of patterning the copper foil of the dielectric sheet as an upper electrode of the capacitor element by a photolithography technique.
(E) A step of forming a dielectric pattern by blasting or etching using the upper electrode obtained in (d) as a mask.
(F) A step of patterning the surface of the upper electrode and the dielectric pattern obtained in (e) as a lower electrode of the capacitor element by a photolithography technique.

  According to the method for manufacturing a multilayer wiring board according to claims 8 and 9, it is possible to form a capacitor element on the back surface (opposite side) of the copper foil on which the resistor is formed, and furthermore, a dielectric only between both electrodes. The body can be placed.

The invention according to claim 10 is:
The method for manufacturing a multilayer wiring board according to claim 8 or 9, wherein a temperature condition such that a maximum temperature reaches 180 ° C or higher is employed in the thermosetting treatment of the resistor in the step (a). is there.
According to the above method, the resistance material is cured at a temperature equal to or higher than the curing temperature of a general multilayer printed wiring board insulating material, whereby the resistance value change before and after the incorporation of the resistance element can be reduced.

The invention according to claim 11 is:
10. The method for manufacturing a multilayer wiring board according to claim 8, further comprising a step of trimming the resistor.

The invention according to claim 12
10. The method for manufacturing a multilayer wiring board according to claim 8, further comprising a step of forming an inductor by an etching method.
According to the above method, the wiring width and wiring length can be controlled with high accuracy, and a high-precision inductor can be manufactured.

  The insulating resin layer constituting the multilayer wiring board can be formed (by pressing, laminating, curing, etc.) under a temperature condition lower than the “resistor thermosetting temperature” in step (a). However, in the present invention, the thermal history in the insulating layer forming process on the built-in resistor element is lower than the firing temperature of the resistor element, which is effective in suppressing the resistance value fluctuation before and after the built-in resistor element.

According to the present invention, since the capacitor element and the resistance element are formed with one conductor layer interposed therebetween, the wiring length is short when forming the LC circuit, and there is an effect of reducing parasitic capacitance and transmission loss.
In addition, since the resistor is formed on a flat copper foil on which no wiring is formed, printing can be performed with high dimensional accuracy.
Further, the capacitor element can be formed with high processing accuracy by a combination of an etching method by photolithography and a blasting method.
Furthermore, since the substitutional electroless silver plating film is formed at the interface between the resistance paste and the copper electrode, it is possible to suppress the temporal variation of the resistance value due to the increase in contact resistance.

  As a result, a reduction in dimensional accuracy due to the formation of the resistance element and the dielectric (capacitor element) in the same plane of the copper foil (wiring pattern) is avoided, and the wiring length for forming the LCR circuit is increased. A multilayer wiring board suitable for eliminating the deterioration of electrical characteristics (occurrence of parasitic capacitance and inductance components) due to the above is provided.

Embodiments of the present invention will be described with reference to the drawings.
FIG. 3 is a sectional view schematically showing a part of the configuration of the multilayer wiring board according to the present invention.

The multilayer wiring board 300a in this embodiment has a structure in which an inductor element 301, a capacitor element 302, and a resistance element 303 are formed on the front and back of the conductor layer 1 (synonymous with the wiring pattern layer: 327).
In addition, the structure which formed each element in the front and back of the conductor layer 2 (328) may be taken, and the conductor layer in which these each element was formed in the front and back may be multilayered.
That is, since the inductor element 301, the capacitor element 302, and the resistance element 303 are formed on the front and back of the conductor layer 1 (327) and the conductor layer 2 (328), the wiring length can be shortened when the LCR circuit is formed. The parasitic capacitance can be reduced and the transmission loss can be reduced.

The resistance element 303 is formed with a protective layer (or a protection body) (not shown), and the protective layer includes a thermosetting resin and an inorganic filler as main components.
As the thermosetting resin, a thermosetting resin such as an epoxy resin, a phenol resin, a melamine resin, or a polyimide resin, a resin obtained by modifying these, a mixture of these resins and a thermoplastic resin, or the like can be used.
Among these, it is preferable to use an epoxy resin from the viewpoints of adhesion to a substrate, chemical resistance, and cost.
As the inorganic filler, an inexpensive metal oxide such as SiO2, Al2O3, ZrO3, and PbO having insulating properties is preferable.
By forming the protective layer, it is possible to reduce damage to the insulating resin layer existing under the resistor due to the laser when the resistance value is adjusted by trimming.

In the resistance element in this embodiment, a part of the copper wiring serves as an electrode, and a resistor is formed on the copper electrode via a substitutional electroless silver plating film. The contact resistance can be suppressed.
In addition, since the plating area is small as compared with the method of forming a silver plating film on the entire surface of the conductor layer, it is possible to reduce short-circuit defects due to electromigration and to suppress silver plating costs. The thickness of the substitutional electroless silver plating film is preferably 0.2 μm or more and 0.5 μm or less.
This is because when the thickness of the silver plating film is 0.2 um or less, the contact resistance between the resistor and the copper electrode cannot be lowered sufficiently. When the thickness is 0.5 um or more, there is almost no difference in the effect of reducing the contact resistance. This is because there is no more.

The resistor in this embodiment is mainly composed of a thermosetting resin and a conductive filler.
As the thermosetting resin, a thermosetting resin such as an epoxy resin, a phenol resin, a melamine resin, or a polyimide resin, a resin obtained by modifying these resins, a mixture of these resins and a thermoplastic resin, or the like can be used.
Especially, it is preferable to use an epoxy resin from the point of adhesiveness with a base material, chemical resistance, and cost.
As the conductive filler, it is preferable to use inexpensive carbon such as ketchelen black, acetylene black, graphite, activated carbon.
In addition to the conductive filler, an inorganic filler such as silica may be added. Commercially available carbon paste can be used as it is.

  Since the capacitor element in this embodiment has a structure in which a dielectric material is sandwiched between copper electrodes, moisture absorption from the upper and lower parts of the capacitor element can be prevented, and one electrode is made of a conductive paste. The moisture resistance can be improved as compared with the capacitor element.

A suitable dielectric material constituting the capacitor element of this embodiment is mainly composed of a thermosetting resin and an insulating inorganic filler.
As the thermosetting resin, a thermosetting resin such as an epoxy resin, a phenol resin, a melamine resin, and a polyimide resin, a resin obtained by modifying these resins, a mixture of these resins and a thermoplastic resin, or the like can be used.
Especially, it is preferable to use an epoxy resin from the point of adhesiveness with a base material, chemical resistance, and cost.
As the insulating inorganic filler, it is preferable to use a material having a relatively high dielectric constant such as a ferroelectric and a paraelectric such as BaTiO3, SrTiO3, TIO2, PbTiO3, and PZT.
Commercially available dielectric paste can be used as it is.

The inductor element according to the present embodiment has a structure obtained by processing the conductor layer 1 (327) in which the resistor element and the capacitor element are formed. Since the wiring length can be shortened when the LCR is configured, the parasitic capacitance is reduced. The transmission loss can be reduced.
The shape of the inductor can be selected as appropriate, such as a meander structure or a spiral structure.

In this embodiment, substitutional electroless silver plating is partially formed on one side of a dielectric sheet with a double-sided copper foil at a portion corresponding to an electrode of a resistance element, and the resistor is printed by screen printing.
That is, since the resistor is printed on the smooth dielectric sheet, the resistor can be formed with high dimensional accuracy.
Next, after the resistor printed surface and the inner layer substrate are bonded together with an adhesive layer such as a prepreg, a photoresist is provided on the portion corresponding to the upper electrode of the capacitor element, and exposure → development → etching → photoresist stripping It is formed by performing (a photolithography technique).
Next, unnecessary dielectric material is removed using the upper electrode as a mask by wet blasting in which a slurry containing SiO 2 is sprayed at a high speed.
Next, a photoresist is provided at a position corresponding to the resistor element electrode, the capacitor element lower electrode, the inductor, and the wiring, and the resistor element, the capacitor element, and the inductor element are formed through exposure → development → etching → photoresist stripping process. .
By the above method, it is possible to make a resistance element, a capacitor element, and an inductor element on the front and back sides of the same conductor layer.

In this embodiment, substitutional electroless silver plating can be partially formed on a copper foil at a location corresponding to an electrode of a resistance element, and a resistor can be printed by screen printing.
That is, since the resistor is printed on the smooth copper foil, the resistor can be formed with high dimensional accuracy.
Next, after the surface on which the resistor is printed and the inner layer substrate are bonded together with an adhesive layer such as a prepreg, a dielectric sheet with a single-sided copper foil is laminated, and the portion corresponding to the capacitor element upper electrode on the dielectric sheet copper foil A photoresist is provided on the substrate, and it is formed by exposure → development → etching → photoresist stripping.
Next, unnecessary dielectric material is removed using the upper electrode as a mask by wet blasting in which a slurry containing SiO 2 is sprayed at a high speed.
Next, a photoresist is provided at a position corresponding to the resistor element electrode, the capacitor element lower electrode, the inductor, and the wiring, and the resistor element, the capacitor element, and the inductor element are formed through an exposure → development → etching → photoresist film removal process.
By the above method, it is possible to build a resistance element, a capacitor element, and an inductor element on the front and back sides of the same conductor layer.

In the present embodiment, the insulating resin containing the passive element may be in the form of a prepreg, a resin-coated copper foil, an insulating resin film for a build-up substrate, or a varnish. In view of the above, it is preferable to use a build-up insulating resin film.
In general, thermosetting resins such as epoxy resins tend to have a higher crosslink density as the curing temperature increases. For example, when a resistor that has been cured once is heated at a higher temperature, curing of the thermosetting resin proceeds. The resistance value tends to decrease.
Therefore, in order to reduce the change in resistance value before and after the incorporation of the resistance element, it is preferable that the maximum temperature reached in pressing, laminating and curing the insulating resin is lower than the maximum temperature achieved when the resistance material is cured.

  In the present embodiment, since the resistance value is adjusted by trimming after embedding the resistor, it is possible to suppress the resistance value fluctuation accompanying the stacking.

In the present embodiment, the lower electrode of the capacitor electrode, the electrode of the resistance element, the wiring, and the inductor element may be formed by patterning the same copper foil by known photolithography and etching methods.
By using the above method, the lower electrode of the capacitor electrode, the electrode of the resistor element, the wiring, and the inductor element can be formed with high accuracy.

EXAMPLES The present invention will be specifically described below with reference to examples and comparative examples, but the present invention is not limited thereto.
The multilayer wiring board (passive element built-in printed wiring board) with built-in resistance elements manufactured in each example and comparative example is subjected to resistance value measurement, capacitor capacity measurement, high temperature and high humidity test, and thermal cycle test (TCT). The characteristics of the passive elements are evaluated.

<Resistance measurement>
With respect to 100 elements having a design value of 100Ω of the resistance element manufactured in each example and comparative example, the resistance value is measured with a digital multimeter, and the average resistance value, standard deviation (σ), and 3σ values are calculated. The variation in resistance value was evaluated.

<Capacitor capacitance measurement>
With respect to 100 elements having a design value of 10 pF of capacitor elements manufactured in each of the examples and comparative examples, the capacitance at 10 kHz was measured with an LCR meter (trade name: HP4284A), and the average capacitance, standard deviation (σ), and 3σ The value was calculated and the variation of the capacitor capacity was evaluated.

<High temperature and high humidity test>
The passive element inner layer substrates manufactured in each Example and Comparative Example were subjected to a high temperature and high humidity test at 40 ° C. and 95% for 1000 hours, and the change in resistance value was calculated from the resistance values before and after the test.

<Insulation reliability>
With respect to the passive element built-in substrates manufactured in each Example and Comparative Example, in Example 1 and Example 2, a substitutional silver plating film of 0.5 μm was formed on a comb electrode of L / S = 100 μm / 100 μm.
In Comparative Example 1 and Comparative Example 2, a pattern in which a comb-shaped electrode portion having L / S = 100 μm / 100 μm was formed by printing with a silver paste was disposed in the inner layer portion.
These test pieces were put into a high-speed accelerated life test apparatus under the condition of 121 ° C./85%, a voltage of 20 V was applied for 168 hours, and the insulation resistance was measured over time.
A resistance value of 10 ⁶ or less was regarded as poor insulation, and 40 samples were added for testing.

<TCT>
About the printed circuit board with a built-in passive element manufactured in each Example and Comparative Example, 1000 cycles TCT was performed under conditions of a low temperature bath of −40 ° C., a high temperature bath of 125 ° C., and an exposure time of 30 minutes. An element having a value of 1000Ω or more was determined to be defective due to a crack.
Regarding the capacitor, an element having a capacitance value changed by ± 100% or more was determined to be defective.
For each example and comparative example, 100 resistance elements with a design value of 100Ω and 100 capacitor elements with a design value of 10 pF were tested.

Examples of the present invention will be described in detail below.
4A to 4K are cross-sectional views schematically showing an example of a method for manufacturing a multilayer wiring board (passive element built-in printed wiring board) according to the present invention in the order of steps.
First, a dielectric sheet 400 with double-sided copper foil (trade name: manufactured by BC12 OAK Mitsui) was prepared. (Fig. 4a)

  Next, a dry film resist 403 (trade name: RY3215, manufactured by Hitachi Chemical Co., Ltd.) is attached to the surface of the upper copper foil layer 402 by thermocompression bonding using a roll laminator, and a resistive element electrode pattern is formed by exposure and development using a film mask. Obtained (FIG. 4b).

  Next, acid cleaning is performed at 10 wt% -sulfuric acid aqueous solution, liquid temperature = 25 ° C. for 1 minute, and after washing with pure water, pre-dip (trade name: SSP-700P manufactured by Shikoku Kasei), liquid temperature = 40 ° C. Immersion for 40 seconds, substitution silver plating (trade name: SSP-700M, manufactured by Shikoku Kasei), treatment at a liquid temperature of 40 ° C. for 5 minutes, the dry film resist 403 is peeled off, and the resistance element electrode portion is formed. A substitutional electroless silver plating film 404 having a thickness of about 0.5 μm was formed.

Next, the carbon paste (trade name: TU-100-8, manufactured by Asahi Chemical Research Laboratories) can be electrically connected between the pair of substituted silver-plated electrodes using a 200 mesh, stainless steel mesh plate having a wire diameter of 40 μm. Thus, the resistor 405 was formed by screen printing.
When the viscosity of the carbon paste used for printing was measured with a rotational viscometer (trade name: Viscotester VT-04, manufactured by Rion), it was about 700 dPa · s.
The design value of the resistor sandwiched between the pair of electrodes was 0.5 mm in width and 0.67 mm in length.
Thus, after drying the board | substrate with which the resistor was printed at 90 degreeC for 30 minutes, baking was further performed at 200 degreeC for 1 hour. (Fig. 4d)

  Next, using a prepreg (trade name: GEA-67N manufactured by Hitachi Chemical Co., Ltd.) (406) on the core substrate (407) on which the conductor pattern is formed, a dielectric sheet (configuration shown in FIG. 4d) on which a resistor is first formed. It bonded together with the vacuum press machine. (Fig. 4e)

Next, a dry film resist (trade name: RY3215 manufactured by Hitachi Chemical Co., Ltd.) was attached by thermocompression bonding with a roll laminator, and a resist pattern 408 was formed by exposure and development using a film mask. (Fig. 4f)
Using this resist pattern as a mask, an upper electrode of the capacitor element was obtained through an etching process using a ferric chloride solution and a resist stripping process. (Fig. 4g)

  Next, a dielectric material (401) of a dielectric sheet with a double-sided copper foil is formed using a wet blasting method in which a fine abrasive liquid composed of several μm of SiO 2 and water is ejected from a nozzle and the surface of the workpiece is scraped off. Removal of the dielectric pattern was obtained. (Fig. 4h)

Next, a dry film resist (trade name: RY3215, manufactured by Hitachi Chemical Co., Ltd.) is thermocompression bonded with a vacuum laminator, and is exposed and developed using a film mask, whereby a resistor element electrode, a capacitor element lower electrode, an inductor element, A wiring pattern was formed (FIG. 4i), and a pattern of each element was formed through an etching process using a ferric chloride solution and a resist stripping process using these resist patterns as a mask. (Fig. 4j)
Each element pattern is an inductor element 410, a capacitor element 411, and a resistance element 402 shown in FIG.
The resistance value (initial resistance value) and capacitor capacity (initial capacity) at this time were measured.

Using the prepreg (trade name: GEA-67N manufactured by Hitachi Chemical Co., Ltd.) (406) on the substrate on which the element is formed as described above, the dielectric sheet on which the resistor is formed is pasted with a vacuum press machine, and the via hole is formed. Forming, plating, wiring formation, solder resist pattern formation, and nickel-gold plating finish on the terminal part were performed to produce a printed wiring board with built-in passive elements.
The thus obtained printed wiring board with a built-in image receiving element has a capacitor element and a resistance element formed on the front and back sides of one conductor layer, so that C and R circuits can be formed with the shortest wiring length. Can understand.

On the copper foil having a thickness of 12 μm, a substitutional electroless silver plating film is partially formed at a location corresponding to the resistance element electrode portion in the same manner as in Example 1. After printing and firing the resistor, the core substrate / prepreg Stacked in the order of / copper foil / dielectric sheet (with copper foil on one side) and laminated with a vacuum press.
Thereafter, a printed circuit board with built-in passive elements was obtained in the same manner as in Example 1.
The passive element built-in printed wiring board obtained in this way has capacitor elements and resistance elements formed on the front and back sides of one conductor layer as in the first embodiment, so that C and R circuits are formed with the shortest wiring length. I can understand that you can.

<Comparative Example 1>
After stacking in the order of prepreg / copper foil on the core substrate, laminating with a vacuum press machine, forming a via hole with CO2 laser, roughening treatment with alkaline permanganate, electroless copper plating, electrolytic copper plating Electrical connection was performed, and an electrode of a resistance element, a lower electrode of a capacitor element, an inductor element pattern, and a wiring pattern were formed by etching.
Next, a silver paste pattern was formed on the electrode of the resistive element by screen printing using a 200-mesh stainless paste with a silver paste (trade name: LS-504J, manufactured by Asahi Chemical Research Laboratories).
Thus, after drying the board | substrate with which the silver paste pattern was formed at 90 degreeC for 30 minutes, and also baking for 30 minutes at 150 degreeC, when the thickness of silver paste hardened | cured material was measured, thickness of about 20 micrometers Had.

Next, carbon paste (trade name: TU-100-8 manufactured by Asahi Chemical Research Laboratories) is 200 mesh, wire diameter = 40 μm so that the pair of silver paste electrodes can be electrically connected. Screen printed.
When the viscosity of the carbon paste used for printing was measured with a rotational viscometer (trade name: manufactured by Viscotester VT-04 Lion), it was about 700 dPa · s.
The design value of the resistor sandwiched between the pair of electrodes was 0.5 mm in width and 0.67 mm in length.
Thus, after drying the board | substrate with which the resistor was printed at 90 degreeC for 30 minutes, baking was further performed at 200 degreeC for 1 hour.

Next, a dielectric paste (trade name: CX-16, manufactured by Asahi Chemical Research Laboratories) was formed so as to cover the lower electrode by screen printing using a stainless mesh plate of 100 mesh and wire diameter = 50 μm.
The dielectric pattern thus obtained was dried at 90 ° C. for 30 minutes, and then baked at 150 ° C. for 30 minutes.
Next, a copper paste (trade name: manufactured by NF2000 Tatsuta System Electronics Co., Ltd.) was formed so as to straddle the dielectric pattern and the upper electrode lead-out wiring using a stainless mesh plate of 100 mesh and wire diameter = 50 μm.
The copper paste pattern was dried at 90 ° C. for 30 minutes, and further baked at 150 ° C. for 30 minutes to form a capacitor element.

Thereafter, a passive element built-in printed wiring board was manufactured in the same manner as in Example 1.
When manufactured by the above method, as shown in Table 1, the accuracy of making resistance elements and capacitor elements is poor, and the results of the high-temperature and high-humidity test and the insulation reliability between the silver paste lines used in the resistance elements are also poor. Thus, it can be understood that the passive element built-in printed wiring board having the structure described in Example 1 and Example 2 is superior in processing accuracy and reliability.

<Comparative example 2>
A passive element built-in printed wiring board formed so as to electrically connect the conductor electrode pattern and the resistor pattern in the resistance element described in Comparative Example 1 was manufactured.
As shown in Table 1, it can be seen that the resistance element thus obtained has a large variation in resistance value in a high-temperature and high-humidity test and poor reliability.

It is a cross-sectional schematic diagram which shows one Example of the printed wiring board which incorporated the conventional resistive element which connected the resistance material directly on the copper electrode. It is a cross-sectional schematic diagram which shows one Example of the printed wiring board which incorporated the conventional resistive element which connected resistive material via the silver paste on the copper electrode. It is a cross-sectional schematic diagram which shows one Example of the passive element inner layer printed wiring board of this invention. It is manufacturing process explanatory drawing which extracted a part of printed wiring board with a built-in passive element of this invention.

Explanation of symbols

11, 21... Resistor 12, 22 ...... Copper electrode 13, 23 ...... Insulating layer 24 ...... Silver paste 300 a・ ・ ・ ・ ・ ・ ・ ・ Printed wiring board with built-in passive element 301 ・ ・ ・ ・ ・ ・ ・ ・ ・ Inductor element 302 ・ ・ ・ ・ ・ ・ ・ ・ ・ Capacitor element 303 ・ ・ ・ ・ ・ ・ ・ ・ ・ Resistance element 320... Core substrate 321 ... Conductor layer 3
322 ... Silver plated film 323 ... Resistor 324 ... Dielectric 325 ... Via hole 326 ... Solder resist 327 ... Conductor layer 1
328 ... Conductor layer 2
400 ... Dielectric sheet with double-sided copper foil 401 ... Dielectric material 402 ... Copper foil 403 ... Dry film resist 404 ... Silver plating film 405 ... Carbon paste (resistor)
406 ... prepreg 407 ... core substrate 408 ... dry film resist 409 ... dry film resist 410 ...・ ・ ・ ・ Inductor element 411 ・ ・ ・ ・ ・ ・ ・ ・ Capacitor element 412 ・ ・ ・ ・ ・ ・ ・ ・ Resistor element 413 ・ ・ ・ ・ ・ ・ ・ ・ Via hole 414 ・ ・ ・ ・ ・ ・ ・ ・ Solder resist

Claims (12)

In a multilayer wiring board consisting of a laminated structure of insulating resin layer and wiring pattern layer, and built-in passive element parts such as capacitors, resistors, resistors, inductors, etc.
A multilayer wiring board having a structure in which a resistance element is formed on one surface and a capacitor element is formed on the other surface with at least one wiring layer interposed therebetween.   The resistance element is connected to an electrode obtained by processing a part of the wiring layer, and the surface of the electrode has a configuration in which at least a surface in contact with the resistor is covered with substitutional electroless silver plating. The multilayer wiring board according to claim 1.   3. The multilayer wiring board according to claim 2, wherein the resistor is a material obtained by dispersing a conductive filler in a thermosetting resin.   The multilayer according to any one of claims 1 to 3, wherein the resistance element has a structure in which a protective layer made of a material in which an inorganic filler is dispersed in a thermosetting resin is coated on the surface of the resistance element. Wiring board.   5. The multilayer wiring according to claim 1, wherein the capacitor element has a structure in which a dielectric material is sandwiched between an electrode obtained by processing a part of the wiring layer and a copper electrode facing the capacitor element. substrate.   6. The multilayer wiring board according to claim 5, wherein the dielectric material is a material obtained by dispersing an inorganic filler in a thermosetting resin.   The multilayer wiring board according to claim 1, wherein an inductor element is formed in a part of a wiring pattern layer in which a resistance element and a capacitor element are formed on the front and back of the wiring layer. The manufacturing method of the multilayer wiring board characterized by including the following processes.
(A) In a copper foil of a dielectric sheet in which copper foil is laminated on both sides, a portion corresponding to a resistor electrode part is subjected to partial silver plating, and a resistor is formed into a pattern by a printing method, and patterned resistance The process of thermosetting the body.
(B) The process of laminating | stacking the surface by which the resistor of the dielectric sheet with a double-sided copper foil produced by (a) was patterned, and a core board | substrate through an adhesive layer.
(C) A step of patterning, as a top electrode of a capacitor element, a copper foil on a surface opposite to a surface on which a resistance element is formed in a dielectric sheet in which copper foil is laminated on both sides by a photolithography technique.
(D) A step of forming a dielectric pattern by blasting or etching using the upper electrode obtained in (c) as a mask.
(E) A step of patterning the surface of the upper electrode and dielectric pattern obtained in (d) as a lower electrode of the capacitor element by a photolithography technique. The manufacturing method of the multilayer wiring board characterized by including the following processes.
(A) A step of performing partial substitution silver plating on one surface of a copper foil, forming a resistor in a pattern by a printing method, and thermally curing the resistor.
(B) The process of laminating | stacking the surface in which the resistor of the copper foil produced in (a) was formed, and a core board | substrate through an contact bonding layer.
(C) A step of further laminating the laminate produced in (b) on the dielectric side surface of the dielectric sheet in which the copper foil is laminated on one side.
(D) A step of patterning the copper foil of the dielectric sheet as an upper electrode of the capacitor element by a photolithography technique.
(E) A step of forming a dielectric pattern by blasting or etching using the upper electrode obtained in (d) as a mask.
(F) A step of patterning the surface of the upper electrode and the dielectric pattern obtained in (e) as a lower electrode of the capacitor element by a photolithography technique.   The method for manufacturing a multilayer wiring board according to claim 8 or 9, wherein a temperature condition such that a maximum temperature reaches 180 ° C or higher is employed in the thermosetting treatment of the resistor in the step (a).   The method for manufacturing a multilayer wiring board according to claim 8, further comprising a step of trimming the resistor.   10. The method for manufacturing a multilayer wiring board according to claim 8, further comprising a step of forming an inductor by an etching method.

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