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JP2006287233A5 - - Google Patents

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Publication number
JP2006287233A5
JP2006287233A5 JP2006102013A JP2006102013A JP2006287233A5 JP 2006287233 A5 JP2006287233 A5 JP 2006287233A5 JP 2006102013 A JP2006102013 A JP 2006102013A JP 2006102013 A JP2006102013 A JP 2006102013A JP 2006287233 A5 JP2006287233 A5 JP 2006287233A5
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JP
Japan
Prior art keywords
film
semiconductor device
metal
barrier film
semiconductor
Prior art date
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Application number
JP2006102013A
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Japanese (ja)
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JP5063913B2 (en
JP2006287233A (en
Filing date
Publication date
Priority claimed from US11/214,680 external-priority patent/US7501673B2/en
Priority claimed from KR1020050134428A external-priority patent/KR100725369B1/en
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Publication of JP2006287233A publication Critical patent/JP2006287233A/en
Publication of JP2006287233A5 publication Critical patent/JP2006287233A5/ja
Application granted granted Critical
Publication of JP5063913B2 publication Critical patent/JP5063913B2/en
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Claims (13)

半導体基板;
前記半導体基板上のドープされた導電膜;
前記ドープされた導電膜上の非晶質半導体物質を含む拡散バリヤ膜;
前記拡散バリヤ膜上のオーミックコンタクト膜;
前記オーミックコンタクト膜上の金属バリヤ膜;および
前記金属バリヤ膜上の金属膜;
を含むことを特徴とする半導体素子。
Semiconductor substrate;
A doped conductive film on the semiconductor substrate;
A diffusion barrier film comprising an amorphous semiconductor material on the doped conductive film;
An ohmic contact film on the diffusion barrier film;
A metal barrier film on the ohmic contact film; and a metal film on the metal barrier film;
A semiconductor device comprising:
前記ドープされた導電膜は、ドープされたポリシリコンを含むことを特徴とする請求項1に記載の半導体素子。   The semiconductor device according to claim 1, wherein the doped conductive film includes doped polysilicon. 前記非晶質半導体物質は、Si、Ge及びGaAsを含むことを特徴とする請求項1または2に記載の半導体素子。 The amorphous semiconductor material, the semiconductor device according to claim 1 or 2, characterized in that it comprises Si, Ge and GaAs. 前記オーミックコンタクト膜は、高融点金属シリサイドを含むことを特徴とする請求項1ないし3のいずれか一項に記載の半導体素子。 The ohmic contact layer, a semiconductor device according to any one of claims 1 to 3, characterized in that it comprises a refractory metal silicide. 前記高融点金属シリサイドは、W及びSiを含むことを特徴とする請求項4に記載の半導体素子。   The semiconductor device according to claim 4, wherein the refractory metal silicide contains W and Si. 前記金属膜は、高融点金属を含むことを特徴とする請求項1ないし5のいずれか一項に記載の半導体素子。 The metal film semiconductor device according to any one of claims 1 to 5, characterized in that it comprises a refractory metal. 前記拡散バリヤ膜の厚さは、30Å以上であることを特徴とする請求項1ないし6のいずれか一項に記載の半導体素子。 The diffusion thickness of the barrier film, the semiconductor device according to any one of claims 1 to 6, characterized in that at least 30 Å. 半導体基板;
前記半導体基板内に形成された第1の導電型のソース/ドレイン領域;
前記ソース/ドレイン領域の間のチャネル領域上に形成されたゲート絶縁膜;および
前記ゲート絶縁膜上のドープされた導電膜、前記ドープされた導電膜上の非晶質シリコン物質を含む拡散バリヤ膜、前記拡散バリヤ膜上のオーミックコンタクト膜、前記オーミックコンタクト膜上の金属バリヤ膜及び前記金属バリヤ膜上の金属膜を含む多層ゲート電極;
を含むことを特徴とする半導体素子。
Semiconductor substrate;
A source / drain region of a first conductivity type formed in the semiconductor substrate;
A gate insulating film formed on a channel region between the source / drain regions; a doped conductive film on the gate insulating film; a diffusion barrier film comprising an amorphous silicon material on the doped conductive film A multi-layer gate electrode including an ohmic contact film on the diffusion barrier film, a metal barrier film on the ohmic contact film, and a metal film on the metal barrier film;
A semiconductor device comprising:
前記第1の導電型は、P型であることを特徴とする請求項に記載の半導体素子。 9. The semiconductor device according to claim 8 , wherein the first conductivity type is a P type. 前記ゲート電極下部の前記半導体基板内にリセスチャネルトレンチが形成され、前記ゲート絶縁膜は、前記リセスチャネルトレンチの内表面に沿って形成されたことを特徴とする請求項8または9に記載の半導体素子。 10. The semiconductor according to claim 8 , wherein a recess channel trench is formed in the semiconductor substrate below the gate electrode, and the gate insulating film is formed along an inner surface of the recess channel trench. element. 前記半導体基板内に形成された第2の導電型のソース/ドレイン領域;
前記第2の導電型のソース/ドレイン領域の間のチャネル領域上に形成された第2のゲート絶縁膜;および
前記第2のゲート絶縁膜上に形成されたドープされた導電膜、前記ドープされた導電膜上の非晶質半導体物質を含む拡散バリヤ膜、前記拡散バリヤ膜上のオーミックコンタクト膜、前記オーミックコンタクト膜上の金属バリヤ膜及び前記金属バリヤ膜上の金属膜を含む第2の多層ゲート電極;
をさらに含むことを特徴とする請求項8ないし10のいずれか一項に記載の半導体素子。
A source / drain region of a second conductivity type formed in the semiconductor substrate;
A second gate insulating film formed on a channel region between the source / drain regions of the second conductivity type; and a doped conductive film formed on the second gate insulating film, the doped A second multilayer including a diffusion barrier film containing an amorphous semiconductor material on the conductive film, an ohmic contact film on the diffusion barrier film, a metal barrier film on the ohmic contact film, and a metal film on the metal barrier film Gate electrode;
The semiconductor device according to claim 8 , further comprising:
前記第2の導電型は、n型であること
を特徴とする請求項11に記載の半導体素子。
The semiconductor element according to claim 11 , wherein the second conductivity type is an n-type.
前記第2の多層ゲート電極下部の前記半導体基板内にリセスチャネルトレンチが形成され、前記第2のゲート絶縁膜は、前記リセスチャネルトレンチの内表面に沿って形成されたことを特徴とする請求項11または12に記載の半導体素子。 The recess channel trench is formed in the semiconductor substrate below the second multilayer gate electrode, and the second gate insulating film is formed along the inner surface of the recess channel trench. The semiconductor element according to 11 or 12 .
JP2006102013A 2005-04-04 2006-04-03 Semiconductor device having multilayer gate structure and method of manufacturing the same Active JP5063913B2 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
KR20050028245 2005-04-04
KR10-2005-0028245 2005-04-04
US11/214,680 2005-08-29
US11/214,680 US7501673B2 (en) 2005-04-04 2005-08-29 Semiconductor device multilayer structure, fabrication method for the same, semiconductor device having the same, and semiconductor device fabrication method
KR1020050134428A KR100725369B1 (en) 2005-04-04 2005-12-29 Semiconductor device having multilayer structure and fabrication method thereof
KR10-2005-0134428 2005-12-29

Publications (3)

Publication Number Publication Date
JP2006287233A JP2006287233A (en) 2006-10-19
JP2006287233A5 true JP2006287233A5 (en) 2009-05-21
JP5063913B2 JP5063913B2 (en) 2012-10-31

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006102013A Active JP5063913B2 (en) 2005-04-04 2006-04-03 Semiconductor device having multilayer gate structure and method of manufacturing the same

Country Status (1)

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JP (1) JP5063913B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4690120B2 (en) 2005-06-21 2011-06-01 エルピーダメモリ株式会社 Semiconductor device and manufacturing method thereof
US7781333B2 (en) * 2006-12-27 2010-08-24 Hynix Semiconductor Inc. Semiconductor device with gate structure and method for fabricating the semiconductor device
KR20130116099A (en) * 2012-04-13 2013-10-23 삼성전자주식회사 Semiconductor device and method for fabricating the same

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0831931A (en) * 1994-07-11 1996-02-02 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
JP3892588B2 (en) * 1997-12-26 2007-03-14 株式会社東芝 Semiconductor device and manufacturing method thereof
JPH11297988A (en) * 1998-04-01 1999-10-29 Nanya Sci & Technol Co Ltd Manufacture of gate electrode which prevents spiking effect of metal silicide
JP2002373944A (en) * 2001-06-15 2002-12-26 Hitachi Ltd Semiconductor integrated circuit and its manufacturing method
JP3781666B2 (en) * 2001-11-29 2006-05-31 エルピーダメモリ株式会社 Method for forming gate electrode and gate electrode structure
US6902993B2 (en) * 2003-03-28 2005-06-07 Cypress Semiconductor Corporation Gate electrode for MOS transistors
JP2004319722A (en) * 2003-04-16 2004-11-11 Hitachi Ltd Semiconductor integrated circuit device and its manufacturing method

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