JP2001308144A - Method of flip chip mounting - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an effective method of mounting for realizing a fluxless bonding in the air, when mounting an IC chip having solder bumps formed of lead-free solder on a wiring board by a flip chip bonding method. SOLUTION: The surface of a lead-free tin-zinc-based solder alloy of which the solder bumps 12 of the IC chip 11 are formed is reformed, The purpose of this reformation is to prevent reoxidation of tin and zinc by removing a tin oxide film and a zinc oxide film on the surface of the solder bumps 12 by casting a hydrogen-contained plasma 13 and then forming a fluorine-contained layer on the surface of the solder bumps 12 by casting a fluorine-contained plasma, After the reformation, the solder bumps 12 of the IC chip 11 are directly mounted on metal electrodes of the wiring board and then are bonded by a flip chip bonding method, By reforming the oxide film layer of the solder bumps 12 formed of a tin-zinc-based solder alloy, a fluxless bonding of the solder bumps 12 of the IC chip 11 and the metal electrodes of the wiring board, is made possible in the air.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board having at least one terminal formed of lead-free solder and a method of flip-chip mounting an integrated circuit chip.

[0002]

2. Description of the Related Art A conventional flip chip mounting method (face) for directly connecting solder terminals formed on a surface of an integrated circuit chip (hereinafter, an integrated circuit is referred to as an "IC") to wiring electrodes of a wiring board or a package. As down bonding, C4 (Controlled Collapse Chip Conne
ction) has been used.

Usually, in C4, a high melting point solder containing lead (Pb-5 mass% Sn) and a tin-lead eutectic solder (S
n-37% by mass Pb), which is described, for example, in JP-A-8-64717.

[0004] However, in consideration of recent environmental issues, a shift from conventional lead-containing solder to lead-free solder containing no lead has been promoted.

[0005] When joining solder, it is necessary to use a flux called a flux. A lead-free solder generally has poor solder wettability, and it is necessary to use a flux having a higher activity than in the past in order to reliably join to a counterpart metal. Japanese Patent Application Laid-Open No. 10-175092 discloses a tin-free solder. It describes the flux of zinc-based solder.

When such a flux is used, the flux residue is cleaned and removed with a cleaning liquid after the bonding. As the cleaning liquid, an organic solvent, an aqueous solution of a surfactant, or the like is used. JP-A-10-46198 discloses that
A cleaning agent having excellent drying properties after removing flux from a flip-chip mounted product is described.

On the other hand, as a technique using plasma for soldering, Japanese Patent Application Laid-Open No. H11-340614 discloses a technique in which an oxide film on a solder surface is removed by plasma treatment, and the solder surface is extremely thin under a low oxygen concentration atmosphere. A method for performing fluxless soldering by generating an oxide film that does not hinder solderability is described.

[0008] However, this treatment is not suitable for a tin-zinc solder alloy which is more easily oxidized than the conventional tin-lead solder.

Japanese Patent Application Laid-Open No. 2000-61628 describes a method for improving the meltability of a solder surface by performing a fluorination treatment on the solder surface with hydrogen fluoride.

[0010] However, hydrogen fluoride is a highly corrosive gas, and there is a problem that careful handling is required.

[0011]

As described above, since the conventional solder containing lead cannot be used, the replacement with lead-free solder must be promoted. And
The tin-zinc solder alloy as a lead-free solder has a melting point of 199 ° C. in the eutectic composition (Sn-9 mass% Zn), which is close to the melting point of 183 ° C. of the conventional tin-lead eutectic solder, and -It has advantages such as superior mechanical strength compared to lead solder alloys.

However, tin-zinc solder alloys are easily oxidized and have very poor solderability. In order to reliably join to the counterpart metal, a flux having a stronger activity than before is required, and joining in the atmosphere is also considered to be difficult.

When the flux is used, the solid portion of the flux and the activator remain as flux residues on the substrate even after soldering. The residual flux residue causes corrosion of the wiring circuit surface and lowers reliability, so that cleaning after soldering is required.

However, when a flux having a strong activity and a flux having heat resistance is used, cleaning becomes difficult due to seizure of the flux residue, and furthermore, the cleaning becomes more difficult as the wiring density increases. And the cleaning cost also becomes high.

Therefore, in order to reduce the environmental load, it is necessary to remove the flux without flux or to use fluxless soldering without using the flux itself.
For that purpose, it is necessary to solve the above-mentioned oxidation problem by using a flux.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described circumstances, and is intended for use in the case where a wiring board and an integrated circuit chip having at least one terminal formed of lead-free solder are flip-chip mounted. It is an object of the present invention to provide an effective mounting method for realizing cleaning.

[0017]

According to a first aspect of the present invention, there is provided a method of modifying a surface of a lead-free solder forming at least one terminal of a wiring substrate and an integrated circuit chip, and forming a wiring after the modification. It is a flip chip mounting method comprising a step of directly mounting terminals of an integrated circuit chip on terminals of a substrate and a step of bonding the terminals after the mounting, by modifying an oxide film layer on the surface of the solder terminals, Fluxless bonding between terminals of a wiring board and an integrated circuit chip in the atmosphere is enabled.

According to a second aspect of the present invention, in the flip chip mounting method of the first aspect, the material of the lead-free solder is a tin-zinc based solder alloy. Although it is inexpensive and has the advantage of having a lower melting point than other lead-free solders, zinc has a large ionization tendency and is easily oxidized, so it is easy to form a zinc oxide film on the solder terminal surface. By modifying the surface of the solder terminal and removing the zinc oxide film together with the tin oxide from the surface of the terminal, good solder bonding can be achieved without using a flux requiring post-cleaning.

According to a third aspect of the present invention, in the flip-chip mounting method according to the second aspect, the tin-zinc solder alloy includes at least one element of bismuth, indium, and copper in addition to tin and zinc. , Each having an alloy composition of less than 10% by mass. These additional elements help to improve the solder wettability and lower the melting point. However, if the ratio of these additional elements is too large, mechanical Since the strength is reduced, the content of each additive element is set to less than 10% by mass.

According to a fourth aspect of the present invention, in the flip chip mounting method according to the second or third aspect, the mating terminal to be joined to the tin-zinc solder alloy terminal is formed on the underlying copper conductor. A nickel layer is provided on the nickel layer, and one of a gold layer and a gold layer via a palladium layer is provided.The nickel layer prevents diffusion of zinc to the copper conductor. Further, the formation of a copper-zinc intermetallic compound having low mechanical strength is prevented, the thickness of the gold layer is made thin and uniform by the palladium layer, and the solder wettability is improved by the gold layer.

According to a fifth aspect of the present invention, in the flip chip mounting method of the fourth aspect, the nickel layer, the palladium layer and the gold layer are formed by an electroless plating method and contain impurities such as phosphorus and boron. The electroless plating method has no problem even if impurities such as phosphorus and boron are mixed. Rather, it does not require a common electrode, is advantageous for wiring routing, and can cope with fine pitch between terminals. Etc. It has many advantages.

According to a sixth aspect of the present invention, in the flip chip mounting method of the fourth or fifth aspect, the thickness of the gold layer is set to 0.02 to 0.3 μm. Appropriate solder wettability and appropriate solder connection strength can be obtained. If the thickness is less than 0.02 μm, the solder wettability deteriorates. If the thickness exceeds 0.3 μm, the cost increases and the gold concentration in the solder increases, so that a brittle gold-tin intermetallic compound is easily generated. It is easy to peel off.

According to a seventh aspect of the present invention, in the flip-chip mounting method according to the second or third aspect, the mating terminal to be joined to the tin-zinc-based solder alloy terminal is located above the underlying copper conductor. A lead-free solder layer is formed on the substrate, and the lead-free solder layer achieves an improvement in solder wettability at low cost.

According to an eighth aspect of the present invention, in the flip-chip mounting method according to any one of the first to seventh aspects, the step of modifying the surface of the solder terminal includes the step of forming a tin oxide film on the surface of the solder terminal. It is provided with a step of removing a zinc oxide film and a step of forming a layer containing fluorine on the surface of the solder terminal. On the solder terminal surface from which the oxide film has been removed,
By forming a layer containing fluorine, reoxidation of tin and zinc on the surface of the solder terminal is prevented, and solder bonding without flux is ensured.

According to a ninth aspect of the present invention, in the flip chip mounting method of the eighth aspect, the step of removing the oxide film and the step of forming the layer containing fluorine are performed without being exposed to the air. Therefore, the removal of the oxide film and the formation of the fluorine-containing layer are performed more efficiently than in the air.

The invention described in claim 10 is the eighth invention.
Or the flip-chip mounting method according to item 9, wherein the step of removing the oxide film on the surface of the solder terminal is performed by a hydrogen-containing plasma, and the tin-zinc-based solder alloy is tin-oxidized on the surface of the solder terminal by irradiation with the hydrogen-containing plasma. By removing the film and the zinc oxide film, the terminals can be joined together without using a flux that requires post-cleaning.

The invention described in claim 11 is the eighth invention.
Or the flip-chip mounting method according to item 9, wherein the step of forming a fluorine-containing layer on the surface of the solder terminal is performed by using a fluorine-containing plasma, and the step of forming a layer containing tin-zinc solder alloy on which the oxide film has been removed is performed on the surface of the solder terminal. By forming a fluorine-containing layer using a fluorine-containing plasma, reoxidation of tin and zinc on the surface of the solder terminal is prevented, and solder wettability is improved.

The invention described in claim 12 is the first invention.
8. The flip-chip mounting method according to any one of items 1 to 7, wherein the step of directly mounting the terminals of the integrated circuit chip on the terminals of the wiring board and the step of bonding are performed in the air, and the surface is modified. Solder terminals are
Since there is no danger of re-oxidation even when mounted and bonded in the air, the mounting process and the bonding process are facilitated.

[0029]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

As shown in FIG. 1, an integrated circuit chip (hereinafter, this integrated circuit chip is referred to as an “IC chip”)
On the upper surface of 11, a large number of surface electrodes as terminals, that is, solder terminals formed in a bump shape (hereinafter, these solder terminals are referred to as “solder bumps”) 12 are formed.

The material of the solder bumps 12 is a tin-zinc solder alloy, which is a lead-free solder, and has a eutectic composition of Sn-9 mass% Zn or bismuth for lowering the melting point by adjusting the amount of zinc. An alloy composition to which at least one element of indium, copper and copper is added in less than 10% by mass, for example, Sn-8% by mass Zn-3% by mass Bi is used.

These additional elements act to improve the solder wettability and lower the melting point. However, if the content of these additional elements is 10% by mass or more, the mechanical strength decreases, and the alloy becomes hard and brittle. Therefore, each additive element is 10
It was set to be less than mass%.

First, since the surface of the solder bump 12 made of a tin-zinc solder alloy formed on the IC chip 11 is covered with an oxide film, it is necessary to remove the oxide film. Here, it is important not only to remove the tin oxide film, which has conventionally been considered to impair the solderability, but also to remove the zinc oxide film.

The tin-zinc solder alloy has the advantages of being inexpensive and having a lower melting point than other lead-free solders (for example, S
The melting point of n-4.7% by mass Ag-1.7% by mass Cu is 217 ° C, whereas the melting point of eutectic Sn-9% by mass Zn is 199 ° C.
° C), compared to conventional tin-lead solders and lead-free tin-silver-based solder alloys, is attributed to poor solderability due to the zinc content.

Zinc is easily oxidized due to its high ionization tendency, and easily forms a zinc oxide film on the surface of the solder bump 12. However, the surface of the solder bump made of the tin-zinc solder alloy is modified to form the zinc oxide. By removing the film, good solderability can be obtained without using a flux that requires post-cleaning.

Solder bump of the tin-zinc solder alloy
In the step of removing the oxide film formed on the surface of 12, the hydrogen-containing inert gas plasma, that is, the hydrogen-containing plasma
By irradiating 13, the tin oxide film and the zinc oxide film on the bump surface can be effectively removed by the strong reducing action and etching action of the hydrogen-containing plasma 13.

The irradiation conditions of the hydrogen-containing plasma 13 are as follows: the irradiation temperature is lower than the melting point of the tin-zinc solder alloy including room temperature, the pressure is reduced to about 10 to 60 Pa, and the irradiation time is 2 minutes or less. I do.

The process gas for generating the hydrogen-containing plasma is a mixed gas containing an inert gas and a hydrogen gas having a hydrogen content of 3% by volume or more and less than 8% by volume in terms of hydrogen molecules. Helium or argon is used as the inert gas.

In this manner, the solder bumps 12 of the tin-zinc solder alloy can be bonded without flux by removing the oxide film layer on the surface of the solder bumps 12 by a dry process using plasma. And

Next, as shown in FIG. 2, a process for forming a layer containing fluorine is performed on the surface of the solder bump 12 of the tin-zinc solder alloy from which the oxide film has been removed. By forming this fluorine-containing layer, reoxidation of tin and zinc on the surface of the solder bump 12 can be prevented, and solder wettability can be improved.

In the step of forming a fluorine-containing layer on the surface of the solder bump 12, a fluorine-containing plasma 14 is irradiated after the step of removing an oxide film on the surface of the solder bump 12.

The irradiation conditions of the fluorine-containing plasma 14 are as follows: the irradiation temperature is lower than the melting point of the tin-zinc solder alloy including room temperature, the pressure is reduced to about 10 to 60 Pa, and the irradiation time is 60 seconds or less. I do.

The process gas for generating the fluorine-containing plasma includes carbon fluoride compounds such as carbon tetrafluoride (CF ₄ ) and C ₅ F ₈ , nitrogen trifluoride (NF ₃ ), and sulfur hexafluoride (S
F ₆ ) and a mixed gas containing at least one of oxygen and an inert gas (helium or argon).

As described above, the surface of the solder bump 12 made of the tin-zinc solder alloy is modified by the irradiation of the hydrogen-containing plasma 13 and the fluorine-containing plasma 14, thereby using a flux requiring post-cleaning. Instead, it can be joined to the metal electrode of the next wiring board.

Next, as shown in FIG.
The inverted IC chip 11 is mounted thereon. that time,
IC chip 11 Tin-zinc solder alloy solder bump 12
And the metal electrode 16 as a terminal of the wiring board 15 are positioned so as to abut each other.

Solder bump of the tin-zinc solder alloy
The underlying portion of 12, and the mating metal electrode 16 to be joined to the solder bump 12 form a nickel layer on the underlying copper conductor, and directly provide a gold layer on the nickel layer, or This is a structure in which a gold layer is provided via a palladium layer.

The nickel layer, the palladium layer and the gold layer
Although it is formed by electroless plating and contains impurities such as phosphorus and boron, there is no particular problem if impurities such as phosphorus and boron are mixed in the step of forming a nickel layer or the like by electroless plating.

Rather, the electroless plating method has many advantages such as not requiring a common electrode, being advantageous in wiring layout, and being able to cope with a fine pitch between terminals.

The nickel layer prevents the diffusion of zinc into the copper conductor to prevent formation of a copper-zinc intermetallic compound having low mechanical strength, and the palladium layer makes the thickness of the gold layer thin and uniform. It works, and the gold layer improves the solder wettability.

The thickness of the gold layer is set within a range of 0.02 to 0.3 μm. Within this range, proper solder wettability and proper solder connection strength can be obtained. 0.02μ
If it is less than m, the solder wettability will be worse, and if it exceeds 0.3 μm, the cost will increase and the gold concentration in the solder will increase, and a brittle gold-tin intermetallic compound will be easily generated, and it will peel off from this part. It will be easier.

The other metal electrode 16 to be joined to the tin-zinc solder alloy solder bump 12 may be a lead-free solder layer formed on an underlying copper conductor.
This lead-free solder layer is made of tin-zinc based solder alloy, tin-
It is formed by a silver-based solder alloy or the like. This lead-free solder layer can improve solder wettability and has a cost advantage that it can be formed at lower cost than when a gold layer is provided on a nickel layer.

Next, as shown in FIG. 4, a solder bump 12 made of a tin-zinc solder alloy is
Join to 16. 12a is a solder joint.

The bonding form of the solder bonding portion 12a can be either fusion bonding by heating the solder bump 12 at a temperature higher than the melting point or diffusion bonding by heating and pressing at a temperature lower than the melting point.

In the joining step, the object to be treated is
Preheating at a temperature of not more than 00 ° C. prevents heat shock of the IC chip 11 and the like, and smoothly starts fusion bonding or diffusion bonding.

The solder bumps 12 of the IC chip 11 are connected to the wiring board
Although the steps of directly mounting and bonding the metal electrodes 16 on the metal electrodes 16 are performed in the air, the solder bumps 12 whose surfaces have been modified may be reoxidized even when mounted and bonded in the air. Since there is no mounting step, the mounting step and the joining step are facilitated.

The mounting step and the joining step are performed by one device or a plurality of devices. For example, both mounting and reflow may be performed by one flip chip bonder, or separately performed such that the IC chip 11 is mounted on the wiring board 15 by a mounter and joined by a reflow device. good.

According to this mounting method, the surface of the solder bump 12 made of the tin-zinc solder alloy is modified, so that the solder bump 12 made of the tin-zinc solder alloy can be used without using a flux requiring post-cleaning. 12 can be directly soldered to the metal electrode 16 of the wiring board 15.

In the above embodiment, the IC chip 11
Is a flip-chip mounting method in which the terminals of the wiring board 15 are formed of lead-free solder and the surface of the terminals of the lead-free solder is modified with plasma. On the contrary, the terminals (electrodes) of the wiring board 15 are formed of lead-free solder. The terminal surface of the lead-free solder may be modified with plasma, or the IC chip
Alternatively, both terminals of the wiring board 15 and the terminal 11 may be formed of lead-free solder, and the surface of each terminal of the lead-free solder may be modified with plasma.

[0059]

Next, an embodiment of the flip-chip mounting method will be described using specific numerical values.

The size of the IC chip 11 is 10 mm × 10
mm, 400 of the solder bumps 12 of Sn-9 mass% Zn solder alloy having a height of 60 μm were provided.

The wiring board 15 was made of FR4 having a thickness of 1 mm, and the metal electrode 16 was formed by electroless nickel plating on a copper conductor and further thinly electroless gold plating thereon. .

The metal electrode 16 has a size of 100 μm × 100 μm.
m, the thickness of the copper conductor is 18 μm, the thickness of the nickel plating layer is 5 μm, and the thickness of the gold plating layer is 0.05.
Each having a thickness of μm.

First, Sn-9 mass% Z on the IC chip 11
By irradiating the hydrogen-containing plasma 13 to the surface of the solder bump 12 of the n-solder alloy, the oxide film formed on the surface of the bump was removed.

As a process gas of the hydrogen-containing plasma 13, argon was used as an inert gas, and a plasma treatment was performed with an argon plasma containing 7% by volume of hydrogen under a pressure of about 40 Pa.

Although the plasma generation method is not particularly limited, in this embodiment, the plasma was generated by applying a high-frequency voltage to the parallel flat plate. The high frequency power supply was processed for 60 seconds at a power of about 1000 watts using a frequency of 13.56 MHz.

Subsequently, surface modification for forming a fluorine-containing layer on the surface of the solder bump 12 was performed by the fluorine-containing plasma 14. The substrate was treated with an oxygen gas plasma containing 80% by volume of carbon tetrafluoride under a pressure of about 40 Pa and a high frequency power output of about 1000 Watt for 30 seconds.

The method of generating the fluorine-containing plasma 14 is the same as that of the hydrogen-containing plasma 13.

After this plasma treatment, the solder bumps 12 on the IC chip 11 and the metal electrodes 16 on the wiring board 15 were joined by a flip chip bonder manufactured by Shibuya Kogyo Co., Ltd.

This joining was performed in the air. At that time, the wiring board 15 is preheated at 100 ° C., and the bonding tool temperature of the flip chip bonder is set at 250 ° C.
The solder bumps 12 of the IC chip 11 were heated and melt-bonded to a temperature of 225 ° C. The heating time was 17 seconds. Before heating, a pressure of 20 g per terminal was applied.
The height variation between the solder bumps 12 was dealt with.

As a result, even if flags are not used, S
Bonding in which the solder bumps 12 of the n-9 mass% Zn solder alloy showed sufficient solder wettability on the surface of the metal electrode 16 was obtained. Also in the comparison of the shear strength with the case of using the flux, the same result as the case of using the flux was obtained.

Next, the terminal of the wiring board 15 is formed of lead-free solder, and the terminal surface of the lead-free solder is modified by plasma processing without using flux. Table 1 below shows the test results comparing the case where the bonding was performed by using the above method and the case where the bonding according to the conventional method treated using the flux was performed using the flip chip bonder.

[0072]

[Table 1] As described above, according to the present mounting method, the terminal surface of the tin-zinc solder alloy is subjected to plasma treatment and reforming, so that the integrated circuit chip and the wiring substrate can be used without using a flux requiring post-cleaning. Terminals can be satisfactorily joined.

[0073]

According to the first aspect of the present invention, when a wiring board and an integrated circuit chip having at least one terminal formed of lead-free solder are mounted by flip-chip mounting, the oxide film layer on the surface of the solder terminal is modified. After mounting and bonding, the bonding between the terminals in the air can be reliably performed without using a flux, and post-flux cleaning can be omitted.

According to the second aspect of the present invention, the terminal surface of the tin-zinc-based solder alloy is modified, so that tin oxide and zinc oxide on the terminal surface can be used without using a flux requiring post-cleaning. Objects can be removed, and the terminals can be reliably soldered.

According to the third aspect of the present invention, the tin-zinc solder alloy contains at least one element of bismuth, indium, and copper in addition to tin and zinc in an amount of 10% by mass.
Since these alloys have an alloy composition of less than 10% by mass, the solder wettability can be improved and the melting point can be reduced by these additional elements. Can be prevented.

According to the fourth aspect of the present invention, the nickel layer can prevent the diffusion of zinc into the copper conductor, thereby preventing the formation of a copper-zinc intermetallic compound having low mechanical strength. The thickness of the gold layer can be made thin and uniform, and the gold layer can improve solder wettability.

According to the fifth aspect of the present invention, the electroless plating method for forming a nickel layer or the like has no problem even if impurities such as phosphorus and boron are mixed. It is advantageous for turning and has many advantages such as being able to cope with a fine pitch between terminals.

According to the sixth aspect of the invention, by setting the thickness of the gold layer to 0.02 to 0.3 μm, it is possible to ensure proper solder wettability and proper solder connection strength.

According to the seventh aspect of the present invention, a lead-free solder layer is formed on an underlying copper conductor as a counterpart terminal to be joined to a tin-zinc solder alloy terminal. With the solder layer, improvement in solder wettability can be achieved at low cost.

According to the eighth aspect of the present invention, by removing the tin or zinc oxide film on the surface of the solder terminal, it is possible to perform fluxless solder bonding, and to remove the oxide film from the solder terminal. By forming a fluorine-containing layer on the surface, reoxidation of tin and zinc on the surface of the solder terminal can be prevented, so that fluxless solder joining can be ensured.

According to the ninth aspect of the present invention, the step of removing the oxide film and the step of forming the layer containing fluorine are performed without being exposed to the air. Removal and formation of the fluorine-containing layer can be performed efficiently.

According to the tenth aspect of the present invention, the post-cleaning is required by removing the tin oxide film and the zinc oxide film by irradiating the surface of the solder terminal of the tin-zinc solder alloy with a hydrogen-containing plasma. Therefore, the terminals can be securely joined to each other without using any flux.

According to the eleventh aspect of the present invention, a fluorine-containing layer is formed by a fluorine-containing plasma on the surface of a solder terminal of a tin-zinc-based solder alloy from which an oxide film has been removed. Can be prevented from being reoxidized, and the solder wettability can be improved.

According to the twelfth aspect of the present invention, since the solder terminals whose surfaces have been modified are mounted and joined in the atmosphere without fear of re-oxidation, the mounting step and the joining step can be facilitated. .

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a plasma process using a hydrogen-containing plasma related to the flip-chip mounting method of the present invention.

FIG. 2 is a cross-sectional view showing plasma processing using fluorine-containing plasma after plasma processing using hydrogen-containing plasma.

FIG. 3 is a cross-sectional view showing a mounting state of an IC chip on a wiring substrate after the plasma processing using the fluorine-containing plasma.

FIG. 4 shows an IC for an electrode of a wiring board after mounting same as above.
It is sectional drawing which shows the joining state of the solder bump of a chip.

[Explanation of symbols]

 11 Integrated circuit chip (IC chip) 12 Solder bump as terminal 13 Hydrogen-containing plasma 14 Fluorine-containing plasma 15 Wiring board 16 Metal electrode as terminal

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (Reference) H05K 3/34 501 H05K 3/34 507Z 507 507C 512C 512 H01L 21/92 603B (72) Inventor Isao Sakamoto Nerima-ku, Tokyo 1-19-43 Higashi-Oizumi F-term (reference) in Tamura Corporation 5E319 AA03 AB05 AC01 AC17 BB01 BB04 CC33 CD04 CD29 CD60 GG20 5E336 AA04 BB01 CC34 CC58 EE03 GG05 5E343 AA02 AA11 BB16 BB23 BB48 BB48 BB48 GG18 5F044 KK02 KK18 KK19 QQ03 QQ04

Claims (12)

[Claims] 1. A step of modifying a surface of a lead-free solder forming at least one terminal of a wiring board and an integrated circuit chip, and a step of directly mounting a terminal of the integrated circuit chip on a terminal of the wiring board after the modification. And a step of bonding the terminals after the mounting. 2. The flip-chip mounting method according to claim 1, wherein the material of the lead-free solder is a tin-zinc solder alloy. 3. The tin-zinc-based solder alloy has an alloy composition in which at least one element of bismuth, indium, and copper is added in an amount of less than 10% by mass in addition to tin and zinc. 2. The flip-chip mounting method according to 2. 4. A mating terminal to be joined to a tin-zinc solder alloy terminal is provided with a nickel layer on an underlying copper conductor, and a gold layer and a palladium layer on the nickel layer. 4. The flip chip mounting method according to claim 2, wherein one of said gold layer and said gold layer is provided. 5. The flip chip mounting method according to claim 4, wherein the nickel layer, the palladium layer, and the gold layer are formed by an electroless plating method and contain impurities such as phosphorus and boron. 6. The flip chip mounting method according to claim 4, wherein the thickness of the gold layer is 0.02 to 0.3 μm. 7. A flip according to claim 2, wherein the mating terminal joined to the tin-zinc solder alloy terminal has a lead-free solder layer formed on an underlying copper conductor. Chip mounting method. 8. The step of modifying the surface of the solder terminal includes the step of removing an oxide film of tin and zinc on the surface of the solder terminal, and the step of forming a fluorine-containing layer on the surface of the solder terminal. The flip-chip mounting method according to claim 1, wherein: 9. The flip chip mounting method according to claim 8, wherein the step of removing the oxide film and the step of forming a layer containing fluorine are performed without being exposed to the air. 10. The flip-chip mounting method according to claim 8, wherein the step of removing the oxide film on the surface of the solder terminal is performed by using a hydrogen-containing plasma. 11. The flip chip mounting method according to claim 8, wherein the step of forming a fluorine-containing layer on the surface of the solder terminal is performed by using a fluorine-containing plasma. 12. The flip chip according to claim 1, wherein the steps of directly mounting and joining the terminals of the integrated circuit chip on the terminals of the wiring board are performed in the air. Implementation method.