JP2001044277A - Semiconductor substrate and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To effectively suppress crosswalks between regions, which are formed on the same semiconductor substrate and have conductivity. SOLUTION: This semiconductor substrate has a p-type single crystal silicon layer 102, on the side of the first main surface of a single crystal silicon semiconductor substrate 101 as a semiconductor layer having sufficient conductivity, has a silicon oxide film 103 on the layer 102 as an insulating film, has a single- crystal silicon layer 104 on the film 103, has n-type first and second high- concentration regions 105 and 106 in the layer 104 as conducting regions, has a silicon oxide layer 107 between both high-concentration regions 105 and 106 as an insulating layer and has a guard ring 108 of a p-type high-concentration region in the layer 107. The ring connected with the layer 102 is grounded via a terminal 109.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a semiconductor substrate and a semiconductor device.

[0002]

2. Description of the Related Art A conventional technique will be described with reference to FIGS. Conventionally, in order to suppress mutual noise (hereinafter referred to as crosstalk) between conductive regions 703 and 704 provided on the same semiconductor substrate, a method using an insulating layer such as 705, As shown in FIG. 8, a method of providing a conductive region 806 (hereinafter, guard ring) in an insulating layer 805 has been proposed. References: [1] Jean-Pierre Raskin et al, “Substrate
crosstalk reductionusing SOI technology ", IEEE tran
s.ED, Vol.44, No.12, pp 2252-2261, Dec.1997. [2] A.Vivia
ni et al, “Extended study of crosstalk in SOI-SIMO
X substrate ", IEDM Tech. Dig. 29.3.1, pp713-716, 1995.

[0003]

However, in such a conventional method, since the insulating layer acts as a capacitor, noise propagates between the conductive regions.
A sufficient effect of suppressing crosstalk was not obtained, and it was very difficult to suppress crosstalk particularly in a high frequency region (several GHz or more).

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has been made in consideration of the above-mentioned problems, and has been made in consideration of the above problems. It is intended to provide a device.

[0005]

According to the present invention, a semiconductor layer having sufficient conductivity formed in a single crystal semiconductor substrate is electrically connected to a guard ring, and the guard ring is grounded to ground. A semiconductor substrate and a semiconductor device in which mutual noise between conductive regions arranged on a semiconductor substrate are suppressed, and is particularly effective in suppressing performance deterioration due to mutual interference in an analog / digital mixed circuit or the like.

[0006]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In order to solve the above-mentioned problems, a semiconductor substrate according to the present invention is provided on a first main surface side of a single crystal semiconductor substrate.
And a first insulating film formed on the first insulating film.
And a first conductive layer having conductivity in contact with each of the first insulating layers. The first conductive layer has a first insulating layer provided in the first single crystal semiconductor layer. A third conductive region having a region and a second conductive region, and a third conductive region in contact with the single crystal semiconductor substrate in the first insulating layer and the first insulating film;
Further, a semiconductor layer having a sufficient conductivity is provided between at least the lower portion of the third conduction region and the single crystal semiconductor substrate, and the semiconductor layer having a sufficient conductivity is electrically connected to the third semiconductor region. Is grounded to the ground.

Further, the semiconductor device of the present invention is characterized in that at least one of a first conductive region and a second conductive region which are in contact with the first insulating layer and have conductivity has at least one junction transistor or field effect transistor. It is characterized in that a type transistor is made.

[0008]

An embodiment of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 is an example of a configuration diagram of a semiconductor substrate according to claim 1 of the present invention. As a semiconductor layer having a sufficient conductivity, for example, a p-type single crystal silicon having a thickness of 0.4 μm and an acceptor concentration of 1 × 10 ¹⁸ cm ⁻³ on the first main surface side of the single crystal silicon semiconductor substrate 101 which is a single crystal semiconductor substrate. A silicon oxide film 103 having a thickness of, for example, 0.4 μm as a first insulating film on the p-type single crystal silicon layer 102, and a first single crystal semiconductor layer on the silicon oxide film 103. For example, a single-crystal silicon layer 10 having a thickness of 0.2 μm
For example, the first conductive region having conductivity in
N-type high concentration region 105 (for example, donor concentration 1 × 10
For example, a second n-type high concentration region 106 (for example, a donor concentration of 1 cm 2) having a conductivity of ²⁰ cm ⁻³
× 10 ²⁰ cm ⁻³ ), for example, a silicon oxide layer 107 as a first insulating layer between both high-concentration regions, and a p-type high-concentration region (for example, an acceptor) in the silicon oxide layer 107. Guard ring 10 with a concentration of 1 × 10 ²⁰ cm ^-3 )
8, a terminal 109, and a p-type single-crystal silicon layer 1
02 and guard ring 108 are connected, and guard ring 1
08 is grounded to the ground via the terminal 109,
The semiconductor substrate is capable of effectively suppressing signal propagation.

In the first embodiment, a semiconductor layer having sufficient conductivity formed in a single crystal semiconductor substrate and a guard ring connected to the semiconductor layer are grounded to the ground, and a conductive layer having a first conductivity is formed. Forming an electrical shielding layer for the region and a conductive region having a second conductivity;
The electrical interaction between the first conductive region and the second conductive region is greatly reduced.

FIG. 2 is a configuration diagram of another semiconductor substrate according to an embodiment of the present invention. As shown in the figure, by forming the p-type single-crystal silicon layer 202 at least in contact with the guard ring 208, crosstalk can be significantly suppressed as compared with the related art.

(Embodiment 2) FIG. 3 is an example of a configuration diagram of a semiconductor device according to a second embodiment of the present invention. For example, the semiconductor substrate of the first embodiment (see FIG. 1) is used, and first transistors 305 and 306 are provided in each of a first conductive region having conductivity and a second conductive region having conductivity. Semiconductor device. Transistor 30
5, 306 may be junction transistors, respectively.
A field effect transistor may be used. Also, the number may be singular or plural. By configuring the semiconductor device in this manner, crosstalk between the transistors 305 and 306 can be significantly suppressed.

FIG. 4 is a configuration diagram of another semiconductor device according to an embodiment of the present invention. As shown in the figure, by forming the p-type single-crystal silicon layer 402 at least in contact with the guard ring 408, crosstalk can be significantly suppressed as compared with the related art.

FIG. 5 is a table comparing the effect of suppressing crosstalk between the present invention and the conventional example. In the graph, the transmission coefficient is a first n-type high-concentration region (105 in FIG. 1 in the present invention, and 70 in FIG. 7 in the conventional example) which is a conduction region having the first conductivity.
3) and a second n which is a conductive region having a second conductivity.
The ratio of the signal intensities extracted from the mold high-concentration region (106 in FIG. 1 in the present invention, and 704 in FIG. 7 in the conventional example) is expressed in dB. In the figure, a dotted line 501 indicates only the insulating layer, a broken line 502 indicates the insulating layer and the guard ring, and a solid line 503 indicates the method according to the present invention. As can be seen, by applying the present invention, effective suppression of crosstalk over a wide frequency range can be realized.

FIG. 6 is a table showing the effect of suppressing crosstalk due to the resistivity of the p-type single crystal silicon layer, which is a semiconductor layer having sufficient conductivity, according to the embodiment of the present invention.
2 shows the relationship between the impurity concentration of the p-type single-crystal silicon layer 102 and the crosstalk suppressing effect. In the figure, a solid line 601 is an acceptor concentration of 8 × 10 ¹⁸ cm ⁻³ (resistivity 0.01 Ω · cm), a broken line 602 is an acceptor concentration of 1.5 × 10 ¹⁶ cm ⁻³ (1.0 Ω · cm), and a dotted line 60 is shown.
3 is an acceptor concentration of 1.2 × 10 ¹⁴ cm ^-3 (100
Ω · cm). As can be seen from the graph, in the practice of the present invention, the impurity concentration of the p-type single crystal silicon layer 102 is important, and it is desirable that the impurity concentration be as high as possible (1 × 10 ¹⁸ cm ⁻³ or more).

[0016]

As described above, according to the present invention, a semiconductor layer having sufficient conductivity formed in a single crystal semiconductor substrate and a guard ring are electrically connected to ground, A semiconductor substrate and a semiconductor device which suppress mutual noise between conductive regions having conductivity disposed thereon, and are particularly effective for suppressing performance degradation due to mutual interference in an analog / digital mixed circuit or the like.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a semiconductor substrate according to an embodiment of the present invention.

FIG. 2 is a configuration diagram of another semiconductor substrate in one embodiment of the present invention.

FIG. 3 is a configuration diagram of a semiconductor device according to an embodiment of the present invention.

FIG. 4 is a configuration diagram of another semiconductor device according to an embodiment of the present invention.

FIG. 5 is a chart comparing the crosstalk suppression effects of the present invention and a conventional example.

FIG. 6 is a table showing a crosstalk suppressing effect due to the resistivity of a p-type single crystal silicon layer in an example of the present invention.

FIG. 7 is a configuration diagram of a semiconductor substrate in a conventional example.

FIG. 8 is a configuration diagram of another semiconductor substrate in a conventional example.

[Explanation of symbols]

 Reference Signs List 101 single-crystal silicon substrate 102 p-type single-crystal silicon layer 103 silicon oxide film 104 single-crystal silicon layer 105 first n-type high-concentration region 106 second n-type high-concentration region 107 silicon oxide layer 108 guard ring (p-type) (High concentration region) 109 terminal 201 single crystal silicon substrate 202 p-type single crystal silicon layer 203 silicon oxide film 204 single crystal silicon layer 205 first n-type high concentration region 206 second n-type high concentration region 207 silicon oxide layer 208 Guard ring (p-type high concentration region) 209 Terminal 301 Single-crystal silicon substrate 302 P-type single-crystal silicon layer 303 Silicon oxide film 304 Single-crystal silicon layer 305 First transistor 306 First transistor 307 Silicon oxide layer 308 Guard Ring (p-type high concentration region) 309 end 401 single crystal silicon substrate 402 p-type single crystal silicon layer 403 silicon oxide film 404 single crystal silicon layer 405 first transistor 406 first transistor 407 silicon oxide layer 408 guard ring (p-type high concentration region) 409 terminal 701 single Crystal silicon substrate 702 Silicon oxide film 703 First n-type high concentration region 704 Second n-type high concentration region 705 Silicon oxide layer 706 Terminal 801 Single crystal silicon substrate 802 Silicon oxide film 803 First n-type high concentration region 804 second n-type high concentration region 805 silicon oxide layer 806 guard ring (p-type high concentration region) 807 terminal

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Tatsuro Sakai 2-3-1 Otemachi, Chiyoda-ku, Tokyo F-term (reference) in Nippon Telegraph and Telephone Corporation 5F032 AA01 AC04 BB01 CA17 5F110 AA30 CC02 CC10 DD05 DD22 GG02 GG12 NN62 NN63

Claims (2)

[Claims] A first insulating film provided on a first main surface side of the single crystal semiconductor substrate; a first single crystal semiconductor layer formed on the first insulating film; Having a first insulating layer provided in the single crystal semiconductor layer, and having a first conductive region and a second conductive region having conductivity in contact with each of the first insulating layers; A third conductive region in contact with the single crystal semiconductor substrate in the first insulating layer and the first insulating film; and sufficient conduction between at least a portion below the third conductive region and the single crystal semiconductor substrate. A semiconductor layer having a conductive property, wherein the third conductive region to which the semiconductor layer having a sufficient conductivity is electrically connected is grounded to ground. 2. The device according to claim 1, wherein at least one of a first conductive region and a second conductive region having conductivity in contact with the first insulating layer has at least one junction transistor or electric field. A semiconductor device comprising an effect transistor.